r600g: use blitter to do db->cb flushing.
[mesa.git] / src / gallium / drivers / r600 / r600_texture.c
1 /*
2 * Copyright 2010 Jerome Glisse <glisse@freedesktop.org>
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
22 *
23 * Authors:
24 * Jerome Glisse
25 * Corbin Simpson
26 */
27 #include <errno.h>
28 #include <pipe/p_screen.h>
29 #include <util/u_format.h>
30 #include <util/u_math.h>
31 #include <util/u_inlines.h>
32 #include <util/u_memory.h>
33 #include "state_tracker/drm_driver.h"
34 #include "r600_screen.h"
35 #include "r600_context.h"
36 #include "r600_resource.h"
37 #include "r600_state_inlines.h"
38 #include "r600d.h"
39
40 extern struct u_resource_vtbl r600_texture_vtbl;
41
42 /* Copy from a tiled texture to a detiled one. */
43 static void r600_copy_from_tiled_texture(struct pipe_context *ctx, struct r600_transfer *rtransfer)
44 {
45 struct pipe_transfer *transfer = (struct pipe_transfer*)rtransfer;
46 struct pipe_resource *texture = transfer->resource;
47 struct pipe_subresource subdst;
48
49 subdst.face = 0;
50 subdst.level = 0;
51 ctx->resource_copy_region(ctx, rtransfer->linear_texture,
52 subdst, 0, 0, 0, texture, transfer->sr,
53 transfer->box.x, transfer->box.y, transfer->box.z,
54 transfer->box.width, transfer->box.height);
55 }
56
57 static unsigned long r600_texture_get_offset(struct r600_resource_texture *rtex,
58 unsigned level, unsigned zslice,
59 unsigned face)
60 {
61 unsigned long offset = rtex->offset[level];
62
63 switch (rtex->resource.base.b.target) {
64 case PIPE_TEXTURE_3D:
65 assert(face == 0);
66 return offset + zslice * rtex->layer_size[level];
67 case PIPE_TEXTURE_CUBE:
68 assert(zslice == 0);
69 return offset + face * rtex->layer_size[level];
70 default:
71 assert(zslice == 0 && face == 0);
72 return offset;
73 }
74 }
75
76 static void r600_setup_miptree(struct r600_resource_texture *rtex, enum chip_class chipc)
77 {
78 struct pipe_resource *ptex = &rtex->resource.base.b;
79 unsigned long w, h, pitch, size, layer_size, i, offset;
80
81 rtex->bpt = util_format_get_blocksize(ptex->format);
82 for (i = 0, offset = 0; i <= ptex->last_level; i++) {
83 w = u_minify(ptex->width0, i);
84 h = u_minify(ptex->height0, i);
85 h = util_next_power_of_two(h);
86 pitch = util_format_get_stride(ptex->format, align(w, 64));
87 if (chipc == EVERGREEN)
88 pitch = align(pitch, 512);
89 else
90 pitch = align(pitch, 256);
91 layer_size = pitch * h;
92 if (ptex->target == PIPE_TEXTURE_CUBE) {
93 if (chipc >= R700)
94 size = layer_size * 8;
95 else
96 size = layer_size * 6;
97 }
98 else
99 size = layer_size * u_minify(ptex->depth0, i);
100 rtex->offset[i] = offset;
101 rtex->layer_size[i] = layer_size;
102 rtex->pitch[i] = pitch;
103 rtex->width[i] = w;
104 rtex->height[i] = h;
105 offset += size;
106 }
107 rtex->size = offset;
108 }
109
110 struct pipe_resource *r600_texture_create(struct pipe_screen *screen,
111 const struct pipe_resource *templ)
112 {
113 struct r600_resource_texture *rtex;
114 struct r600_resource *resource;
115 struct radeon *radeon = (struct radeon *)screen->winsys;
116
117 rtex = CALLOC_STRUCT(r600_resource_texture);
118 if (!rtex) {
119 return NULL;
120 }
121 resource = &rtex->resource;
122 resource->base.b = *templ;
123 resource->base.vtbl = &r600_texture_vtbl;
124 pipe_reference_init(&resource->base.b.reference, 1);
125 resource->base.b.screen = screen;
126 r600_setup_miptree(rtex, radeon_get_family_class(radeon));
127
128 /* FIXME alignment 4096 enought ? too much ? */
129 resource->domain = r600_domain_from_usage(resource->base.b.bind);
130 resource->size = rtex->size;
131 resource->bo = radeon_ws_bo(radeon, rtex->size, 4096, 0);
132 if (resource->bo == NULL) {
133 FREE(rtex);
134 return NULL;
135 }
136 return &resource->base.b;
137 }
138
139 static void r600_texture_destroy(struct pipe_screen *screen,
140 struct pipe_resource *ptex)
141 {
142 struct r600_resource_texture *rtex = (struct r600_resource_texture*)ptex;
143 struct r600_resource *resource = &rtex->resource;
144 struct radeon *radeon = (struct radeon *)screen->winsys;
145
146 if (rtex->flushed_depth_texture)
147 pipe_resource_reference(&rtex->flushed_depth_texture, NULL);
148
149 if (resource->bo) {
150 radeon_ws_bo_reference(radeon, &resource->bo, NULL);
151 }
152 FREE(rtex);
153 }
154
155 static struct pipe_surface *r600_get_tex_surface(struct pipe_screen *screen,
156 struct pipe_resource *texture,
157 unsigned face, unsigned level,
158 unsigned zslice, unsigned flags)
159 {
160 struct r600_resource_texture *rtex = (struct r600_resource_texture*)texture;
161 struct pipe_surface *surface = CALLOC_STRUCT(pipe_surface);
162 unsigned long offset;
163
164 if (surface == NULL)
165 return NULL;
166 offset = r600_texture_get_offset(rtex, level, zslice, face);
167 pipe_reference_init(&surface->reference, 1);
168 pipe_resource_reference(&surface->texture, texture);
169 surface->format = texture->format;
170 surface->width = u_minify(texture->width0, level);
171 surface->height = u_minify(texture->height0, level);
172 surface->offset = offset;
173 surface->usage = flags;
174 surface->zslice = zslice;
175 surface->texture = texture;
176 surface->face = face;
177 surface->level = level;
178 return surface;
179 }
180
181 static void r600_tex_surface_destroy(struct pipe_surface *surface)
182 {
183 pipe_resource_reference(&surface->texture, NULL);
184 FREE(surface);
185 }
186
187 struct pipe_resource *r600_texture_from_handle(struct pipe_screen *screen,
188 const struct pipe_resource *templ,
189 struct winsys_handle *whandle)
190 {
191 struct radeon *rw = (struct radeon*)screen->winsys;
192 struct r600_resource_texture *rtex;
193 struct r600_resource *resource;
194 struct radeon_ws_bo *bo = NULL;
195
196 /* Support only 2D textures without mipmaps */
197 if ((templ->target != PIPE_TEXTURE_2D && templ->target != PIPE_TEXTURE_RECT) ||
198 templ->depth0 != 1 || templ->last_level != 0)
199 return NULL;
200
201 rtex = CALLOC_STRUCT(r600_resource_texture);
202 if (rtex == NULL)
203 return NULL;
204
205 bo = radeon_ws_bo_handle(rw, whandle->handle);
206 if (bo == NULL) {
207 FREE(rtex);
208 return NULL;
209 }
210
211 resource = &rtex->resource;
212 resource->base.b = *templ;
213 resource->base.vtbl = &r600_texture_vtbl;
214 pipe_reference_init(&resource->base.b.reference, 1);
215 resource->base.b.screen = screen;
216 resource->bo = bo;
217 rtex->depth = 0;
218 rtex->pitch_override = whandle->stride;
219 rtex->bpt = util_format_get_blocksize(templ->format);
220 rtex->pitch[0] = whandle->stride;
221 rtex->width[0] = templ->width0;
222 rtex->height[0] = templ->height0;
223 rtex->offset[0] = 0;
224 rtex->size = align(rtex->pitch[0] * templ->height0, 64);
225
226 return &resource->base.b;
227 }
228
229 static unsigned int r600_texture_is_referenced(struct pipe_context *context,
230 struct pipe_resource *texture,
231 unsigned face, unsigned level)
232 {
233 /* FIXME */
234 return PIPE_REFERENCED_FOR_READ | PIPE_REFERENCED_FOR_WRITE;
235 }
236
237 int r600_texture_depth_flush(struct pipe_context *ctx,
238 struct pipe_resource *texture)
239 {
240 struct r600_resource_texture *rtex = (struct r600_resource_texture*)texture;
241 struct pipe_resource resource;
242
243 if (rtex->flushed_depth_texture)
244 goto out;
245
246 resource.target = PIPE_TEXTURE_2D;
247 resource.format = texture->format;
248 resource.width0 = texture->width0;
249 resource.height0 = texture->height0;
250 resource.depth0 = 0;
251 resource.last_level = 0;
252 resource.nr_samples = 0;
253 resource.usage = PIPE_USAGE_DYNAMIC;
254 resource.bind = 0;
255 resource.flags = 0;
256
257 resource.bind |= PIPE_BIND_RENDER_TARGET;
258
259 rtex->flushed_depth_texture = ctx->screen->resource_create(ctx->screen, &resource);
260 if (rtex->flushed_depth_texture == NULL) {
261 R600_ERR("failed to create temporary texture to hold untiled copy\n");
262 return -ENOMEM;
263 }
264
265 out:
266 r600_blit_uncompress_depth(ctx, rtex);
267 return 0;
268 }
269
270 struct pipe_transfer* r600_texture_get_transfer(struct pipe_context *ctx,
271 struct pipe_resource *texture,
272 struct pipe_subresource sr,
273 unsigned usage,
274 const struct pipe_box *box)
275 {
276 struct r600_resource_texture *rtex = (struct r600_resource_texture*)texture;
277 struct pipe_resource resource;
278 struct r600_transfer *trans;
279 int r;
280
281 trans = CALLOC_STRUCT(r600_transfer);
282 if (trans == NULL)
283 return NULL;
284 pipe_resource_reference(&trans->transfer.resource, texture);
285 trans->transfer.sr = sr;
286 trans->transfer.usage = usage;
287 trans->transfer.box = *box;
288 trans->transfer.stride = rtex->pitch[sr.level];
289 trans->offset = r600_texture_get_offset(rtex, sr.level, box->z, sr.face);
290 if (rtex->depth) {
291 r = r600_texture_depth_flush(ctx, texture);
292 if (r < 0) {
293 R600_ERR("failed to create temporary texture to hold untiled copy\n");
294 pipe_resource_reference(&trans->transfer.resource, NULL);
295 FREE(trans);
296 return NULL;
297 }
298 } else if (rtex->tiled) {
299 resource.target = PIPE_TEXTURE_2D;
300 resource.format = texture->format;
301 resource.width0 = box->width;
302 resource.height0 = box->height;
303 resource.depth0 = 0;
304 resource.last_level = 0;
305 resource.nr_samples = 0;
306 resource.usage = PIPE_USAGE_DYNAMIC;
307 resource.bind = 0;
308 resource.flags = 0;
309 /* For texture reading, the temporary (detiled) texture is used as
310 * a render target when blitting from a tiled texture. */
311 if (usage & PIPE_TRANSFER_READ) {
312 resource.bind |= PIPE_BIND_RENDER_TARGET;
313 }
314 /* For texture writing, the temporary texture is used as a sampler
315 * when blitting into a tiled texture. */
316 if (usage & PIPE_TRANSFER_WRITE) {
317 resource.bind |= PIPE_BIND_SAMPLER_VIEW;
318 }
319 /* Create the temporary texture. */
320 trans->linear_texture = ctx->screen->resource_create(ctx->screen, &resource);
321 if (trans->linear_texture == NULL) {
322 R600_ERR("failed to create temporary texture to hold untiled copy\n");
323 pipe_resource_reference(&trans->transfer.resource, NULL);
324 FREE(trans);
325 return NULL;
326 }
327 if (usage & PIPE_TRANSFER_READ) {
328 /* We cannot map a tiled texture directly because the data is
329 * in a different order, therefore we do detiling using a blit. */
330 r600_copy_from_tiled_texture(ctx, trans);
331 /* Always referenced in the blit. */
332 ctx->flush(ctx, 0, NULL);
333 }
334 }
335 return &trans->transfer;
336 }
337
338 void r600_texture_transfer_destroy(struct pipe_context *ctx,
339 struct pipe_transfer *transfer)
340 {
341 struct r600_transfer *rtransfer = (struct r600_transfer*)transfer;
342 struct r600_resource_texture *rtex = (struct r600_resource_texture*)transfer->resource;
343
344 if (rtransfer->linear_texture) {
345 pipe_resource_reference(&rtransfer->linear_texture, NULL);
346 }
347 if (rtex->flushed_depth_texture) {
348 if (transfer->usage & PIPE_TRANSFER_WRITE) {
349 // TODO
350 }
351 pipe_resource_reference(&rtex->flushed_depth_texture, NULL);
352 }
353 pipe_resource_reference(&transfer->resource, NULL);
354 FREE(transfer);
355 }
356
357 void* r600_texture_transfer_map(struct pipe_context *ctx,
358 struct pipe_transfer* transfer)
359 {
360 struct r600_transfer *rtransfer = (struct r600_transfer*)transfer;
361 struct radeon_ws_bo *bo;
362 enum pipe_format format = transfer->resource->format;
363 struct radeon *radeon = (struct radeon *)ctx->screen->winsys;
364 unsigned long offset = 0;
365 char *map;
366
367 if (rtransfer->linear_texture) {
368 bo = ((struct r600_resource *)rtransfer->linear_texture)->bo;
369 } else {
370 struct r600_resource_texture *rtex = (struct r600_resource_texture*)transfer->resource;
371
372 if (rtex->flushed_depth_texture)
373 bo = ((struct r600_resource *)rtex->flushed_depth_texture)->bo;
374 else
375 bo = ((struct r600_resource *)transfer->resource)->bo;
376
377 offset = rtransfer->offset +
378 transfer->box.y / util_format_get_blockheight(format) * transfer->stride +
379 transfer->box.x / util_format_get_blockwidth(format) * util_format_get_blocksize(format);
380 }
381 map = radeon_ws_bo_map(radeon, bo, 0, ctx);
382 if (!map) {
383 return NULL;
384 }
385
386 return map + offset;
387 }
388
389 void r600_texture_transfer_unmap(struct pipe_context *ctx,
390 struct pipe_transfer* transfer)
391 {
392 struct r600_transfer *rtransfer = (struct r600_transfer*)transfer;
393 struct radeon *radeon = (struct radeon *)ctx->screen->winsys;
394 struct radeon_ws_bo *bo;
395
396 if (rtransfer->linear_texture) {
397 bo = ((struct r600_resource *)rtransfer->linear_texture)->bo;
398 } else {
399 struct r600_resource_texture *rtex = (struct r600_resource_texture*)transfer->resource;
400
401 if (rtex->flushed_depth_texture) {
402 bo = ((struct r600_resource *)rtex->flushed_depth_texture)->bo;
403 } else {
404 bo = ((struct r600_resource *)transfer->resource)->bo;
405 }
406 }
407 radeon_ws_bo_unmap(radeon, bo);
408 }
409
410 struct u_resource_vtbl r600_texture_vtbl =
411 {
412 u_default_resource_get_handle, /* get_handle */
413 r600_texture_destroy, /* resource_destroy */
414 r600_texture_is_referenced, /* is_resource_referenced */
415 r600_texture_get_transfer, /* get_transfer */
416 r600_texture_transfer_destroy, /* transfer_destroy */
417 r600_texture_transfer_map, /* transfer_map */
418 u_default_transfer_flush_region,/* transfer_flush_region */
419 r600_texture_transfer_unmap, /* transfer_unmap */
420 u_default_transfer_inline_write /* transfer_inline_write */
421 };
422
423 void r600_init_screen_texture_functions(struct pipe_screen *screen)
424 {
425 screen->get_tex_surface = r600_get_tex_surface;
426 screen->tex_surface_destroy = r600_tex_surface_destroy;
427 }
428
429 static unsigned r600_get_swizzle_combined(const unsigned char *swizzle_format,
430 const unsigned char *swizzle_view)
431 {
432 unsigned i;
433 unsigned char swizzle[4];
434 unsigned result = 0;
435 const uint32_t swizzle_shift[4] = {
436 16, 19, 22, 25,
437 };
438 const uint32_t swizzle_bit[4] = {
439 0, 1, 2, 3,
440 };
441
442 if (swizzle_view) {
443 /* Combine two sets of swizzles. */
444 for (i = 0; i < 4; i++) {
445 swizzle[i] = swizzle_view[i] <= UTIL_FORMAT_SWIZZLE_W ?
446 swizzle_format[swizzle_view[i]] : swizzle_view[i];
447 }
448 } else {
449 memcpy(swizzle, swizzle_format, 4);
450 }
451
452 /* Get swizzle. */
453 for (i = 0; i < 4; i++) {
454 switch (swizzle[i]) {
455 case UTIL_FORMAT_SWIZZLE_Y:
456 result |= swizzle_bit[1] << swizzle_shift[i];
457 break;
458 case UTIL_FORMAT_SWIZZLE_Z:
459 result |= swizzle_bit[2] << swizzle_shift[i];
460 break;
461 case UTIL_FORMAT_SWIZZLE_W:
462 result |= swizzle_bit[3] << swizzle_shift[i];
463 break;
464 case UTIL_FORMAT_SWIZZLE_0:
465 result |= V_038010_SQ_SEL_0 << swizzle_shift[i];
466 break;
467 case UTIL_FORMAT_SWIZZLE_1:
468 result |= V_038010_SQ_SEL_1 << swizzle_shift[i];
469 break;
470 default: /* UTIL_FORMAT_SWIZZLE_X */
471 result |= swizzle_bit[0] << swizzle_shift[i];
472 }
473 }
474 return result;
475 }
476
477 /* texture format translate */
478 uint32_t r600_translate_texformat(enum pipe_format format,
479 const unsigned char *swizzle_view,
480 uint32_t *word4_p, uint32_t *yuv_format_p)
481 {
482 uint32_t result = 0, word4 = 0, yuv_format = 0;
483 const struct util_format_description *desc;
484 boolean uniform = TRUE;
485 int i;
486 const uint32_t sign_bit[4] = {
487 S_038010_FORMAT_COMP_X(V_038010_SQ_FORMAT_COMP_SIGNED),
488 S_038010_FORMAT_COMP_Y(V_038010_SQ_FORMAT_COMP_SIGNED),
489 S_038010_FORMAT_COMP_Z(V_038010_SQ_FORMAT_COMP_SIGNED),
490 S_038010_FORMAT_COMP_W(V_038010_SQ_FORMAT_COMP_SIGNED)
491 };
492 desc = util_format_description(format);
493
494 word4 |= r600_get_swizzle_combined(desc->swizzle, swizzle_view);
495
496 /* Colorspace (return non-RGB formats directly). */
497 switch (desc->colorspace) {
498 /* Depth stencil formats */
499 case UTIL_FORMAT_COLORSPACE_ZS:
500 switch (format) {
501 case PIPE_FORMAT_Z16_UNORM:
502 result = V_0280A0_COLOR_16;
503 goto out_word4;
504 case PIPE_FORMAT_Z24X8_UNORM:
505 case PIPE_FORMAT_Z24_UNORM_S8_USCALED:
506 result = V_0280A0_COLOR_8_24;
507 goto out_word4;
508 case PIPE_FORMAT_X8Z24_UNORM:
509 case PIPE_FORMAT_S8_USCALED_Z24_UNORM:
510 result = V_0280A0_COLOR_24_8;
511 goto out_word4;
512 default:
513 goto out_unknown;
514 }
515
516 case UTIL_FORMAT_COLORSPACE_YUV:
517 yuv_format |= (1 << 30);
518 switch (format) {
519 case PIPE_FORMAT_UYVY:
520 case PIPE_FORMAT_YUYV:
521 default:
522 break;
523 }
524 goto out_unknown; /* TODO */
525
526 case UTIL_FORMAT_COLORSPACE_SRGB:
527 word4 |= S_038010_FORCE_DEGAMMA(1);
528 if (format == PIPE_FORMAT_L8A8_SRGB || format == PIPE_FORMAT_L8_SRGB)
529 goto out_unknown; /* fails for some reason - TODO */
530 break;
531
532 default:
533 break;
534 }
535
536 /* S3TC formats. TODO */
537 if (desc->layout == UTIL_FORMAT_LAYOUT_S3TC) {
538 goto out_unknown;
539 }
540
541
542 for (i = 0; i < desc->nr_channels; i++) {
543 if (desc->channel[i].type == UTIL_FORMAT_TYPE_SIGNED) {
544 word4 |= sign_bit[i];
545 }
546 }
547
548 /* R8G8Bx_SNORM - TODO CxV8U8 */
549
550 /* RGTC - TODO */
551
552 /* See whether the components are of the same size. */
553 for (i = 1; i < desc->nr_channels; i++) {
554 uniform = uniform && desc->channel[0].size == desc->channel[i].size;
555 }
556
557 /* Non-uniform formats. */
558 if (!uniform) {
559 switch(desc->nr_channels) {
560 case 3:
561 if (desc->channel[0].size == 5 &&
562 desc->channel[1].size == 6 &&
563 desc->channel[2].size == 5) {
564 result = V_0280A0_COLOR_5_6_5;
565 goto out_word4;
566 }
567 goto out_unknown;
568 case 4:
569 if (desc->channel[0].size == 5 &&
570 desc->channel[1].size == 5 &&
571 desc->channel[2].size == 5 &&
572 desc->channel[3].size == 1) {
573 result = V_0280A0_COLOR_1_5_5_5;
574 goto out_word4;
575 }
576 if (desc->channel[0].size == 10 &&
577 desc->channel[1].size == 10 &&
578 desc->channel[2].size == 10 &&
579 desc->channel[3].size == 2) {
580 result = V_0280A0_COLOR_10_10_10_2;
581 goto out_word4;
582 }
583 goto out_unknown;
584 }
585 goto out_unknown;
586 }
587
588 /* uniform formats */
589 switch (desc->channel[0].type) {
590 case UTIL_FORMAT_TYPE_UNSIGNED:
591 case UTIL_FORMAT_TYPE_SIGNED:
592 if (!desc->channel[0].normalized &&
593 desc->colorspace != UTIL_FORMAT_COLORSPACE_SRGB) {
594 goto out_unknown;
595 }
596
597 switch (desc->channel[0].size) {
598 case 4:
599 switch (desc->nr_channels) {
600 case 2:
601 result = V_0280A0_COLOR_4_4;
602 goto out_word4;
603 case 4:
604 result = V_0280A0_COLOR_4_4_4_4;
605 goto out_word4;
606 }
607 goto out_unknown;
608 case 8:
609 switch (desc->nr_channels) {
610 case 1:
611 result = V_0280A0_COLOR_8;
612 goto out_word4;
613 case 2:
614 result = V_0280A0_COLOR_8_8;
615 goto out_word4;
616 case 4:
617 result = V_0280A0_COLOR_8_8_8_8;
618 goto out_word4;
619 }
620 goto out_unknown;
621 case 16:
622 switch (desc->nr_channels) {
623 case 1:
624 result = V_0280A0_COLOR_16;
625 goto out_word4;
626 case 2:
627 result = V_0280A0_COLOR_16_16;
628 goto out_word4;
629 case 4:
630 result = V_0280A0_COLOR_16_16_16_16;
631 goto out_word4;
632 }
633 }
634 goto out_unknown;
635
636 case UTIL_FORMAT_TYPE_FLOAT:
637 switch (desc->channel[0].size) {
638 case 16:
639 switch (desc->nr_channels) {
640 case 1:
641 result = V_0280A0_COLOR_16_FLOAT;
642 goto out_word4;
643 case 2:
644 result = V_0280A0_COLOR_16_16_FLOAT;
645 goto out_word4;
646 case 4:
647 result = V_0280A0_COLOR_16_16_16_16_FLOAT;
648 goto out_word4;
649 }
650 goto out_unknown;
651 case 32:
652 switch (desc->nr_channels) {
653 case 1:
654 result = V_0280A0_COLOR_32_FLOAT;
655 goto out_word4;
656 case 2:
657 result = V_0280A0_COLOR_32_32_FLOAT;
658 goto out_word4;
659 case 4:
660 result = V_0280A0_COLOR_32_32_32_32_FLOAT;
661 goto out_word4;
662 }
663 }
664
665 }
666 out_word4:
667 if (word4_p)
668 *word4_p = word4;
669 if (yuv_format_p)
670 *yuv_format_p = yuv_format;
671 return result;
672 out_unknown:
673 // R600_ERR("Unable to handle texformat %d %s\n", format, util_format_name(format));
674 return ~0;
675 }