2 * Copyright 2010 Jerome Glisse <glisse@freedesktop.org>
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
28 #include <pipe/p_screen.h>
29 #include <util/u_format.h>
30 #include <util/u_math.h>
31 #include <util/u_inlines.h>
32 #include <util/u_memory.h>
33 #include "state_tracker/drm_driver.h"
34 #include "r600_pipe.h"
35 #include "r600_resource.h"
36 #include "r600_state_inlines.h"
39 extern struct u_resource_vtbl r600_texture_vtbl
;
41 /* Copy from a tiled texture to a detiled one. */
42 static void r600_copy_from_tiled_texture(struct pipe_context
*ctx
, struct r600_transfer
*rtransfer
)
44 struct pipe_transfer
*transfer
= (struct pipe_transfer
*)rtransfer
;
45 struct pipe_resource
*texture
= transfer
->resource
;
46 struct pipe_subresource subdst
;
50 ctx
->resource_copy_region(ctx
, rtransfer
->linear_texture
,
51 subdst
, 0, 0, 0, texture
, transfer
->sr
,
52 transfer
->box
.x
, transfer
->box
.y
, transfer
->box
.z
,
53 transfer
->box
.width
, transfer
->box
.height
);
57 /* Copy from a detiled texture to a tiled one. */
58 static void r600_copy_into_tiled_texture(struct pipe_context
*ctx
, struct r600_transfer
*rtransfer
)
60 struct pipe_transfer
*transfer
= (struct pipe_transfer
*)rtransfer
;
61 struct pipe_resource
*texture
= transfer
->resource
;
62 struct pipe_subresource subsrc
;
66 ctx
->resource_copy_region(ctx
, texture
, transfer
->sr
,
67 transfer
->box
.x
, transfer
->box
.y
, transfer
->box
.z
,
68 rtransfer
->linear_texture
, subsrc
,
70 transfer
->box
.width
, transfer
->box
.height
);
72 ctx
->flush(ctx
, 0, NULL
);
75 static unsigned long r600_texture_get_offset(struct r600_resource_texture
*rtex
,
76 unsigned level
, unsigned zslice
,
79 unsigned long offset
= rtex
->offset
[level
];
81 switch (rtex
->resource
.base
.b
.target
) {
84 return offset
+ zslice
* rtex
->layer_size
[level
];
85 case PIPE_TEXTURE_CUBE
:
87 return offset
+ face
* rtex
->layer_size
[level
];
89 assert(zslice
== 0 && face
== 0);
94 static unsigned r600_texture_get_stride(struct pipe_screen
*screen
,
95 struct r600_resource_texture
*rtex
,
98 struct pipe_resource
*ptex
= &rtex
->resource
.base
.b
;
99 struct radeon
*radeon
= (struct radeon
*)screen
->winsys
;
100 enum chip_class chipc
= r600_get_family_class(radeon
);
101 unsigned width
, stride
;
103 width
= u_minify(ptex
->width0
, level
);
105 stride
= util_format_get_stride(ptex
->format
, align(width
, 64));
106 if (chipc
== EVERGREEN
)
107 stride
= align(stride
, 512);
109 stride
= align(stride
, 256);
113 static unsigned r600_texture_get_nblocksy(struct pipe_screen
*screen
,
114 struct r600_resource_texture
*rtex
,
117 struct pipe_resource
*ptex
= &rtex
->resource
.base
.b
;
120 height
= u_minify(ptex
->height0
, level
);
121 height
= util_next_power_of_two(height
);
122 return util_format_get_nblocksy(ptex
->format
, height
);
125 static void r600_setup_miptree(struct pipe_screen
*screen
,
126 struct r600_resource_texture
*rtex
)
128 struct pipe_resource
*ptex
= &rtex
->resource
.base
.b
;
129 struct radeon
*radeon
= (struct radeon
*)screen
->winsys
;
130 enum chip_class chipc
= r600_get_family_class(radeon
);
131 unsigned long pitch
, size
, layer_size
, i
, offset
;
134 rtex
->bpt
= util_format_get_blocksize(ptex
->format
);
135 for (i
= 0, offset
= 0; i
<= ptex
->last_level
; i
++) {
136 pitch
= r600_texture_get_stride(screen
, rtex
, i
);
137 nblocksy
= r600_texture_get_nblocksy(screen
, rtex
, i
);
139 layer_size
= pitch
* nblocksy
;
141 if (ptex
->target
== PIPE_TEXTURE_CUBE
) {
143 size
= layer_size
* 8;
145 size
= layer_size
* 6;
148 size
= layer_size
* u_minify(ptex
->depth0
, i
);
149 rtex
->offset
[i
] = offset
;
150 rtex
->layer_size
[i
] = layer_size
;
151 rtex
->pitch
[i
] = pitch
;
157 struct pipe_resource
*r600_texture_create(struct pipe_screen
*screen
,
158 const struct pipe_resource
*templ
)
160 struct r600_resource_texture
*rtex
;
161 struct r600_resource
*resource
;
162 struct radeon
*radeon
= (struct radeon
*)screen
->winsys
;
164 rtex
= CALLOC_STRUCT(r600_resource_texture
);
168 resource
= &rtex
->resource
;
169 resource
->base
.b
= *templ
;
170 resource
->base
.vtbl
= &r600_texture_vtbl
;
171 pipe_reference_init(&resource
->base
.b
.reference
, 1);
172 resource
->base
.b
.screen
= screen
;
173 r600_setup_miptree(screen
, rtex
);
175 /* FIXME alignment 4096 enought ? too much ? */
176 resource
->domain
= r600_domain_from_usage(resource
->base
.b
.bind
);
177 resource
->size
= rtex
->size
;
178 resource
->bo
= r600_bo(radeon
, rtex
->size
, 4096, 0);
179 if (resource
->bo
== NULL
) {
183 return &resource
->base
.b
;
186 static void r600_texture_destroy(struct pipe_screen
*screen
,
187 struct pipe_resource
*ptex
)
189 struct r600_resource_texture
*rtex
= (struct r600_resource_texture
*)ptex
;
190 struct r600_resource
*resource
= &rtex
->resource
;
191 struct radeon
*radeon
= (struct radeon
*)screen
->winsys
;
193 if (rtex
->flushed_depth_texture
)
194 pipe_resource_reference((struct pipe_resource
**)&rtex
->flushed_depth_texture
, NULL
);
197 r600_bo_reference(radeon
, &resource
->bo
, NULL
);
202 static struct pipe_surface
*r600_get_tex_surface(struct pipe_screen
*screen
,
203 struct pipe_resource
*texture
,
204 unsigned face
, unsigned level
,
205 unsigned zslice
, unsigned flags
)
207 struct r600_resource_texture
*rtex
= (struct r600_resource_texture
*)texture
;
208 struct pipe_surface
*surface
= CALLOC_STRUCT(pipe_surface
);
209 unsigned long offset
;
213 offset
= r600_texture_get_offset(rtex
, level
, zslice
, face
);
214 pipe_reference_init(&surface
->reference
, 1);
215 pipe_resource_reference(&surface
->texture
, texture
);
216 surface
->format
= texture
->format
;
217 surface
->width
= u_minify(texture
->width0
, level
);
218 surface
->height
= u_minify(texture
->height0
, level
);
219 surface
->offset
= offset
;
220 surface
->usage
= flags
;
221 surface
->zslice
= zslice
;
222 surface
->texture
= texture
;
223 surface
->face
= face
;
224 surface
->level
= level
;
228 static void r600_tex_surface_destroy(struct pipe_surface
*surface
)
230 pipe_resource_reference(&surface
->texture
, NULL
);
234 struct pipe_resource
*r600_texture_from_handle(struct pipe_screen
*screen
,
235 const struct pipe_resource
*templ
,
236 struct winsys_handle
*whandle
)
238 struct radeon
*rw
= (struct radeon
*)screen
->winsys
;
239 struct r600_resource_texture
*rtex
;
240 struct r600_resource
*resource
;
241 struct r600_bo
*bo
= NULL
;
243 /* Support only 2D textures without mipmaps */
244 if ((templ
->target
!= PIPE_TEXTURE_2D
&& templ
->target
!= PIPE_TEXTURE_RECT
) ||
245 templ
->depth0
!= 1 || templ
->last_level
!= 0)
248 rtex
= CALLOC_STRUCT(r600_resource_texture
);
252 bo
= r600_bo_handle(rw
, whandle
->handle
);
258 resource
= &rtex
->resource
;
259 resource
->base
.b
= *templ
;
260 resource
->base
.vtbl
= &r600_texture_vtbl
;
261 pipe_reference_init(&resource
->base
.b
.reference
, 1);
262 resource
->base
.b
.screen
= screen
;
265 rtex
->pitch_override
= whandle
->stride
;
266 rtex
->bpt
= util_format_get_blocksize(templ
->format
);
267 rtex
->pitch
[0] = whandle
->stride
;
269 rtex
->size
= align(rtex
->pitch
[0] * templ
->height0
, 64);
271 return &resource
->base
.b
;
274 static unsigned int r600_texture_is_referenced(struct pipe_context
*context
,
275 struct pipe_resource
*texture
,
276 unsigned face
, unsigned level
)
279 return PIPE_REFERENCED_FOR_READ
| PIPE_REFERENCED_FOR_WRITE
;
282 int (*r600_blit_uncompress_depth_ptr
)(struct pipe_context
*ctx
, struct r600_resource_texture
*texture
);
284 int r600_texture_depth_flush(struct pipe_context
*ctx
,
285 struct pipe_resource
*texture
)
287 struct r600_resource_texture
*rtex
= (struct r600_resource_texture
*)texture
;
288 struct pipe_resource resource
;
290 if (rtex
->flushed_depth_texture
)
293 resource
.target
= PIPE_TEXTURE_2D
;
294 resource
.format
= texture
->format
;
295 resource
.width0
= texture
->width0
;
296 resource
.height0
= texture
->height0
;
298 resource
.last_level
= 0;
299 resource
.nr_samples
= 0;
300 resource
.usage
= PIPE_USAGE_DYNAMIC
;
304 resource
.bind
|= PIPE_BIND_RENDER_TARGET
;
306 rtex
->flushed_depth_texture
= (struct r600_resource_texture
*)ctx
->screen
->resource_create(ctx
->screen
, &resource
);
307 if (rtex
->flushed_depth_texture
== NULL
) {
308 R600_ERR("failed to create temporary texture to hold untiled copy\n");
313 r600_blit_uncompress_depth_ptr(ctx
, rtex
);
317 struct pipe_transfer
* r600_texture_get_transfer(struct pipe_context
*ctx
,
318 struct pipe_resource
*texture
,
319 struct pipe_subresource sr
,
321 const struct pipe_box
*box
)
323 struct r600_resource_texture
*rtex
= (struct r600_resource_texture
*)texture
;
324 struct pipe_resource resource
;
325 struct r600_transfer
*trans
;
328 trans
= CALLOC_STRUCT(r600_transfer
);
331 pipe_resource_reference(&trans
->transfer
.resource
, texture
);
332 trans
->transfer
.sr
= sr
;
333 trans
->transfer
.usage
= usage
;
334 trans
->transfer
.box
= *box
;
335 trans
->transfer
.stride
= rtex
->pitch
[sr
.level
];
336 trans
->offset
= r600_texture_get_offset(rtex
, sr
.level
, box
->z
, sr
.face
);
338 r
= r600_texture_depth_flush(ctx
, texture
);
340 R600_ERR("failed to create temporary texture to hold untiled copy\n");
341 pipe_resource_reference(&trans
->transfer
.resource
, NULL
);
345 } else if (rtex
->tiled
) {
346 resource
.target
= PIPE_TEXTURE_2D
;
347 resource
.format
= texture
->format
;
348 resource
.width0
= box
->width
;
349 resource
.height0
= box
->height
;
351 resource
.last_level
= 0;
352 resource
.nr_samples
= 0;
353 resource
.usage
= PIPE_USAGE_DYNAMIC
;
356 /* For texture reading, the temporary (detiled) texture is used as
357 * a render target when blitting from a tiled texture. */
358 if (usage
& PIPE_TRANSFER_READ
) {
359 resource
.bind
|= PIPE_BIND_RENDER_TARGET
;
361 /* For texture writing, the temporary texture is used as a sampler
362 * when blitting into a tiled texture. */
363 if (usage
& PIPE_TRANSFER_WRITE
) {
364 resource
.bind
|= PIPE_BIND_SAMPLER_VIEW
;
366 /* Create the temporary texture. */
367 trans
->linear_texture
= ctx
->screen
->resource_create(ctx
->screen
, &resource
);
368 if (trans
->linear_texture
== NULL
) {
369 R600_ERR("failed to create temporary texture to hold untiled copy\n");
370 pipe_resource_reference(&trans
->transfer
.resource
, NULL
);
374 if (usage
& PIPE_TRANSFER_READ
) {
375 /* We cannot map a tiled texture directly because the data is
376 * in a different order, therefore we do detiling using a blit. */
377 r600_copy_from_tiled_texture(ctx
, trans
);
378 /* Always referenced in the blit. */
379 ctx
->flush(ctx
, 0, NULL
);
382 return &trans
->transfer
;
385 void r600_texture_transfer_destroy(struct pipe_context
*ctx
,
386 struct pipe_transfer
*transfer
)
388 struct r600_transfer
*rtransfer
= (struct r600_transfer
*)transfer
;
389 struct r600_resource_texture
*rtex
= (struct r600_resource_texture
*)transfer
->resource
;
391 if (rtransfer
->linear_texture
) {
392 if (transfer
->usage
& PIPE_TRANSFER_WRITE
) {
393 r600_copy_into_tiled_texture(ctx
, rtransfer
);
395 pipe_resource_reference(&rtransfer
->linear_texture
, NULL
);
397 if (rtex
->flushed_depth_texture
) {
398 pipe_resource_reference((struct pipe_resource
**)&rtex
->flushed_depth_texture
, NULL
);
400 pipe_resource_reference(&transfer
->resource
, NULL
);
404 void* r600_texture_transfer_map(struct pipe_context
*ctx
,
405 struct pipe_transfer
* transfer
)
407 struct r600_transfer
*rtransfer
= (struct r600_transfer
*)transfer
;
409 enum pipe_format format
= transfer
->resource
->format
;
410 struct radeon
*radeon
= (struct radeon
*)ctx
->screen
->winsys
;
411 unsigned long offset
= 0;
414 if (rtransfer
->linear_texture
) {
415 bo
= ((struct r600_resource
*)rtransfer
->linear_texture
)->bo
;
417 struct r600_resource_texture
*rtex
= (struct r600_resource_texture
*)transfer
->resource
;
419 if (rtex
->flushed_depth_texture
)
420 bo
= ((struct r600_resource
*)rtex
->flushed_depth_texture
)->bo
;
422 bo
= ((struct r600_resource
*)transfer
->resource
)->bo
;
424 offset
= rtransfer
->offset
+
425 transfer
->box
.y
/ util_format_get_blockheight(format
) * transfer
->stride
+
426 transfer
->box
.x
/ util_format_get_blockwidth(format
) * util_format_get_blocksize(format
);
428 map
= r600_bo_map(radeon
, bo
, 0, ctx
);
436 void r600_texture_transfer_unmap(struct pipe_context
*ctx
,
437 struct pipe_transfer
* transfer
)
439 struct r600_transfer
*rtransfer
= (struct r600_transfer
*)transfer
;
440 struct radeon
*radeon
= (struct radeon
*)ctx
->screen
->winsys
;
443 if (rtransfer
->linear_texture
) {
444 bo
= ((struct r600_resource
*)rtransfer
->linear_texture
)->bo
;
446 struct r600_resource_texture
*rtex
= (struct r600_resource_texture
*)transfer
->resource
;
448 if (rtex
->flushed_depth_texture
) {
449 bo
= ((struct r600_resource
*)rtex
->flushed_depth_texture
)->bo
;
451 bo
= ((struct r600_resource
*)transfer
->resource
)->bo
;
454 r600_bo_unmap(radeon
, bo
);
457 struct u_resource_vtbl r600_texture_vtbl
=
459 u_default_resource_get_handle
, /* get_handle */
460 r600_texture_destroy
, /* resource_destroy */
461 r600_texture_is_referenced
, /* is_resource_referenced */
462 r600_texture_get_transfer
, /* get_transfer */
463 r600_texture_transfer_destroy
, /* transfer_destroy */
464 r600_texture_transfer_map
, /* transfer_map */
465 u_default_transfer_flush_region
,/* transfer_flush_region */
466 r600_texture_transfer_unmap
, /* transfer_unmap */
467 u_default_transfer_inline_write
/* transfer_inline_write */
470 void r600_init_screen_texture_functions(struct pipe_screen
*screen
)
472 screen
->get_tex_surface
= r600_get_tex_surface
;
473 screen
->tex_surface_destroy
= r600_tex_surface_destroy
;
476 static unsigned r600_get_swizzle_combined(const unsigned char *swizzle_format
,
477 const unsigned char *swizzle_view
)
480 unsigned char swizzle
[4];
482 const uint32_t swizzle_shift
[4] = {
485 const uint32_t swizzle_bit
[4] = {
490 /* Combine two sets of swizzles. */
491 for (i
= 0; i
< 4; i
++) {
492 swizzle
[i
] = swizzle_view
[i
] <= UTIL_FORMAT_SWIZZLE_W
?
493 swizzle_format
[swizzle_view
[i
]] : swizzle_view
[i
];
496 memcpy(swizzle
, swizzle_format
, 4);
500 for (i
= 0; i
< 4; i
++) {
501 switch (swizzle
[i
]) {
502 case UTIL_FORMAT_SWIZZLE_Y
:
503 result
|= swizzle_bit
[1] << swizzle_shift
[i
];
505 case UTIL_FORMAT_SWIZZLE_Z
:
506 result
|= swizzle_bit
[2] << swizzle_shift
[i
];
508 case UTIL_FORMAT_SWIZZLE_W
:
509 result
|= swizzle_bit
[3] << swizzle_shift
[i
];
511 case UTIL_FORMAT_SWIZZLE_0
:
512 result
|= V_038010_SQ_SEL_0
<< swizzle_shift
[i
];
514 case UTIL_FORMAT_SWIZZLE_1
:
515 result
|= V_038010_SQ_SEL_1
<< swizzle_shift
[i
];
517 default: /* UTIL_FORMAT_SWIZZLE_X */
518 result
|= swizzle_bit
[0] << swizzle_shift
[i
];
524 /* texture format translate */
525 uint32_t r600_translate_texformat(enum pipe_format format
,
526 const unsigned char *swizzle_view
,
527 uint32_t *word4_p
, uint32_t *yuv_format_p
)
529 uint32_t result
= 0, word4
= 0, yuv_format
= 0;
530 const struct util_format_description
*desc
;
531 boolean uniform
= TRUE
;
533 const uint32_t sign_bit
[4] = {
534 S_038010_FORMAT_COMP_X(V_038010_SQ_FORMAT_COMP_SIGNED
),
535 S_038010_FORMAT_COMP_Y(V_038010_SQ_FORMAT_COMP_SIGNED
),
536 S_038010_FORMAT_COMP_Z(V_038010_SQ_FORMAT_COMP_SIGNED
),
537 S_038010_FORMAT_COMP_W(V_038010_SQ_FORMAT_COMP_SIGNED
)
539 desc
= util_format_description(format
);
541 word4
|= r600_get_swizzle_combined(desc
->swizzle
, swizzle_view
);
543 /* Colorspace (return non-RGB formats directly). */
544 switch (desc
->colorspace
) {
545 /* Depth stencil formats */
546 case UTIL_FORMAT_COLORSPACE_ZS
:
548 case PIPE_FORMAT_Z16_UNORM
:
549 result
= V_0280A0_COLOR_16
;
551 case PIPE_FORMAT_X24S8_USCALED
:
552 word4
|= S_038010_NUM_FORMAT_ALL(V_038010_SQ_NUM_FORMAT_INT
);
553 case PIPE_FORMAT_Z24X8_UNORM
:
554 case PIPE_FORMAT_Z24_UNORM_S8_USCALED
:
555 result
= V_0280A0_COLOR_8_24
;
557 case PIPE_FORMAT_S8X24_USCALED
:
558 word4
|= S_038010_NUM_FORMAT_ALL(V_038010_SQ_NUM_FORMAT_INT
);
559 case PIPE_FORMAT_X8Z24_UNORM
:
560 case PIPE_FORMAT_S8_USCALED_Z24_UNORM
:
561 result
= V_0280A0_COLOR_24_8
;
563 case PIPE_FORMAT_S8_USCALED
:
564 result
= V_0280A0_COLOR_8
;
565 word4
|= S_038010_NUM_FORMAT_ALL(V_038010_SQ_NUM_FORMAT_INT
);
571 case UTIL_FORMAT_COLORSPACE_YUV
:
572 yuv_format
|= (1 << 30);
574 case PIPE_FORMAT_UYVY
:
575 case PIPE_FORMAT_YUYV
:
579 goto out_unknown
; /* TODO */
581 case UTIL_FORMAT_COLORSPACE_SRGB
:
582 word4
|= S_038010_FORCE_DEGAMMA(1);
583 if (format
== PIPE_FORMAT_L8A8_SRGB
|| format
== PIPE_FORMAT_L8_SRGB
)
584 goto out_unknown
; /* fails for some reason - TODO */
591 /* S3TC formats. TODO */
592 if (desc
->layout
== UTIL_FORMAT_LAYOUT_S3TC
) {
597 for (i
= 0; i
< desc
->nr_channels
; i
++) {
598 if (desc
->channel
[i
].type
== UTIL_FORMAT_TYPE_SIGNED
) {
599 word4
|= sign_bit
[i
];
603 /* R8G8Bx_SNORM - TODO CxV8U8 */
607 /* See whether the components are of the same size. */
608 for (i
= 1; i
< desc
->nr_channels
; i
++) {
609 uniform
= uniform
&& desc
->channel
[0].size
== desc
->channel
[i
].size
;
612 /* Non-uniform formats. */
614 switch(desc
->nr_channels
) {
616 if (desc
->channel
[0].size
== 5 &&
617 desc
->channel
[1].size
== 6 &&
618 desc
->channel
[2].size
== 5) {
619 result
= V_0280A0_COLOR_5_6_5
;
624 if (desc
->channel
[0].size
== 5 &&
625 desc
->channel
[1].size
== 5 &&
626 desc
->channel
[2].size
== 5 &&
627 desc
->channel
[3].size
== 1) {
628 result
= V_0280A0_COLOR_1_5_5_5
;
631 if (desc
->channel
[0].size
== 10 &&
632 desc
->channel
[1].size
== 10 &&
633 desc
->channel
[2].size
== 10 &&
634 desc
->channel
[3].size
== 2) {
635 result
= V_0280A0_COLOR_10_10_10_2
;
643 /* Find the first non-VOID channel. */
644 for (i
= 0; i
< 4; i
++) {
645 if (desc
->channel
[i
].type
!= UTIL_FORMAT_TYPE_VOID
) {
653 /* uniform formats */
654 switch (desc
->channel
[i
].type
) {
655 case UTIL_FORMAT_TYPE_UNSIGNED
:
656 case UTIL_FORMAT_TYPE_SIGNED
:
657 if (!desc
->channel
[i
].normalized
&&
658 desc
->colorspace
!= UTIL_FORMAT_COLORSPACE_SRGB
) {
662 switch (desc
->channel
[i
].size
) {
664 switch (desc
->nr_channels
) {
666 result
= V_0280A0_COLOR_4_4
;
669 result
= V_0280A0_COLOR_4_4_4_4
;
674 switch (desc
->nr_channels
) {
676 result
= V_0280A0_COLOR_8
;
679 result
= V_0280A0_COLOR_8_8
;
682 result
= V_0280A0_COLOR_8_8_8_8
;
687 switch (desc
->nr_channels
) {
689 result
= V_0280A0_COLOR_16
;
692 result
= V_0280A0_COLOR_16_16
;
695 result
= V_0280A0_COLOR_16_16_16_16
;
701 case UTIL_FORMAT_TYPE_FLOAT
:
702 switch (desc
->channel
[i
].size
) {
704 switch (desc
->nr_channels
) {
706 result
= V_0280A0_COLOR_16_FLOAT
;
709 result
= V_0280A0_COLOR_16_16_FLOAT
;
712 result
= V_0280A0_COLOR_16_16_16_16_FLOAT
;
717 switch (desc
->nr_channels
) {
719 result
= V_0280A0_COLOR_32_FLOAT
;
722 result
= V_0280A0_COLOR_32_32_FLOAT
;
725 result
= V_0280A0_COLOR_32_32_32_32_FLOAT
;
735 *yuv_format_p
= yuv_format
;
738 // R600_ERR("Unable to handle texformat %d %s\n", format, util_format_name(format));