src/gallium/drivers/r600/r600_texture.c

   1 /*
   2  * Copyright 2010 Jerome Glisse <glisse@freedesktop.org>
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * on the rights to use, copy, modify, merge, publish, distribute, sub
   8  * license, and/or sell copies of the Software, and to permit persons to whom
   9  * the Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  18  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  19  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  20  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  21  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *      Jerome Glisse
  25  *      Corbin Simpson
  26  */
  27 #include <errno.h>
  28 #include <pipe/p_screen.h>
  29 #include <util/u_format.h>
  30 #include <util/u_math.h>
  31 #include <util/u_inlines.h>
  32 #include <util/u_memory.h>
  33 #include "state_tracker/drm_driver.h"
  34 #include "r600_pipe.h"
  35 #include "r600_resource.h"
  36 #include "r600_state_inlines.h"
  37 #include "r600d.h"
  38
  39 extern struct u_resource_vtbl r600_texture_vtbl;
  40
  41 /* Copy from a tiled texture to a detiled one. */
  42 static void r600_copy_from_tiled_texture(struct pipe_context *ctx, struct r600_transfer *rtransfer)
  43 {
  44         struct pipe_transfer *transfer = (struct pipe_transfer*)rtransfer;
  45         struct pipe_resource *texture = transfer->resource;
  46         struct pipe_subresource subdst;
  47
  48         subdst.face = 0;
  49         subdst.level = 0;
  50         ctx->resource_copy_region(ctx, rtransfer->linear_texture,
  51                                 subdst, 0, 0, 0, texture, transfer->sr,
  52                                 transfer->box.x, transfer->box.y, transfer->box.z,
  53                                 transfer->box.width, transfer->box.height);
  54 }
  55
  56 static unsigned long r600_texture_get_offset(struct r600_resource_texture *rtex,
  57                                         unsigned level, unsigned zslice,
  58                                         unsigned face)
  59 {
  60         unsigned long offset = rtex->offset[level];
  61
  62         switch (rtex->resource.base.b.target) {
  63         case PIPE_TEXTURE_3D:
  64                 assert(face == 0);
  65                 return offset + zslice * rtex->layer_size[level];
  66         case PIPE_TEXTURE_CUBE:
  67                 assert(zslice == 0);
  68                 return offset + face * rtex->layer_size[level];
  69         default:
  70                 assert(zslice == 0 && face == 0);
  71                 return offset;
  72         }
  73 }
  74
  75 static void r600_setup_miptree(struct r600_resource_texture *rtex, enum chip_class chipc)
  76 {
  77         struct pipe_resource *ptex = &rtex->resource.base.b;
  78         unsigned long w, h, pitch, size, layer_size, i, offset;
  79
  80         rtex->bpt = util_format_get_blocksize(ptex->format);
  81         for (i = 0, offset = 0; i <= ptex->last_level; i++) {
  82                 w = u_minify(ptex->width0, i);
  83                 h = u_minify(ptex->height0, i);
  84                 h = util_next_power_of_two(h);
  85                 pitch = util_format_get_stride(ptex->format, align(w, 64));
  86                 if (chipc == EVERGREEN)
  87                         pitch = align(pitch, 512);
  88                 else
  89                         pitch = align(pitch, 256);
  90                 layer_size = pitch * h;
  91                 if (ptex->target == PIPE_TEXTURE_CUBE) {
  92                         if (chipc >= R700)
  93                                 size = layer_size * 8;
  94                         else
  95                                 size = layer_size * 6;
  96                 }
  97                 else
  98                         size = layer_size * u_minify(ptex->depth0, i);
  99                 rtex->offset[i] = offset;
 100                 rtex->layer_size[i] = layer_size;
 101                 rtex->pitch[i] = pitch;
 102                 rtex->width[i] = w;
 103                 rtex->height[i] = h;
 104                 offset += size;
 105         }
 106         rtex->size = offset;
 107 }
 108
 109 struct pipe_resource *r600_texture_create(struct pipe_screen *screen,
 110                                                 const struct pipe_resource *templ)
 111 {
 112         struct r600_resource_texture *rtex;
 113         struct r600_resource *resource;
 114         struct radeon *radeon = (struct radeon *)screen->winsys;
 115
 116         rtex = CALLOC_STRUCT(r600_resource_texture);
 117         if (!rtex) {
 118                 return NULL;
 119         }
 120         resource = &rtex->resource;
 121         resource->base.b = *templ;
 122         resource->base.vtbl = &r600_texture_vtbl;
 123         pipe_reference_init(&resource->base.b.reference, 1);
 124         resource->base.b.screen = screen;
 125         r600_setup_miptree(rtex, r600_get_family_class(radeon));
 126
 127         /* FIXME alignment 4096 enought ? too much ? */
 128         resource->domain = r600_domain_from_usage(resource->base.b.bind);
 129         resource->size = rtex->size;
 130         resource->bo = radeon_ws_bo(radeon, rtex->size, 4096, 0);
 131         if (resource->bo == NULL) {
 132                 FREE(rtex);
 133                 return NULL;
 134         }
 135         return &resource->base.b;
 136 }
 137
 138 static void r600_texture_destroy(struct pipe_screen *screen,
 139                                  struct pipe_resource *ptex)
 140 {
 141         struct r600_resource_texture *rtex = (struct r600_resource_texture*)ptex;
 142         struct r600_resource *resource = &rtex->resource;
 143         struct radeon *radeon = (struct radeon *)screen->winsys;
 144
 145         if (rtex->flushed_depth_texture)
 146                 pipe_resource_reference((struct pipe_resource **)&rtex->flushed_depth_texture, NULL);
 147
 148         if (resource->bo) {
 149                 radeon_ws_bo_reference(radeon, &resource->bo, NULL);
 150         }
 151         FREE(rtex);
 152 }
 153
 154 static struct pipe_surface *r600_get_tex_surface(struct pipe_screen *screen,
 155                                                 struct pipe_resource *texture,
 156                                                 unsigned face, unsigned level,
 157                                                 unsigned zslice, unsigned flags)
 158 {
 159         struct r600_resource_texture *rtex = (struct r600_resource_texture*)texture;
 160         struct pipe_surface *surface = CALLOC_STRUCT(pipe_surface);
 161         unsigned long offset;
 162
 163         if (surface == NULL)
 164                 return NULL;
 165         offset = r600_texture_get_offset(rtex, level, zslice, face);
 166         pipe_reference_init(&surface->reference, 1);
 167         pipe_resource_reference(&surface->texture, texture);
 168         surface->format = texture->format;
 169         surface->width = u_minify(texture->width0, level);
 170         surface->height = u_minify(texture->height0, level);
 171         surface->offset = offset;
 172         surface->usage = flags;
 173         surface->zslice = zslice;
 174         surface->texture = texture;
 175         surface->face = face;
 176         surface->level = level;
 177         return surface;
 178 }
 179
 180 static void r600_tex_surface_destroy(struct pipe_surface *surface)
 181 {
 182         pipe_resource_reference(&surface->texture, NULL);
 183         FREE(surface);
 184 }
 185
 186 struct pipe_resource *r600_texture_from_handle(struct pipe_screen *screen,
 187                                                const struct pipe_resource *templ,
 188                                                struct winsys_handle *whandle)
 189 {
 190         struct radeon *rw = (struct radeon*)screen->winsys;
 191         struct r600_resource_texture *rtex;
 192         struct r600_resource *resource;
 193         struct radeon_ws_bo *bo = NULL;
 194
 195         /* Support only 2D textures without mipmaps */
 196         if ((templ->target != PIPE_TEXTURE_2D && templ->target != PIPE_TEXTURE_RECT) ||
 197               templ->depth0 != 1 || templ->last_level != 0)
 198                 return NULL;
 199
 200         rtex = CALLOC_STRUCT(r600_resource_texture);
 201         if (rtex == NULL)
 202                 return NULL;
 203
 204         bo = radeon_ws_bo_handle(rw, whandle->handle);
 205         if (bo == NULL) {
 206                 FREE(rtex);
 207                 return NULL;
 208         }
 209
 210         resource = &rtex->resource;
 211         resource->base.b = *templ;
 212         resource->base.vtbl = &r600_texture_vtbl;
 213         pipe_reference_init(&resource->base.b.reference, 1);
 214         resource->base.b.screen = screen;
 215         resource->bo = bo;
 216         rtex->depth = 0;
 217         rtex->pitch_override = whandle->stride;
 218         rtex->bpt = util_format_get_blocksize(templ->format);
 219         rtex->pitch[0] = whandle->stride;
 220         rtex->width[0] = templ->width0;
 221         rtex->height[0] = templ->height0;
 222         rtex->offset[0] = 0;
 223         rtex->size = align(rtex->pitch[0] * templ->height0, 64);
 224
 225         return &resource->base.b;
 226 }
 227
 228 static unsigned int r600_texture_is_referenced(struct pipe_context *context,
 229                                                 struct pipe_resource *texture,
 230                                                 unsigned face, unsigned level)
 231 {
 232         /* FIXME */
 233         return PIPE_REFERENCED_FOR_READ | PIPE_REFERENCED_FOR_WRITE;
 234 }
 235
 236 int (*r600_blit_uncompress_depth_ptr)(struct pipe_context *ctx, struct r600_resource_texture *texture);
 237
 238 int r600_texture_depth_flush(struct pipe_context *ctx,
 239                              struct pipe_resource *texture)
 240 {
 241         struct r600_resource_texture *rtex = (struct r600_resource_texture*)texture;
 242         struct pipe_resource resource;
 243
 244         if (rtex->flushed_depth_texture)
 245                 goto out;
 246
 247         resource.target = PIPE_TEXTURE_2D;
 248         resource.format = texture->format;
 249         resource.width0 = texture->width0;
 250         resource.height0 = texture->height0;
 251         resource.depth0 = 0;
 252         resource.last_level = 0;
 253         resource.nr_samples = 0;
 254         resource.usage = PIPE_USAGE_DYNAMIC;
 255         resource.bind = 0;
 256         resource.flags = 0;
 257
 258         resource.bind |= PIPE_BIND_RENDER_TARGET;
 259
 260         rtex->flushed_depth_texture = (struct r600_resource_texture *)ctx->screen->resource_create(ctx->screen, &resource);
 261         if (rtex->flushed_depth_texture == NULL) {
 262                 R600_ERR("failed to create temporary texture to hold untiled copy\n");
 263                 return -ENOMEM;
 264         }
 265
 266 out:
 267         r600_blit_uncompress_depth_ptr(ctx, rtex);
 268         return 0;
 269 }
 270
 271 struct pipe_transfer* r600_texture_get_transfer(struct pipe_context *ctx,
 272                                                 struct pipe_resource *texture,
 273                                                 struct pipe_subresource sr,
 274                                                 unsigned usage,
 275                                                 const struct pipe_box *box)
 276 {
 277         struct r600_resource_texture *rtex = (struct r600_resource_texture*)texture;
 278         struct pipe_resource resource;
 279         struct r600_transfer *trans;
 280         int r;
 281
 282         trans = CALLOC_STRUCT(r600_transfer);
 283         if (trans == NULL)
 284                 return NULL;
 285         pipe_resource_reference(&trans->transfer.resource, texture);
 286         trans->transfer.sr = sr;
 287         trans->transfer.usage = usage;
 288         trans->transfer.box = *box;
 289         trans->transfer.stride = rtex->pitch[sr.level];
 290         trans->offset = r600_texture_get_offset(rtex, sr.level, box->z, sr.face);
 291         if (rtex->depth) {
 292                 r = r600_texture_depth_flush(ctx, texture);
 293                 if (r < 0) {
 294                         R600_ERR("failed to create temporary texture to hold untiled copy\n");
 295                         pipe_resource_reference(&trans->transfer.resource, NULL);
 296                         FREE(trans);
 297                         return NULL;
 298                 }
 299         } else if (rtex->tiled) {
 300                 resource.target = PIPE_TEXTURE_2D;
 301                 resource.format = texture->format;
 302                 resource.width0 = box->width;
 303                 resource.height0 = box->height;
 304                 resource.depth0 = 0;
 305                 resource.last_level = 0;
 306                 resource.nr_samples = 0;
 307                 resource.usage = PIPE_USAGE_DYNAMIC;
 308                 resource.bind = 0;
 309                 resource.flags = 0;
 310                 /* For texture reading, the temporary (detiled) texture is used as
 311                  * a render target when blitting from a tiled texture. */
 312                 if (usage & PIPE_TRANSFER_READ) {
 313                         resource.bind |= PIPE_BIND_RENDER_TARGET;
 314                 }
 315                 /* For texture writing, the temporary texture is used as a sampler
 316                  * when blitting into a tiled texture. */
 317                 if (usage & PIPE_TRANSFER_WRITE) {
 318                         resource.bind |= PIPE_BIND_SAMPLER_VIEW;
 319                 }
 320                 /* Create the temporary texture. */
 321                 trans->linear_texture = ctx->screen->resource_create(ctx->screen, &resource);
 322                 if (trans->linear_texture == NULL) {
 323                         R600_ERR("failed to create temporary texture to hold untiled copy\n");
 324                         pipe_resource_reference(&trans->transfer.resource, NULL);
 325                         FREE(trans);
 326                         return NULL;
 327                 }
 328                 if (usage & PIPE_TRANSFER_READ) {
 329                         /* We cannot map a tiled texture directly because the data is
 330                          * in a different order, therefore we do detiling using a blit. */
 331                         r600_copy_from_tiled_texture(ctx, trans);
 332                         /* Always referenced in the blit. */
 333                         ctx->flush(ctx, 0, NULL);
 334                 }
 335         }
 336         return &trans->transfer;
 337 }
 338
 339 void r600_texture_transfer_destroy(struct pipe_context *ctx,
 340                                    struct pipe_transfer *transfer)
 341 {
 342         struct r600_transfer *rtransfer = (struct r600_transfer*)transfer;
 343         struct r600_resource_texture *rtex = (struct r600_resource_texture*)transfer->resource;
 344
 345         if (rtransfer->linear_texture) {
 346                 pipe_resource_reference(&rtransfer->linear_texture, NULL);
 347         }
 348         if (rtex->flushed_depth_texture) {
 349                 if (transfer->usage & PIPE_TRANSFER_WRITE) {
 350                         // TODO
 351                 }
 352                 pipe_resource_reference((struct pipe_resource **)&rtex->flushed_depth_texture, NULL);
 353         }
 354         pipe_resource_reference(&transfer->resource, NULL);
 355         FREE(transfer);
 356 }
 357
 358 void* r600_texture_transfer_map(struct pipe_context *ctx,
 359                                 struct pipe_transfer* transfer)
 360 {
 361         struct r600_transfer *rtransfer = (struct r600_transfer*)transfer;
 362         struct radeon_ws_bo *bo;
 363         enum pipe_format format = transfer->resource->format;
 364         struct radeon *radeon = (struct radeon *)ctx->screen->winsys;
 365         unsigned long offset = 0;
 366         char *map;
 367
 368         if (rtransfer->linear_texture) {
 369                 bo = ((struct r600_resource *)rtransfer->linear_texture)->bo;
 370         } else {
 371                 struct r600_resource_texture *rtex = (struct r600_resource_texture*)transfer->resource;
 372
 373                 if (rtex->flushed_depth_texture)
 374                         bo = ((struct r600_resource *)rtex->flushed_depth_texture)->bo;
 375                 else
 376                         bo = ((struct r600_resource *)transfer->resource)->bo;
 377
 378                 offset = rtransfer->offset +
 379                         transfer->box.y / util_format_get_blockheight(format) * transfer->stride +
 380                         transfer->box.x / util_format_get_blockwidth(format) * util_format_get_blocksize(format);
 381         }
 382         map = radeon_ws_bo_map(radeon, bo, 0, ctx);
 383         if (!map) {
 384                 return NULL;
 385         }
 386
 387         return map + offset;
 388 }
 389
 390 void r600_texture_transfer_unmap(struct pipe_context *ctx,
 391                                  struct pipe_transfer* transfer)
 392 {
 393         struct r600_transfer *rtransfer = (struct r600_transfer*)transfer;
 394         struct radeon *radeon = (struct radeon *)ctx->screen->winsys;
 395         struct radeon_ws_bo *bo;
 396
 397         if (rtransfer->linear_texture) {
 398                 bo = ((struct r600_resource *)rtransfer->linear_texture)->bo;
 399         } else {
 400                 struct r600_resource_texture *rtex = (struct r600_resource_texture*)transfer->resource;
 401
 402                 if (rtex->flushed_depth_texture) {
 403                         bo = ((struct r600_resource *)rtex->flushed_depth_texture)->bo;
 404                 } else {
 405                         bo = ((struct r600_resource *)transfer->resource)->bo;
 406                 }
 407         }
 408         radeon_ws_bo_unmap(radeon, bo);
 409 }
 410
 411 struct u_resource_vtbl r600_texture_vtbl =
 412 {
 413         u_default_resource_get_handle,  /* get_handle */
 414         r600_texture_destroy,           /* resource_destroy */
 415         r600_texture_is_referenced,     /* is_resource_referenced */
 416         r600_texture_get_transfer,      /* get_transfer */
 417         r600_texture_transfer_destroy,  /* transfer_destroy */
 418         r600_texture_transfer_map,      /* transfer_map */
 419         u_default_transfer_flush_region,/* transfer_flush_region */
 420         r600_texture_transfer_unmap,    /* transfer_unmap */
 421         u_default_transfer_inline_write /* transfer_inline_write */
 422 };
 423
 424 void r600_init_screen_texture_functions(struct pipe_screen *screen)
 425 {
 426         screen->get_tex_surface = r600_get_tex_surface;
 427         screen->tex_surface_destroy = r600_tex_surface_destroy;
 428 }
 429
 430 static unsigned r600_get_swizzle_combined(const unsigned char *swizzle_format,
 431                 const unsigned char *swizzle_view)
 432 {
 433         unsigned i;
 434         unsigned char swizzle[4];
 435         unsigned result = 0;
 436         const uint32_t swizzle_shift[4] = {
 437                 16, 19, 22, 25,
 438         };
 439         const uint32_t swizzle_bit[4] = {
 440                 0, 1, 2, 3,
 441         };
 442
 443         if (swizzle_view) {
 444                 /* Combine two sets of swizzles. */
 445                 for (i = 0; i < 4; i++) {
 446                         swizzle[i] = swizzle_view[i] <= UTIL_FORMAT_SWIZZLE_W ?
 447                                 swizzle_format[swizzle_view[i]] : swizzle_view[i];
 448                 }
 449         } else {
 450                 memcpy(swizzle, swizzle_format, 4);
 451         }
 452
 453         /* Get swizzle. */
 454         for (i = 0; i < 4; i++) {
 455                 switch (swizzle[i]) {
 456                 case UTIL_FORMAT_SWIZZLE_Y:
 457                         result |= swizzle_bit[1] << swizzle_shift[i];
 458                         break;
 459                 case UTIL_FORMAT_SWIZZLE_Z:
 460                         result |= swizzle_bit[2] << swizzle_shift[i];
 461                         break;
 462                 case UTIL_FORMAT_SWIZZLE_W:
 463                         result |= swizzle_bit[3] << swizzle_shift[i];
 464                         break;
 465                 case UTIL_FORMAT_SWIZZLE_0:
 466                         result |= V_038010_SQ_SEL_0 << swizzle_shift[i];
 467                         break;
 468                 case UTIL_FORMAT_SWIZZLE_1:
 469                         result |= V_038010_SQ_SEL_1 << swizzle_shift[i];
 470                         break;
 471                 default: /* UTIL_FORMAT_SWIZZLE_X */
 472                         result |= swizzle_bit[0] << swizzle_shift[i];
 473                 }
 474         }
 475         return result;
 476 }
 477
 478 /* texture format translate */
 479 uint32_t r600_translate_texformat(enum pipe_format format,
 480                                   const unsigned char *swizzle_view,
 481                                   uint32_t *word4_p, uint32_t *yuv_format_p)
 482 {
 483         uint32_t result = 0, word4 = 0, yuv_format = 0;
 484         const struct util_format_description *desc;
 485         boolean uniform = TRUE;
 486         int i;
 487         const uint32_t sign_bit[4] = {
 488                 S_038010_FORMAT_COMP_X(V_038010_SQ_FORMAT_COMP_SIGNED),
 489                 S_038010_FORMAT_COMP_Y(V_038010_SQ_FORMAT_COMP_SIGNED),
 490                 S_038010_FORMAT_COMP_Z(V_038010_SQ_FORMAT_COMP_SIGNED),
 491                 S_038010_FORMAT_COMP_W(V_038010_SQ_FORMAT_COMP_SIGNED)
 492         };
 493         desc = util_format_description(format);
 494
 495         word4 |= r600_get_swizzle_combined(desc->swizzle, swizzle_view);
 496
 497         /* Colorspace (return non-RGB formats directly). */
 498         switch (desc->colorspace) {
 499                 /* Depth stencil formats */
 500         case UTIL_FORMAT_COLORSPACE_ZS:
 501                 switch (format) {
 502                 case PIPE_FORMAT_Z16_UNORM:
 503                         result = V_0280A0_COLOR_16;
 504                         goto out_word4;
 505                 case PIPE_FORMAT_Z24X8_UNORM:
 506                 case PIPE_FORMAT_Z24_UNORM_S8_USCALED:
 507                         result = V_0280A0_COLOR_8_24;
 508                         goto out_word4;
 509                 case PIPE_FORMAT_X8Z24_UNORM:
 510                 case PIPE_FORMAT_S8_USCALED_Z24_UNORM:
 511                         result = V_0280A0_COLOR_24_8;
 512                         goto out_word4;
 513                 default:
 514                         goto out_unknown;
 515                 }
 516
 517         case UTIL_FORMAT_COLORSPACE_YUV:
 518                 yuv_format |= (1 << 30);
 519                 switch (format) {
 520                 case PIPE_FORMAT_UYVY:
 521                 case PIPE_FORMAT_YUYV:
 522                 default:
 523                         break;
 524                 }
 525                 goto out_unknown; /* TODO */
 526
 527         case UTIL_FORMAT_COLORSPACE_SRGB:
 528                 word4 |= S_038010_FORCE_DEGAMMA(1);
 529                 if (format == PIPE_FORMAT_L8A8_SRGB || format == PIPE_FORMAT_L8_SRGB)
 530                         goto out_unknown; /* fails for some reason - TODO */
 531                 break;
 532
 533         default:
 534                 break;
 535         }
 536
 537         /* S3TC formats. TODO */
 538         if (desc->layout == UTIL_FORMAT_LAYOUT_S3TC) {
 539                 goto out_unknown;
 540         }
 541
 542
 543         for (i = 0; i < desc->nr_channels; i++) {
 544                 if (desc->channel[i].type == UTIL_FORMAT_TYPE_SIGNED) {
 545                         word4 |= sign_bit[i];
 546                 }
 547         }
 548
 549         /* R8G8Bx_SNORM - TODO CxV8U8 */
 550
 551         /* RGTC - TODO */
 552
 553         /* See whether the components are of the same size. */
 554         for (i = 1; i < desc->nr_channels; i++) {
 555                 uniform = uniform && desc->channel[0].size == desc->channel[i].size;
 556         }
 557
 558         /* Non-uniform formats. */
 559         if (!uniform) {
 560                 switch(desc->nr_channels) {
 561                 case 3:
 562                         if (desc->channel[0].size == 5 &&
 563                             desc->channel[1].size == 6 &&
 564                             desc->channel[2].size == 5) {
 565                                 result = V_0280A0_COLOR_5_6_5;
 566                                 goto out_word4;
 567                         }
 568                         goto out_unknown;
 569                 case 4:
 570                         if (desc->channel[0].size == 5 &&
 571                             desc->channel[1].size == 5 &&
 572                             desc->channel[2].size == 5 &&
 573                             desc->channel[3].size == 1) {
 574                                 result = V_0280A0_COLOR_1_5_5_5;
 575                                 goto out_word4;
 576                         }
 577                         if (desc->channel[0].size == 10 &&
 578                             desc->channel[1].size == 10 &&
 579                             desc->channel[2].size == 10 &&
 580                             desc->channel[3].size == 2) {
 581                                 result = V_0280A0_COLOR_10_10_10_2;
 582                                 goto out_word4;
 583                         }
 584                         goto out_unknown;
 585                 }
 586                 goto out_unknown;
 587         }
 588
 589         /* uniform formats */
 590         switch (desc->channel[0].type) {
 591         case UTIL_FORMAT_TYPE_UNSIGNED:
 592         case UTIL_FORMAT_TYPE_SIGNED:
 593                 if (!desc->channel[0].normalized &&
 594                     desc->colorspace != UTIL_FORMAT_COLORSPACE_SRGB) {
 595                         goto out_unknown;
 596                 }
 597
 598                 switch (desc->channel[0].size) {
 599                 case 4:
 600                         switch (desc->nr_channels) {
 601                         case 2:
 602                                 result = V_0280A0_COLOR_4_4;
 603                                 goto out_word4;
 604                         case 4:
 605                                 result = V_0280A0_COLOR_4_4_4_4;
 606                                 goto out_word4;
 607                         }
 608                         goto out_unknown;
 609                 case 8:
 610                         switch (desc->nr_channels) {
 611                         case 1:
 612                                 result = V_0280A0_COLOR_8;
 613                                 goto out_word4;
 614                         case 2:
 615                                 result = V_0280A0_COLOR_8_8;
 616                                 goto out_word4;
 617                         case 4:
 618                                 result = V_0280A0_COLOR_8_8_8_8;
 619                                 goto out_word4;
 620                         }
 621                         goto out_unknown;
 622                 case 16:
 623                         switch (desc->nr_channels) {
 624                         case 1:
 625                                 result = V_0280A0_COLOR_16;
 626                                 goto out_word4;
 627                         case 2:
 628                                 result = V_0280A0_COLOR_16_16;
 629                                 goto out_word4;
 630                         case 4:
 631                                 result = V_0280A0_COLOR_16_16_16_16;
 632                                 goto out_word4;
 633                         }
 634                 }
 635                 goto out_unknown;
 636
 637         case UTIL_FORMAT_TYPE_FLOAT:
 638                 switch (desc->channel[0].size) {
 639                 case 16:
 640                         switch (desc->nr_channels) {
 641                         case 1:
 642                                 result = V_0280A0_COLOR_16_FLOAT;
 643                                 goto out_word4;
 644                         case 2:
 645                                 result = V_0280A0_COLOR_16_16_FLOAT;
 646                                 goto out_word4;
 647                         case 4:
 648                                 result = V_0280A0_COLOR_16_16_16_16_FLOAT;
 649                                 goto out_word4;
 650                         }
 651                         goto out_unknown;
 652                 case 32:
 653                         switch (desc->nr_channels) {
 654                         case 1:
 655                                 result = V_0280A0_COLOR_32_FLOAT;
 656                                 goto out_word4;
 657                         case 2:
 658                                 result = V_0280A0_COLOR_32_32_FLOAT;
 659                                 goto out_word4;
 660                         case 4:
 661                                 result = V_0280A0_COLOR_32_32_32_32_FLOAT;
 662                                 goto out_word4;
 663                         }
 664                 }
 665
 666         }
 667 out_word4:
 668         if (word4_p)
 669                 *word4_p = word4;
 670         if (yuv_format_p)
 671                 *yuv_format_p = yuv_format;
 672         return result;
 673 out_unknown:
 674 //      R600_ERR("Unable to handle texformat %d %s\n", format, util_format_name(format));
 675         return ~0;
 676 }