src/gallium/drivers/r600/r600_texture.c

   1 /*
   2  * Copyright 2010 Jerome Glisse <glisse@freedesktop.org>
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * on the rights to use, copy, modify, merge, publish, distribute, sub
   8  * license, and/or sell copies of the Software, and to permit persons to whom
   9  * the Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  18  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  19  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  20  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  21  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *      Jerome Glisse
  25  *      Corbin Simpson
  26  */
  27 #include <errno.h>
  28 #include <pipe/p_screen.h>
  29 #include <util/u_format.h>
  30 #include <util/u_math.h>
  31 #include <util/u_inlines.h>
  32 #include <util/u_memory.h>
  33 #include "state_tracker/drm_driver.h"
  34 #include "r600_pipe.h"
  35 #include "r600_resource.h"
  36 #include "r600_state_inlines.h"
  37 #include "r600d.h"
  38 #include "r600_formats.h"
  39
  40 extern struct u_resource_vtbl r600_texture_vtbl;
  41
  42 /* Copy from a tiled texture to a detiled one. */
  43 static void r600_copy_from_tiled_texture(struct pipe_context *ctx, struct r600_transfer *rtransfer)
  44 {
  45         struct pipe_transfer *transfer = (struct pipe_transfer*)rtransfer;
  46         struct pipe_resource *texture = transfer->resource;
  47         struct pipe_subresource subdst;
  48
  49         subdst.face = 0;
  50         subdst.level = 0;
  51         ctx->resource_copy_region(ctx, rtransfer->linear_texture,
  52                                 subdst, 0, 0, 0, texture, transfer->sr,
  53                                 transfer->box.x, transfer->box.y, transfer->box.z,
  54                                 transfer->box.width, transfer->box.height);
  55 }
  56
  57
  58 /* Copy from a detiled texture to a tiled one. */
  59 static void r600_copy_into_tiled_texture(struct pipe_context *ctx, struct r600_transfer *rtransfer)
  60 {
  61         struct pipe_transfer *transfer = (struct pipe_transfer*)rtransfer;
  62         struct pipe_resource *texture = transfer->resource;
  63         struct pipe_subresource subsrc;
  64
  65         subsrc.face = 0;
  66         subsrc.level = 0;
  67         ctx->resource_copy_region(ctx, texture, transfer->sr,
  68                                   transfer->box.x, transfer->box.y, transfer->box.z,
  69                                   rtransfer->linear_texture, subsrc,
  70                                   0, 0, 0,
  71                                   transfer->box.width, transfer->box.height);
  72
  73         ctx->flush(ctx, 0, NULL);
  74 }
  75
  76 static unsigned r600_texture_get_offset(struct r600_resource_texture *rtex,
  77                                         unsigned level, unsigned zslice,
  78                                         unsigned face)
  79 {
  80         unsigned offset = rtex->offset[level];
  81
  82         switch (rtex->resource.base.b.target) {
  83         case PIPE_TEXTURE_3D:
  84                 assert(face == 0);
  85                 return offset + zslice * rtex->layer_size[level];
  86         case PIPE_TEXTURE_CUBE:
  87                 assert(zslice == 0);
  88                 return offset + face * rtex->layer_size[level];
  89         default:
  90                 assert(zslice == 0 && face == 0);
  91                 return offset;
  92         }
  93 }
  94
  95 static unsigned r600_get_pixel_alignment(struct pipe_screen *screen,
  96                                          enum pipe_format format,
  97                                          unsigned array_mode)
  98 {
  99         struct r600_screen* rscreen = (struct r600_screen *)screen;
 100         unsigned pixsize = util_format_get_blocksize(format);
 101         int p_align;
 102
 103         switch(array_mode) {
 104         case V_038000_ARRAY_1D_TILED_THIN1:
 105                 p_align = MAX2(8,
 106                                ((rscreen->tiling_info->group_bytes / 8 / pixsize)));
 107                 break;
 108         case V_038000_ARRAY_2D_TILED_THIN1:
 109                 p_align = MAX2(rscreen->tiling_info->num_banks,
 110                                (((rscreen->tiling_info->group_bytes / 8 / pixsize)) *
 111                                 rscreen->tiling_info->num_banks));
 112                 break;
 113         case 0:
 114         default:
 115                 p_align = 64;
 116                 break;
 117         }
 118         return p_align;
 119 }
 120
 121 static unsigned r600_get_height_alignment(struct pipe_screen *screen,
 122                                           unsigned array_mode)
 123 {
 124         struct r600_screen* rscreen = (struct r600_screen *)screen;
 125         int h_align;
 126
 127         switch (array_mode) {
 128         case V_038000_ARRAY_2D_TILED_THIN1:
 129                 h_align = rscreen->tiling_info->num_channels * 8;
 130                 break;
 131         case V_038000_ARRAY_1D_TILED_THIN1:
 132                 h_align = 8;
 133                 break;
 134         default:
 135                 h_align = 1;
 136                 break;
 137         }
 138         return h_align;
 139 }
 140
 141 static unsigned mip_minify(unsigned size, unsigned level)
 142 {
 143         unsigned val;
 144         val = u_minify(size, level);
 145         if (level > 0)
 146                 val = util_next_power_of_two(val);
 147         return val;
 148 }
 149
 150 static unsigned r600_texture_get_stride(struct pipe_screen *screen,
 151                                         struct r600_resource_texture *rtex,
 152                                         unsigned level)
 153 {
 154         struct pipe_resource *ptex = &rtex->resource.base.b;
 155         struct radeon *radeon = (struct radeon *)screen->winsys;
 156         enum chip_class chipc = r600_get_family_class(radeon);
 157         unsigned width, stride, tile_width;
 158
 159         if (rtex->pitch_override)
 160                 return rtex->pitch_override;
 161
 162         width = mip_minify(ptex->width0, level);
 163         if (util_format_is_plain(ptex->format)) {
 164                 tile_width = r600_get_pixel_alignment(screen, ptex->format,
 165                                                       rtex->array_mode[level]);
 166                 width = align(width, tile_width);
 167         }
 168         stride = util_format_get_stride(ptex->format, width);
 169         if (chipc == EVERGREEN)
 170                 stride = align(stride, 512);
 171         return stride;
 172 }
 173
 174 static unsigned r600_texture_get_nblocksy(struct pipe_screen *screen,
 175                                           struct r600_resource_texture *rtex,
 176                                           unsigned level)
 177 {
 178         struct pipe_resource *ptex = &rtex->resource.base.b;
 179         unsigned height, tile_height;
 180
 181         height = mip_minify(ptex->height0, level);
 182         if (util_format_is_plain(ptex->format)) {
 183                 tile_height = r600_get_height_alignment(screen,
 184                                                         rtex->array_mode[level]);
 185                 height = align(height, tile_height);
 186         }
 187         return util_format_get_nblocksy(ptex->format, height);
 188 }
 189
 190 /* Get a width in pixels from a stride in bytes. */
 191 static unsigned pitch_to_width(enum pipe_format format,
 192                                 unsigned pitch_in_bytes)
 193 {
 194     return (pitch_in_bytes / util_format_get_blocksize(format)) *
 195             util_format_get_blockwidth(format);
 196 }
 197
 198 static void r600_texture_set_array_mode(struct pipe_screen *screen,
 199                                         struct r600_resource_texture *rtex,
 200                                         unsigned level, unsigned array_mode)
 201 {
 202         struct pipe_resource *ptex = &rtex->resource.base.b;
 203
 204         switch (array_mode) {
 205         case V_0280A0_ARRAY_LINEAR_GENERAL:
 206         case V_0280A0_ARRAY_LINEAR_ALIGNED:
 207         case V_0280A0_ARRAY_1D_TILED_THIN1:
 208         default:
 209                 rtex->array_mode[level] = array_mode;
 210                 break;
 211         case V_0280A0_ARRAY_2D_TILED_THIN1:
 212         {
 213                 unsigned w, h, tile_height, tile_width;
 214
 215                 tile_height = r600_get_height_alignment(screen, array_mode);
 216                 tile_width = r600_get_pixel_alignment(screen, ptex->format, array_mode);
 217
 218                 w = mip_minify(ptex->width0, level);
 219                 h = mip_minify(ptex->height0, level);
 220                 if (w < tile_width || h < tile_height)
 221                         rtex->array_mode[level] = V_0280A0_ARRAY_1D_TILED_THIN1;
 222                 else
 223                         rtex->array_mode[level] = array_mode;
 224         }
 225         break;
 226         }
 227 }
 228
 229 static void r600_setup_miptree(struct pipe_screen *screen,
 230                                struct r600_resource_texture *rtex,
 231                                unsigned array_mode)
 232 {
 233         struct pipe_resource *ptex = &rtex->resource.base.b;
 234         struct radeon *radeon = (struct radeon *)screen->winsys;
 235         enum chip_class chipc = r600_get_family_class(radeon);
 236         unsigned pitch, size, layer_size, i, offset;
 237         unsigned nblocksy;
 238
 239         for (i = 0, offset = 0; i <= ptex->last_level; i++) {
 240                 r600_texture_set_array_mode(screen, rtex, i, array_mode);
 241
 242                 pitch = r600_texture_get_stride(screen, rtex, i);
 243                 nblocksy = r600_texture_get_nblocksy(screen, rtex, i);
 244
 245                 layer_size = pitch * nblocksy;
 246
 247                 if (ptex->target == PIPE_TEXTURE_CUBE) {
 248                         if (chipc >= R700)
 249                                 size = layer_size * 8;
 250                         else
 251                                 size = layer_size * 6;
 252                 }
 253                 else
 254                         size = layer_size * u_minify(ptex->depth0, i);
 255                 rtex->offset[i] = offset;
 256                 rtex->layer_size[i] = layer_size;
 257                 rtex->pitch_in_bytes[i] = pitch;
 258                 rtex->pitch_in_pixels[i] = pitch_to_width(ptex->format, pitch);
 259                 offset += size;
 260         }
 261         rtex->size = offset;
 262 }
 263
 264 static struct r600_resource_texture *
 265 r600_texture_create_object(struct pipe_screen *screen,
 266                            const struct pipe_resource *base,
 267                            unsigned array_mode,
 268                            unsigned pitch_in_bytes_override,
 269                            unsigned max_buffer_size,
 270                            struct r600_bo *bo)
 271 {
 272         struct r600_resource_texture *rtex;
 273         struct r600_resource *resource;
 274         struct radeon *radeon = (struct radeon *)screen->winsys;
 275
 276         rtex = CALLOC_STRUCT(r600_resource_texture);
 277         if (rtex == NULL)
 278                 return NULL;
 279
 280         resource = &rtex->resource;
 281         resource->base.b = *base;
 282         resource->base.vtbl = &r600_texture_vtbl;
 283         pipe_reference_init(&resource->base.b.reference, 1);
 284         resource->base.b.screen = screen;
 285         resource->bo = bo;
 286         resource->domain = r600_domain_from_usage(resource->base.b.bind);
 287         rtex->pitch_override = pitch_in_bytes_override;
 288
 289         if (array_mode)
 290                 rtex->tiled = 1;
 291         r600_setup_miptree(screen, rtex, array_mode);
 292
 293         resource->size = rtex->size;
 294
 295         if (!resource->bo) {
 296                 resource->bo = r600_bo(radeon, rtex->size, 4096, 0);
 297                 if (!resource->bo) {
 298                         FREE(rtex);
 299                         return NULL;
 300                 }
 301         }
 302         return rtex;
 303 }
 304
 305 struct pipe_resource *r600_texture_create(struct pipe_screen *screen,
 306                                                 const struct pipe_resource *templ)
 307 {
 308         unsigned array_mode = 0;
 309
 310         return (struct pipe_resource *)r600_texture_create_object(screen, templ, array_mode,
 311                                                                   0, 0, NULL);
 312
 313 }
 314
 315 static void r600_texture_destroy(struct pipe_screen *screen,
 316                                  struct pipe_resource *ptex)
 317 {
 318         struct r600_resource_texture *rtex = (struct r600_resource_texture*)ptex;
 319         struct r600_resource *resource = &rtex->resource;
 320         struct radeon *radeon = (struct radeon *)screen->winsys;
 321
 322         if (rtex->flushed_depth_texture)
 323                 pipe_resource_reference((struct pipe_resource **)&rtex->flushed_depth_texture, NULL);
 324
 325         if (resource->bo) {
 326                 r600_bo_reference(radeon, &resource->bo, NULL);
 327         }
 328         FREE(rtex);
 329 }
 330
 331 static struct pipe_surface *r600_get_tex_surface(struct pipe_screen *screen,
 332                                                 struct pipe_resource *texture,
 333                                                 unsigned face, unsigned level,
 334                                                 unsigned zslice, unsigned flags)
 335 {
 336         struct r600_resource_texture *rtex = (struct r600_resource_texture*)texture;
 337         struct r600_surface *surface = CALLOC_STRUCT(r600_surface);
 338         unsigned offset, tile_height;
 339
 340         if (surface == NULL)
 341                 return NULL;
 342         offset = r600_texture_get_offset(rtex, level, zslice, face);
 343         pipe_reference_init(&surface->base.reference, 1);
 344         pipe_resource_reference(&surface->base.texture, texture);
 345         surface->base.format = texture->format;
 346         surface->base.width = mip_minify(texture->width0, level);
 347         surface->base.height = mip_minify(texture->height0, level);
 348         surface->base.offset = offset;
 349         surface->base.usage = flags;
 350         surface->base.zslice = zslice;
 351         surface->base.texture = texture;
 352         surface->base.face = face;
 353         surface->base.level = level;
 354
 355         tile_height = r600_get_height_alignment(screen, rtex->array_mode[level]);
 356         surface->aligned_height = align(surface->base.height, tile_height);
 357         return &surface->base;
 358 }
 359
 360 static void r600_tex_surface_destroy(struct pipe_surface *surface)
 361 {
 362         pipe_resource_reference(&surface->texture, NULL);
 363         FREE(surface);
 364 }
 365
 366
 367 struct pipe_resource *r600_texture_from_handle(struct pipe_screen *screen,
 368                                                const struct pipe_resource *templ,
 369                                                struct winsys_handle *whandle)
 370 {
 371         struct radeon *rw = (struct radeon*)screen->winsys;
 372         struct r600_bo *bo = NULL;
 373         unsigned array_mode = 0;
 374
 375         /* Support only 2D textures without mipmaps */
 376         if ((templ->target != PIPE_TEXTURE_2D && templ->target != PIPE_TEXTURE_RECT) ||
 377               templ->depth0 != 1 || templ->last_level != 0)
 378                 return NULL;
 379
 380         bo = r600_bo_handle(rw, whandle->handle, &array_mode);
 381         if (bo == NULL) {
 382                 return NULL;
 383         }
 384
 385         return (struct pipe_resource *)r600_texture_create_object(screen, templ, array_mode,
 386                                                                   whandle->stride,
 387                                                                   0,
 388                                                                   bo);
 389 }
 390
 391 static unsigned int r600_texture_is_referenced(struct pipe_context *context,
 392                                                 struct pipe_resource *texture,
 393                                                 unsigned face, unsigned level)
 394 {
 395         /* FIXME */
 396         return PIPE_REFERENCED_FOR_READ | PIPE_REFERENCED_FOR_WRITE;
 397 }
 398
 399 int (*r600_blit_uncompress_depth_ptr)(struct pipe_context *ctx, struct r600_resource_texture *texture);
 400
 401 int r600_texture_depth_flush(struct pipe_context *ctx,
 402                              struct pipe_resource *texture)
 403 {
 404         struct r600_resource_texture *rtex = (struct r600_resource_texture*)texture;
 405         struct pipe_resource resource;
 406
 407         if (rtex->flushed_depth_texture)
 408                 goto out;
 409
 410         resource.target = PIPE_TEXTURE_2D;
 411         resource.format = texture->format;
 412         resource.width0 = texture->width0;
 413         resource.height0 = texture->height0;
 414         resource.depth0 = 1;
 415         resource.last_level = 0;
 416         resource.nr_samples = 0;
 417         resource.usage = PIPE_USAGE_DYNAMIC;
 418         resource.bind = 0;
 419         resource.flags = R600_RESOURCE_FLAG_TRANSFER;
 420
 421         resource.bind |= PIPE_BIND_DEPTH_STENCIL;
 422
 423         rtex->flushed_depth_texture = (struct r600_resource_texture *)ctx->screen->resource_create(ctx->screen, &resource);
 424         if (rtex->flushed_depth_texture == NULL) {
 425                 R600_ERR("failed to create temporary texture to hold untiled copy\n");
 426                 return -ENOMEM;
 427         }
 428
 429 out:
 430         r600_blit_uncompress_depth_ptr(ctx, rtex);
 431         return 0;
 432 }
 433
 434 struct pipe_transfer* r600_texture_get_transfer(struct pipe_context *ctx,
 435                                                 struct pipe_resource *texture,
 436                                                 struct pipe_subresource sr,
 437                                                 unsigned usage,
 438                                                 const struct pipe_box *box)
 439 {
 440         struct r600_resource_texture *rtex = (struct r600_resource_texture*)texture;
 441         struct pipe_resource resource;
 442         struct r600_transfer *trans;
 443         int r;
 444
 445         trans = CALLOC_STRUCT(r600_transfer);
 446         if (trans == NULL)
 447                 return NULL;
 448         pipe_resource_reference(&trans->transfer.resource, texture);
 449         trans->transfer.sr = sr;
 450         trans->transfer.usage = usage;
 451         trans->transfer.box = *box;
 452         if (rtex->depth) {
 453                 r = r600_texture_depth_flush(ctx, texture);
 454                 if (r < 0) {
 455                         R600_ERR("failed to create temporary texture to hold untiled copy\n");
 456                         pipe_resource_reference(&trans->transfer.resource, NULL);
 457                         FREE(trans);
 458                         return NULL;
 459                 }
 460         } else if (rtex->tiled) {
 461                 resource.target = PIPE_TEXTURE_2D;
 462                 resource.format = texture->format;
 463                 resource.width0 = box->width;
 464                 resource.height0 = box->height;
 465                 resource.depth0 = 1;
 466                 resource.last_level = 0;
 467                 resource.nr_samples = 0;
 468                 resource.usage = PIPE_USAGE_DYNAMIC;
 469                 resource.bind = 0;
 470                 resource.flags = R600_RESOURCE_FLAG_TRANSFER;
 471                 /* For texture reading, the temporary (detiled) texture is used as
 472                  * a render target when blitting from a tiled texture. */
 473                 if (usage & PIPE_TRANSFER_READ) {
 474                         resource.bind |= PIPE_BIND_RENDER_TARGET;
 475                 }
 476                 /* For texture writing, the temporary texture is used as a sampler
 477                  * when blitting into a tiled texture. */
 478                 if (usage & PIPE_TRANSFER_WRITE) {
 479                         resource.bind |= PIPE_BIND_SAMPLER_VIEW;
 480                 }
 481                 /* Create the temporary texture. */
 482                 trans->linear_texture = ctx->screen->resource_create(ctx->screen, &resource);
 483                 if (trans->linear_texture == NULL) {
 484                         R600_ERR("failed to create temporary texture to hold untiled copy\n");
 485                         pipe_resource_reference(&trans->transfer.resource, NULL);
 486                         FREE(trans);
 487                         return NULL;
 488                 }
 489
 490                 trans->transfer.stride =
 491                   ((struct r600_resource_texture *)trans->linear_texture)->pitch_in_bytes[0];
 492                 if (usage & PIPE_TRANSFER_READ) {
 493                         /* We cannot map a tiled texture directly because the data is
 494                          * in a different order, therefore we do detiling using a blit. */
 495                         r600_copy_from_tiled_texture(ctx, trans);
 496                         /* Always referenced in the blit. */
 497                         ctx->flush(ctx, 0, NULL);
 498                 }
 499                 return &trans->transfer;
 500         }
 501         trans->transfer.stride = rtex->pitch_in_bytes[sr.level];
 502         trans->offset = r600_texture_get_offset(rtex, sr.level, box->z, sr.face);
 503         return &trans->transfer;
 504 }
 505
 506 void r600_texture_transfer_destroy(struct pipe_context *ctx,
 507                                    struct pipe_transfer *transfer)
 508 {
 509         struct r600_transfer *rtransfer = (struct r600_transfer*)transfer;
 510         struct r600_resource_texture *rtex = (struct r600_resource_texture*)transfer->resource;
 511
 512         if (rtransfer->linear_texture) {
 513                 if (transfer->usage & PIPE_TRANSFER_WRITE) {
 514                         r600_copy_into_tiled_texture(ctx, rtransfer);
 515                 }
 516                 pipe_resource_reference(&rtransfer->linear_texture, NULL);
 517         }
 518         if (rtex->flushed_depth_texture) {
 519                 pipe_resource_reference((struct pipe_resource **)&rtex->flushed_depth_texture, NULL);
 520         }
 521         pipe_resource_reference(&transfer->resource, NULL);
 522         FREE(transfer);
 523 }
 524
 525 void* r600_texture_transfer_map(struct pipe_context *ctx,
 526                                 struct pipe_transfer* transfer)
 527 {
 528         struct r600_transfer *rtransfer = (struct r600_transfer*)transfer;
 529         struct r600_bo *bo;
 530         enum pipe_format format = transfer->resource->format;
 531         struct radeon *radeon = (struct radeon *)ctx->screen->winsys;
 532         unsigned offset = 0;
 533         char *map;
 534
 535         if (rtransfer->linear_texture) {
 536                 bo = ((struct r600_resource *)rtransfer->linear_texture)->bo;
 537         } else {
 538                 struct r600_resource_texture *rtex = (struct r600_resource_texture*)transfer->resource;
 539
 540                 if (rtex->flushed_depth_texture)
 541                         bo = ((struct r600_resource *)rtex->flushed_depth_texture)->bo;
 542                 else
 543                         bo = ((struct r600_resource *)transfer->resource)->bo;
 544
 545                 offset = rtransfer->offset +
 546                         transfer->box.y / util_format_get_blockheight(format) * transfer->stride +
 547                         transfer->box.x / util_format_get_blockwidth(format) * util_format_get_blocksize(format);
 548         }
 549         map = r600_bo_map(radeon, bo, 0, ctx);
 550         if (!map) {
 551                 return NULL;
 552         }
 553
 554         return map + offset;
 555 }
 556
 557 void r600_texture_transfer_unmap(struct pipe_context *ctx,
 558                                  struct pipe_transfer* transfer)
 559 {
 560         struct r600_transfer *rtransfer = (struct r600_transfer*)transfer;
 561         struct radeon *radeon = (struct radeon *)ctx->screen->winsys;
 562         struct r600_bo *bo;
 563
 564         if (rtransfer->linear_texture) {
 565                 bo = ((struct r600_resource *)rtransfer->linear_texture)->bo;
 566         } else {
 567                 struct r600_resource_texture *rtex = (struct r600_resource_texture*)transfer->resource;
 568
 569                 if (rtex->flushed_depth_texture) {
 570                         bo = ((struct r600_resource *)rtex->flushed_depth_texture)->bo;
 571                 } else {
 572                         bo = ((struct r600_resource *)transfer->resource)->bo;
 573                 }
 574         }
 575         r600_bo_unmap(radeon, bo);
 576 }
 577
 578 struct u_resource_vtbl r600_texture_vtbl =
 579 {
 580         u_default_resource_get_handle,  /* get_handle */
 581         r600_texture_destroy,           /* resource_destroy */
 582         r600_texture_is_referenced,     /* is_resource_referenced */
 583         r600_texture_get_transfer,      /* get_transfer */
 584         r600_texture_transfer_destroy,  /* transfer_destroy */
 585         r600_texture_transfer_map,      /* transfer_map */
 586         u_default_transfer_flush_region,/* transfer_flush_region */
 587         r600_texture_transfer_unmap,    /* transfer_unmap */
 588         u_default_transfer_inline_write /* transfer_inline_write */
 589 };
 590
 591 void r600_init_screen_texture_functions(struct pipe_screen *screen)
 592 {
 593         screen->get_tex_surface = r600_get_tex_surface;
 594         screen->tex_surface_destroy = r600_tex_surface_destroy;
 595 }
 596
 597 static unsigned r600_get_swizzle_combined(const unsigned char *swizzle_format,
 598                 const unsigned char *swizzle_view)
 599 {
 600         unsigned i;
 601         unsigned char swizzle[4];
 602         unsigned result = 0;
 603         const uint32_t swizzle_shift[4] = {
 604                 16, 19, 22, 25,
 605         };
 606         const uint32_t swizzle_bit[4] = {
 607                 0, 1, 2, 3,
 608         };
 609
 610         if (swizzle_view) {
 611                 /* Combine two sets of swizzles. */
 612                 for (i = 0; i < 4; i++) {
 613                         swizzle[i] = swizzle_view[i] <= UTIL_FORMAT_SWIZZLE_W ?
 614                                 swizzle_format[swizzle_view[i]] : swizzle_view[i];
 615                 }
 616         } else {
 617                 memcpy(swizzle, swizzle_format, 4);
 618         }
 619
 620         /* Get swizzle. */
 621         for (i = 0; i < 4; i++) {
 622                 switch (swizzle[i]) {
 623                 case UTIL_FORMAT_SWIZZLE_Y:
 624                         result |= swizzle_bit[1] << swizzle_shift[i];
 625                         break;
 626                 case UTIL_FORMAT_SWIZZLE_Z:
 627                         result |= swizzle_bit[2] << swizzle_shift[i];
 628                         break;
 629                 case UTIL_FORMAT_SWIZZLE_W:
 630                         result |= swizzle_bit[3] << swizzle_shift[i];
 631                         break;
 632                 case UTIL_FORMAT_SWIZZLE_0:
 633                         result |= V_038010_SQ_SEL_0 << swizzle_shift[i];
 634                         break;
 635                 case UTIL_FORMAT_SWIZZLE_1:
 636                         result |= V_038010_SQ_SEL_1 << swizzle_shift[i];
 637                         break;
 638                 default: /* UTIL_FORMAT_SWIZZLE_X */
 639                         result |= swizzle_bit[0] << swizzle_shift[i];
 640                 }
 641         }
 642         return result;
 643 }
 644
 645 /* texture format translate */
 646 uint32_t r600_translate_texformat(enum pipe_format format,
 647                                   const unsigned char *swizzle_view,
 648                                   uint32_t *word4_p, uint32_t *yuv_format_p)
 649 {
 650         uint32_t result = 0, word4 = 0, yuv_format = 0;
 651         const struct util_format_description *desc;
 652         boolean uniform = TRUE;
 653         int i;
 654         const uint32_t sign_bit[4] = {
 655                 S_038010_FORMAT_COMP_X(V_038010_SQ_FORMAT_COMP_SIGNED),
 656                 S_038010_FORMAT_COMP_Y(V_038010_SQ_FORMAT_COMP_SIGNED),
 657                 S_038010_FORMAT_COMP_Z(V_038010_SQ_FORMAT_COMP_SIGNED),
 658                 S_038010_FORMAT_COMP_W(V_038010_SQ_FORMAT_COMP_SIGNED)
 659         };
 660         desc = util_format_description(format);
 661
 662         word4 |= r600_get_swizzle_combined(desc->swizzle, swizzle_view);
 663
 664         /* Colorspace (return non-RGB formats directly). */
 665         switch (desc->colorspace) {
 666                 /* Depth stencil formats */
 667         case UTIL_FORMAT_COLORSPACE_ZS:
 668                 switch (format) {
 669                 case PIPE_FORMAT_Z16_UNORM:
 670                         result = FMT_16;
 671                         goto out_word4;
 672                 case PIPE_FORMAT_X24S8_USCALED:
 673                         word4 |= S_038010_NUM_FORMAT_ALL(V_038010_SQ_NUM_FORMAT_INT);
 674                 case PIPE_FORMAT_Z24X8_UNORM:
 675                 case PIPE_FORMAT_Z24_UNORM_S8_USCALED:
 676                         result = FMT_8_24;
 677                         goto out_word4;
 678                 case PIPE_FORMAT_S8X24_USCALED:
 679                         word4 |= S_038010_NUM_FORMAT_ALL(V_038010_SQ_NUM_FORMAT_INT);
 680                 case PIPE_FORMAT_X8Z24_UNORM:
 681                 case PIPE_FORMAT_S8_USCALED_Z24_UNORM:
 682                         result = FMT_24_8;
 683                         goto out_word4;
 684                 case PIPE_FORMAT_S8_USCALED:
 685                         result = V_0280A0_COLOR_8;
 686                         word4 |= S_038010_NUM_FORMAT_ALL(V_038010_SQ_NUM_FORMAT_INT);
 687                         goto out_word4;
 688                 default:
 689                         goto out_unknown;
 690                 }
 691
 692         case UTIL_FORMAT_COLORSPACE_YUV:
 693                 yuv_format |= (1 << 30);
 694                 switch (format) {
 695                 case PIPE_FORMAT_UYVY:
 696                 case PIPE_FORMAT_YUYV:
 697                 default:
 698                         break;
 699                 }
 700                 goto out_unknown; /* TODO */
 701
 702         case UTIL_FORMAT_COLORSPACE_SRGB:
 703                 word4 |= S_038010_FORCE_DEGAMMA(1);
 704                 if (format == PIPE_FORMAT_L8A8_SRGB || format == PIPE_FORMAT_L8_SRGB)
 705                         goto out_unknown; /* fails for some reason - TODO */
 706                 break;
 707
 708         default:
 709                 break;
 710         }
 711
 712         /* S3TC formats. TODO */
 713         if (desc->layout == UTIL_FORMAT_LAYOUT_S3TC) {
 714                 goto out_unknown;
 715         }
 716
 717
 718         for (i = 0; i < desc->nr_channels; i++) {
 719                 if (desc->channel[i].type == UTIL_FORMAT_TYPE_SIGNED) {
 720                         word4 |= sign_bit[i];
 721                 }
 722         }
 723
 724         /* R8G8Bx_SNORM - TODO CxV8U8 */
 725
 726         /* RGTC - TODO */
 727
 728         /* See whether the components are of the same size. */
 729         for (i = 1; i < desc->nr_channels; i++) {
 730                 uniform = uniform && desc->channel[0].size == desc->channel[i].size;
 731         }
 732
 733         /* Non-uniform formats. */
 734         if (!uniform) {
 735                 switch(desc->nr_channels) {
 736                 case 3:
 737                         if (desc->channel[0].size == 5 &&
 738                             desc->channel[1].size == 6 &&
 739                             desc->channel[2].size == 5) {
 740                                 result = FMT_5_6_5;
 741                                 goto out_word4;
 742                         }
 743                         goto out_unknown;
 744                 case 4:
 745                         if (desc->channel[0].size == 5 &&
 746                             desc->channel[1].size == 5 &&
 747                             desc->channel[2].size == 5 &&
 748                             desc->channel[3].size == 1) {
 749                                 result = FMT_1_5_5_5;
 750                                 goto out_word4;
 751                         }
 752                         if (desc->channel[0].size == 10 &&
 753                             desc->channel[1].size == 10 &&
 754                             desc->channel[2].size == 10 &&
 755                             desc->channel[3].size == 2) {
 756                                 result = FMT_10_10_10_2;
 757                                 goto out_word4;
 758                         }
 759                         goto out_unknown;
 760                 }
 761                 goto out_unknown;
 762         }
 763
 764         /* Find the first non-VOID channel. */
 765         for (i = 0; i < 4; i++) {
 766                 if (desc->channel[i].type != UTIL_FORMAT_TYPE_VOID) {
 767                         break;
 768                 }
 769         }
 770
 771         if (i == 4)
 772                 goto out_unknown;
 773
 774         /* uniform formats */
 775         switch (desc->channel[i].type) {
 776         case UTIL_FORMAT_TYPE_UNSIGNED:
 777         case UTIL_FORMAT_TYPE_SIGNED:
 778                 if (!desc->channel[i].normalized &&
 779                     desc->colorspace != UTIL_FORMAT_COLORSPACE_SRGB) {
 780                         goto out_unknown;
 781                 }
 782
 783                 switch (desc->channel[i].size) {
 784                 case 4:
 785                         switch (desc->nr_channels) {
 786                         case 2:
 787                                 result = FMT_4_4;
 788                                 goto out_word4;
 789                         case 4:
 790                                 result = FMT_4_4_4_4;
 791                                 goto out_word4;
 792                         }
 793                         goto out_unknown;
 794                 case 8:
 795                         switch (desc->nr_channels) {
 796                         case 1:
 797                                 result = FMT_8;
 798                                 goto out_word4;
 799                         case 2:
 800                                 result = FMT_8_8;
 801                                 goto out_word4;
 802                         case 4:
 803                                 result = FMT_8_8_8_8;
 804                                 goto out_word4;
 805                         }
 806                         goto out_unknown;
 807                 case 16:
 808                         switch (desc->nr_channels) {
 809                         case 1:
 810                                 result = FMT_16;
 811                                 goto out_word4;
 812                         case 2:
 813                                 result = FMT_16_16;
 814                                 goto out_word4;
 815                         case 4:
 816                                 result = FMT_16_16_16_16;
 817                                 goto out_word4;
 818                         }
 819                 }
 820                 goto out_unknown;
 821
 822         case UTIL_FORMAT_TYPE_FLOAT:
 823                 switch (desc->channel[i].size) {
 824                 case 16:
 825                         switch (desc->nr_channels) {
 826                         case 1:
 827                                 result = FMT_16_FLOAT;
 828                                 goto out_word4;
 829                         case 2:
 830                                 result = FMT_16_16_FLOAT;
 831                                 goto out_word4;
 832                         case 4:
 833                                 result = FMT_16_16_16_16_FLOAT;
 834                                 goto out_word4;
 835                         }
 836                         goto out_unknown;
 837                 case 32:
 838                         switch (desc->nr_channels) {
 839                         case 1:
 840                                 result = FMT_32_FLOAT;
 841                                 goto out_word4;
 842                         case 2:
 843                                 result = FMT_32_32_FLOAT;
 844                                 goto out_word4;
 845                         case 4:
 846                                 result = FMT_32_32_32_32_FLOAT;
 847                                 goto out_word4;
 848                         }
 849                 }
 850
 851         }
 852 out_word4:
 853         if (word4_p)
 854                 *word4_p = word4;
 855         if (yuv_format_p)
 856                 *yuv_format_p = yuv_format;
 857         return result;
 858 out_unknown:
 859 //      R600_ERR("Unable to handle texformat %d %s\n", format, util_format_name(format));
 860         return ~0;
 861 }