Merge remote branch 'origin/master' into nv50-compiler
[mesa.git] / src / gallium / drivers / r600 / r700_asm.c
1 /*
2 * Copyright 2010 Jerome Glisse <glisse@freedesktop.org>
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
22 */
23 #include "r600_asm.h"
24 #include "r600_context.h"
25 #include "util/u_memory.h"
26 #include "r700_sq.h"
27 #include <stdio.h>
28
29 int r700_bc_alu_build(struct r600_bc *bc, struct r600_bc_alu *alu, unsigned id)
30 {
31 unsigned i;
32
33 /* don't replace gpr by pv or ps for destination register */
34 if (alu->is_op3) {
35 bc->bytecode[id++] = S_SQ_ALU_WORD0_SRC0_SEL(alu->src[0].sel) |
36 S_SQ_ALU_WORD0_SRC0_CHAN(alu->src[0].chan) |
37 S_SQ_ALU_WORD0_SRC1_SEL(alu->src[1].sel) |
38 S_SQ_ALU_WORD0_SRC1_CHAN(alu->src[1].chan) |
39 S_SQ_ALU_WORD0_LAST(alu->last);
40 bc->bytecode[id++] = S_SQ_ALU_WORD1_DST_GPR(alu->dst.sel) |
41 S_SQ_ALU_WORD1_DST_CHAN(alu->dst.chan) |
42 S_SQ_ALU_WORD1_OP3_SRC2_SEL(alu->src[2].sel) |
43 S_SQ_ALU_WORD1_OP3_SRC2_CHAN(alu->src[2].chan) |
44 S_SQ_ALU_WORD1_OP3_SRC2_NEG(alu->src[2].neg) |
45 S_SQ_ALU_WORD1_OP3_ALU_INST(alu->inst) |
46 S_SQ_ALU_WORD1_BANK_SWIZZLE(0);
47 } else {
48 bc->bytecode[id++] = S_SQ_ALU_WORD0_SRC0_SEL(alu->src[0].sel) |
49 S_SQ_ALU_WORD0_SRC0_CHAN(alu->src[0].chan) |
50 S_SQ_ALU_WORD0_SRC0_NEG(alu->src[0].neg) |
51 S_SQ_ALU_WORD0_SRC1_SEL(alu->src[1].sel) |
52 S_SQ_ALU_WORD0_SRC1_CHAN(alu->src[1].chan) |
53 S_SQ_ALU_WORD0_SRC1_NEG(alu->src[1].neg) |
54 S_SQ_ALU_WORD0_LAST(alu->last);
55 bc->bytecode[id++] = S_SQ_ALU_WORD1_DST_GPR(alu->dst.sel) |
56 S_SQ_ALU_WORD1_DST_CHAN(alu->dst.chan) |
57 S_SQ_ALU_WORD1_OP2_SRC0_ABS(alu->src[0].abs) |
58 S_SQ_ALU_WORD1_OP2_SRC1_ABS(alu->src[1].abs) |
59 S_SQ_ALU_WORD1_OP2_WRITE_MASK(alu->dst.write) |
60 S_SQ_ALU_WORD1_OP2_ALU_INST(alu->inst) |
61 S_SQ_ALU_WORD1_BANK_SWIZZLE(0);
62 }
63 if (alu->last) {
64 for (i = 0; i < alu->nliteral; i++) {
65 bc->bytecode[id++] = alu->value[i];
66 }
67 }
68 return 0;
69 }