src/gallium/drivers/r600/radeon.h

   1 /*
   2  * Copyright © 2009 Jerome Glisse <glisse@freedesktop.org>
   3  *
   4  * This file is free software; you can redistribute it and/or modify
   5  * it under the terms of version 2 of the GNU General Public License
   6  * as published by the Free Software Foundation.
   7  *
   8  * This program is distributed in the hope that it will be useful,
   9  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  10  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  11  * GNU General Public License for more details.
  12  *
  13  * You should have received a copy of the GNU General Public License
  14  * along with this program; if not, write to the Free Software Foundation,
  15  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA.
  16  */
  17 #ifndef RADEON_H
  18 #define RADEON_H
  19
  20 #define RADEON_CTX_MAX_PM4      (64 * 1024 / 4)
  21
  22 #include <stdint.h>
  23
  24 #include <pipe/p_compiler.h>
  25
  26 typedef uint64_t                u64;
  27 typedef uint32_t                u32;
  28 typedef uint16_t                u16;
  29 typedef uint8_t                 u8;
  30
  31 struct radeon;
  32
  33 enum radeon_family {
  34         CHIP_UNKNOWN,
  35         CHIP_R100,
  36         CHIP_RV100,
  37         CHIP_RS100,
  38         CHIP_RV200,
  39         CHIP_RS200,
  40         CHIP_R200,
  41         CHIP_RV250,
  42         CHIP_RS300,
  43         CHIP_RV280,
  44         CHIP_R300,
  45         CHIP_R350,
  46         CHIP_RV350,
  47         CHIP_RV380,
  48         CHIP_R420,
  49         CHIP_R423,
  50         CHIP_RV410,
  51         CHIP_RS400,
  52         CHIP_RS480,
  53         CHIP_RS600,
  54         CHIP_RS690,
  55         CHIP_RS740,
  56         CHIP_RV515,
  57         CHIP_R520,
  58         CHIP_RV530,
  59         CHIP_RV560,
  60         CHIP_RV570,
  61         CHIP_R580,
  62         CHIP_R600,
  63         CHIP_RV610,
  64         CHIP_RV630,
  65         CHIP_RV670,
  66         CHIP_RV620,
  67         CHIP_RV635,
  68         CHIP_RS780,
  69         CHIP_RS880,
  70         CHIP_RV770,
  71         CHIP_RV730,
  72         CHIP_RV710,
  73         CHIP_RV740,
  74         CHIP_CEDAR,
  75         CHIP_REDWOOD,
  76         CHIP_JUNIPER,
  77         CHIP_CYPRESS,
  78         CHIP_HEMLOCK,
  79         CHIP_LAST,
  80 };
  81
  82 enum {
  83         R600_SHADER_PS = 1,
  84         R600_SHADER_VS,
  85         R600_SHADER_GS,
  86         R600_SHADER_FS,
  87         R600_SHADER_MAX = R600_SHADER_FS,
  88 };
  89
  90 enum radeon_family radeon_get_family(struct radeon *rw);
  91 void radeon_set_mem_constant(struct radeon *radeon, boolean state);
  92
  93 /* lowlevel WS bo */
  94 struct radeon_ws_bo;
  95 struct radeon_ws_bo *radeon_ws_bo(struct radeon *radeon,
  96                                   unsigned size, unsigned alignment, unsigned usage);
  97 struct radeon_ws_bo *radeon_ws_bo_handle(struct radeon *radeon,
  98                                          unsigned handle);
  99 void *radeon_ws_bo_map(struct radeon *radeon, struct radeon_ws_bo *bo, unsigned usage, void *ctx);
 100 void radeon_ws_bo_unmap(struct radeon *radeon, struct radeon_ws_bo *bo);
 101 void radeon_ws_bo_reference(struct radeon *radeon, struct radeon_ws_bo **dst,
 102                             struct radeon_ws_bo *src);
 103
 104 struct radeon_stype_info;
 105 /*
 106  * states functions
 107  */
 108 struct radeon_state {
 109         struct radeon                   *radeon;
 110         unsigned                        refcount;
 111         struct radeon_stype_info        *stype;
 112         unsigned                        state_id;
 113         unsigned                        id;
 114         unsigned                        shader_index;
 115         unsigned                        nstates;
 116         u32                             states[64];
 117         unsigned                        npm4;
 118         unsigned                        cpm4;
 119         u32                             pm4_crc;
 120         u32                             pm4[128];
 121         unsigned                        nbo;
 122         struct radeon_ws_bo             *bo[4];
 123         unsigned                        nreloc;
 124         unsigned                        reloc_pm4_id[8];
 125         unsigned                        reloc_bo_id[8];
 126         u32                             placement[8];
 127         unsigned                        bo_dirty[4];
 128 };
 129
 130 int radeon_state_init(struct radeon_state *rstate, struct radeon *radeon, u32 type, u32 id, u32 shader_class);
 131 void radeon_state_fini(struct radeon_state *state);
 132 int radeon_state_pm4(struct radeon_state *state);
 133 int radeon_state_convert(struct radeon_state *state, u32 stype, u32 id, u32 shader_type);
 134
 135 /*
 136  * draw functions
 137  */
 138 struct radeon_draw {
 139         struct radeon                   *radeon;
 140         struct radeon_state             **state;
 141 };
 142
 143 int radeon_draw_init(struct radeon_draw *draw, struct radeon *radeon);
 144 void radeon_draw_bind(struct radeon_draw *draw, struct radeon_state *state);
 145 void radeon_draw_unbind(struct radeon_draw *draw, struct radeon_state *state);
 146
 147 /*
 148  * radeon context functions
 149  */
 150 #pragma pack(1)
 151 struct radeon_cs_reloc {
 152         uint32_t        handle;
 153         uint32_t        read_domain;
 154         uint32_t        write_domain;
 155         uint32_t        flags;
 156 };
 157 #pragma pack()
 158
 159 struct radeon_ctx;
 160
 161 struct radeon_ctx *radeon_ctx_init(struct radeon *radeon);
 162 void radeon_ctx_fini(struct radeon_ctx *ctx);
 163 void radeon_ctx_clear(struct radeon_ctx *ctx);
 164 int radeon_ctx_set_draw(struct radeon_ctx *ctx, struct radeon_draw *draw);
 165 int radeon_ctx_submit(struct radeon_ctx *ctx);
 166 void radeon_ctx_dump_bof(struct radeon_ctx *ctx, const char *file);
 167 int radeon_ctx_set_query_state(struct radeon_ctx *ctx, struct radeon_state *state);
 168
 169 /*
 170  * R600/R700
 171  */
 172
 173 enum r600_stype {
 174         R600_STATE_CONFIG,
 175         R600_STATE_CB_CNTL,
 176         R600_STATE_RASTERIZER,
 177         R600_STATE_VIEWPORT,
 178         R600_STATE_SCISSOR,
 179         R600_STATE_BLEND,
 180         R600_STATE_DSA,
 181         R600_STATE_SHADER,          /* has PS,VS,GS,FS variants */
 182         R600_STATE_CONSTANT,        /* has PS,VS,GS,FS variants */
 183         R600_STATE_CBUF,        /* has PS,VS,GS,FS variants */
 184         R600_STATE_RESOURCE,        /* has PS,VS,GS,FS variants */
 185         R600_STATE_SAMPLER,         /* has PS,VS,GS,FS variants */
 186         R600_STATE_SAMPLER_BORDER,  /* has PS,VS,GS,FS variants */
 187         R600_STATE_CB0,
 188         R600_STATE_CB1,
 189         R600_STATE_CB2,
 190         R600_STATE_CB3,
 191         R600_STATE_CB4,
 192         R600_STATE_CB5,
 193         R600_STATE_CB6,
 194         R600_STATE_CB7,
 195         R600_STATE_DB,
 196         R600_STATE_QUERY_BEGIN,
 197         R600_STATE_QUERY_END,
 198         R600_STATE_UCP,
 199         R600_STATE_VGT,
 200         R600_STATE_DRAW,
 201         R600_STATE_CB_FLUSH,
 202         R600_STATE_DB_FLUSH,
 203         R600_STATE_MAX,
 204 };
 205
 206 #include "r600_states_inc.h"
 207 #include "eg_states_inc.h"
 208
 209 /* R600 QUERY BEGIN/END */
 210 #define R600_QUERY__OFFSET                      0
 211 #define R600_QUERY_SIZE                         1
 212 #define R600_QUERY_PM4                          128
 213
 214 void r600_flush_ctx(void *data);
 215 #endif