src/gallium/drivers/r600/radeon_vce.c

   1 /**************************************************************************
   2  *
   3  * Copyright 2013 Advanced Micro Devices, Inc.
   4  * All Rights Reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sub license, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * The above copyright notice and this permission notice (including the
  15  * next paragraph) shall be included in all copies or substantial portions
  16  * of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  19  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  21  * IN NO EVENT SHALL THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR
  22  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  23  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  24  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25  *
  26  **************************************************************************/
  27
  28 /*
  29  * Authors:
  30  *      Christian König <christian.koenig@amd.com>
  31  *
  32  */
  33
  34 #include <stdio.h>
  35
  36 #include "pipe/p_video_codec.h"
  37
  38 #include "util/u_video.h"
  39 #include "util/u_memory.h"
  40
  41 #include "vl/vl_video_buffer.h"
  42
  43 #include "r600_pipe_common.h"
  44 #include "radeon_video.h"
  45 #include "radeon_vce.h"
  46
  47 #define FW_40_2_2 ((40 << 24) | (2 << 16) | (2 << 8))
  48 #define FW_50_0_1 ((50 << 24) | (0 << 16) | (1 << 8))
  49 #define FW_50_1_2 ((50 << 24) | (1 << 16) | (2 << 8))
  50 #define FW_50_10_2 ((50 << 24) | (10 << 16) | (2 << 8))
  51 #define FW_50_17_3 ((50 << 24) | (17 << 16) | (3 << 8))
  52 #define FW_52_0_3 ((52 << 24) | (0 << 16) | (3 << 8))
  53 #define FW_52_4_3 ((52 << 24) | (4 << 16) | (3 << 8))
  54 #define FW_52_8_3 ((52 << 24) | (8 << 16) | (3 << 8))
  55 #define FW_53 (53 << 24)
  56
  57 /**
  58  * flush commands to the hardware
  59  */
  60 static void flush(struct rvce_encoder *enc)
  61 {
  62         enc->ws->cs_flush(enc->cs, RADEON_FLUSH_ASYNC, NULL);
  63         enc->task_info_idx = 0;
  64         enc->bs_idx = 0;
  65 }
  66
  67 #if 0
  68 static void dump_feedback(struct rvce_encoder *enc, struct rvid_buffer *fb)
  69 {
  70         uint32_t *ptr = enc->ws->buffer_map(fb->res->buf, enc->cs, PIPE_TRANSFER_READ_WRITE);
  71         unsigned i = 0;
  72         fprintf(stderr, "\n");
  73         fprintf(stderr, "encStatus:\t\t\t%08x\n", ptr[i++]);
  74         fprintf(stderr, "encHasBitstream:\t\t%08x\n", ptr[i++]);
  75         fprintf(stderr, "encHasAudioBitstream:\t\t%08x\n", ptr[i++]);
  76         fprintf(stderr, "encBitstreamOffset:\t\t%08x\n", ptr[i++]);
  77         fprintf(stderr, "encBitstreamSize:\t\t%08x\n", ptr[i++]);
  78         fprintf(stderr, "encAudioBitstreamOffset:\t%08x\n", ptr[i++]);
  79         fprintf(stderr, "encAudioBitstreamSize:\t\t%08x\n", ptr[i++]);
  80         fprintf(stderr, "encExtrabytes:\t\t\t%08x\n", ptr[i++]);
  81         fprintf(stderr, "encAudioExtrabytes:\t\t%08x\n", ptr[i++]);
  82         fprintf(stderr, "videoTimeStamp:\t\t\t%08x\n", ptr[i++]);
  83         fprintf(stderr, "audioTimeStamp:\t\t\t%08x\n", ptr[i++]);
  84         fprintf(stderr, "videoOutputType:\t\t%08x\n", ptr[i++]);
  85         fprintf(stderr, "attributeFlags:\t\t\t%08x\n", ptr[i++]);
  86         fprintf(stderr, "seiPrivatePackageOffset:\t%08x\n", ptr[i++]);
  87         fprintf(stderr, "seiPrivatePackageSize:\t\t%08x\n", ptr[i++]);
  88         fprintf(stderr, "\n");
  89         enc->ws->buffer_unmap(fb->res->buf);
  90 }
  91 #endif
  92
  93 /**
  94  * reset the CPB handling
  95  */
  96 static void reset_cpb(struct rvce_encoder *enc)
  97 {
  98         unsigned i;
  99
 100         LIST_INITHEAD(&enc->cpb_slots);
 101         for (i = 0; i < enc->cpb_num; ++i) {
 102                 struct rvce_cpb_slot *slot = &enc->cpb_array[i];
 103                 slot->index = i;
 104                 slot->picture_type = PIPE_H264_ENC_PICTURE_TYPE_SKIP;
 105                 slot->frame_num = 0;
 106                 slot->pic_order_cnt = 0;
 107                 LIST_ADDTAIL(&slot->list, &enc->cpb_slots);
 108         }
 109 }
 110
 111 /**
 112  * sort l0 and l1 to the top of the list
 113  */
 114 static void sort_cpb(struct rvce_encoder *enc)
 115 {
 116         struct rvce_cpb_slot *i, *l0 = NULL, *l1 = NULL;
 117
 118         LIST_FOR_EACH_ENTRY(i, &enc->cpb_slots, list) {
 119                 if (i->frame_num == enc->pic.ref_idx_l0)
 120                         l0 = i;
 121
 122                 if (i->frame_num == enc->pic.ref_idx_l1)
 123                         l1 = i;
 124
 125                 if (enc->pic.picture_type == PIPE_H264_ENC_PICTURE_TYPE_P && l0)
 126                         break;
 127
 128                 if (enc->pic.picture_type == PIPE_H264_ENC_PICTURE_TYPE_B &&
 129                     l0 && l1)
 130                         break;
 131         }
 132
 133         if (l1) {
 134                 LIST_DEL(&l1->list);
 135                 LIST_ADD(&l1->list, &enc->cpb_slots);
 136         }
 137
 138         if (l0) {
 139                 LIST_DEL(&l0->list);
 140                 LIST_ADD(&l0->list, &enc->cpb_slots);
 141         }
 142 }
 143
 144 /**
 145  * get number of cpbs based on dpb
 146  */
 147 static unsigned get_cpb_num(struct rvce_encoder *enc)
 148 {
 149         unsigned w = align(enc->base.width, 16) / 16;
 150         unsigned h = align(enc->base.height, 16) / 16;
 151         unsigned dpb;
 152
 153         switch (enc->base.level) {
 154         case 10:
 155                 dpb = 396;
 156                 break;
 157         case 11:
 158                 dpb = 900;
 159                 break;
 160         case 12:
 161         case 13:
 162         case 20:
 163                 dpb = 2376;
 164                 break;
 165         case 21:
 166                 dpb = 4752;
 167                 break;
 168         case 22:
 169         case 30:
 170                 dpb = 8100;
 171                 break;
 172         case 31:
 173                 dpb = 18000;
 174                 break;
 175         case 32:
 176                 dpb = 20480;
 177                 break;
 178         case 40:
 179         case 41:
 180                 dpb = 32768;
 181                 break;
 182         case 42:
 183                 dpb = 34816;
 184                 break;
 185         case 50:
 186                 dpb = 110400;
 187                 break;
 188         default:
 189         case 51:
 190         case 52:
 191                 dpb = 184320;
 192                 break;
 193         }
 194
 195         return MIN2(dpb / (w * h), 16);
 196 }
 197
 198 /**
 199  * Get the slot for the currently encoded frame
 200  */
 201 struct rvce_cpb_slot *current_slot(struct rvce_encoder *enc)
 202 {
 203         return LIST_ENTRY(struct rvce_cpb_slot, enc->cpb_slots.prev, list);
 204 }
 205
 206 /**
 207  * Get the slot for L0
 208  */
 209 struct rvce_cpb_slot *l0_slot(struct rvce_encoder *enc)
 210 {
 211         return LIST_ENTRY(struct rvce_cpb_slot, enc->cpb_slots.next, list);
 212 }
 213
 214 /**
 215  * Get the slot for L1
 216  */
 217 struct rvce_cpb_slot *l1_slot(struct rvce_encoder *enc)
 218 {
 219         return LIST_ENTRY(struct rvce_cpb_slot, enc->cpb_slots.next->next, list);
 220 }
 221
 222 /**
 223  * Calculate the offsets into the CPB
 224  */
 225 void rvce_frame_offset(struct rvce_encoder *enc, struct rvce_cpb_slot *slot,
 226                        signed *luma_offset, signed *chroma_offset)
 227 {
 228         struct r600_common_screen *rscreen = (struct r600_common_screen *)enc->screen;
 229         unsigned pitch, vpitch, fsize;
 230
 231         if (rscreen->chip_class < GFX9) {
 232                 pitch = align(enc->luma->u.legacy.level[0].nblk_x * enc->luma->bpe, 128);
 233                 vpitch = align(enc->luma->u.legacy.level[0].nblk_y, 16);
 234         } else {
 235                 pitch = align(enc->luma->u.gfx9.surf_pitch * enc->luma->bpe, 256);
 236                 vpitch = align(enc->luma->u.gfx9.surf_height, 16);
 237         }
 238         fsize = pitch * (vpitch + vpitch / 2);
 239
 240         *luma_offset = slot->index * fsize;
 241         *chroma_offset = *luma_offset + pitch * vpitch;
 242 }
 243
 244 /**
 245  * destroy this video encoder
 246  */
 247 static void rvce_destroy(struct pipe_video_codec *encoder)
 248 {
 249         struct rvce_encoder *enc = (struct rvce_encoder*)encoder;
 250         if (enc->stream_handle) {
 251                 struct rvid_buffer fb;
 252                 rvid_create_buffer(enc->screen, &fb, 512, PIPE_USAGE_STAGING);
 253                 enc->fb = &fb;
 254                 enc->session(enc);
 255                 enc->feedback(enc);
 256                 enc->destroy(enc);
 257                 flush(enc);
 258                 rvid_destroy_buffer(&fb);
 259         }
 260         rvid_destroy_buffer(&enc->cpb);
 261         enc->ws->cs_destroy(enc->cs);
 262         FREE(enc->cpb_array);
 263         FREE(enc);
 264 }
 265
 266 static void rvce_begin_frame(struct pipe_video_codec *encoder,
 267                              struct pipe_video_buffer *source,
 268                              struct pipe_picture_desc *picture)
 269 {
 270         struct rvce_encoder *enc = (struct rvce_encoder*)encoder;
 271         struct vl_video_buffer *vid_buf = (struct vl_video_buffer *)source;
 272         struct pipe_h264_enc_picture_desc *pic = (struct pipe_h264_enc_picture_desc *)picture;
 273
 274         bool need_rate_control =
 275                 enc->pic.rate_ctrl.rate_ctrl_method != pic->rate_ctrl.rate_ctrl_method ||
 276                 enc->pic.quant_i_frames != pic->quant_i_frames ||
 277                 enc->pic.quant_p_frames != pic->quant_p_frames ||
 278                 enc->pic.quant_b_frames != pic->quant_b_frames;
 279
 280         enc->pic = *pic;
 281         get_pic_param(enc, pic);
 282
 283         enc->get_buffer(vid_buf->resources[0], &enc->handle, &enc->luma);
 284         enc->get_buffer(vid_buf->resources[1], NULL, &enc->chroma);
 285
 286         if (pic->picture_type == PIPE_H264_ENC_PICTURE_TYPE_IDR)
 287                 reset_cpb(enc);
 288         else if (pic->picture_type == PIPE_H264_ENC_PICTURE_TYPE_P ||
 289                  pic->picture_type == PIPE_H264_ENC_PICTURE_TYPE_B)
 290                 sort_cpb(enc);
 291
 292         if (!enc->stream_handle) {
 293                 struct rvid_buffer fb;
 294                 enc->stream_handle = rvid_alloc_stream_handle();
 295                 rvid_create_buffer(enc->screen, &fb, 512, PIPE_USAGE_STAGING);
 296                 enc->fb = &fb;
 297                 enc->session(enc);
 298                 enc->create(enc);
 299                 enc->config(enc);
 300                 enc->feedback(enc);
 301                 flush(enc);
 302                 //dump_feedback(enc, &fb);
 303                 rvid_destroy_buffer(&fb);
 304                 need_rate_control = false;
 305         }
 306
 307         if (need_rate_control) {
 308                 enc->session(enc);
 309                 enc->config(enc);
 310                 flush(enc);
 311         }
 312 }
 313
 314 static void rvce_encode_bitstream(struct pipe_video_codec *encoder,
 315                                   struct pipe_video_buffer *source,
 316                                   struct pipe_resource *destination,
 317                                   void **fb)
 318 {
 319         struct rvce_encoder *enc = (struct rvce_encoder*)encoder;
 320         enc->get_buffer(destination, &enc->bs_handle, NULL);
 321         enc->bs_size = destination->width0;
 322
 323         *fb = enc->fb = CALLOC_STRUCT(rvid_buffer);
 324         if (!rvid_create_buffer(enc->screen, enc->fb, 512, PIPE_USAGE_STAGING)) {
 325                 RVID_ERR("Can't create feedback buffer.\n");
 326                 return;
 327         }
 328         if (!radeon_emitted(enc->cs, 0))
 329                 enc->session(enc);
 330         enc->encode(enc);
 331         enc->feedback(enc);
 332 }
 333
 334 static void rvce_end_frame(struct pipe_video_codec *encoder,
 335                            struct pipe_video_buffer *source,
 336                            struct pipe_picture_desc *picture)
 337 {
 338         struct rvce_encoder *enc = (struct rvce_encoder*)encoder;
 339         struct rvce_cpb_slot *slot = LIST_ENTRY(
 340                 struct rvce_cpb_slot, enc->cpb_slots.prev, list);
 341
 342         if (!enc->dual_inst || enc->bs_idx > 1)
 343                 flush(enc);
 344
 345         /* update the CPB backtrack with the just encoded frame */
 346         slot->picture_type = enc->pic.picture_type;
 347         slot->frame_num = enc->pic.frame_num;
 348         slot->pic_order_cnt = enc->pic.pic_order_cnt;
 349         if (!enc->pic.not_referenced) {
 350                 LIST_DEL(&slot->list);
 351                 LIST_ADD(&slot->list, &enc->cpb_slots);
 352         }
 353 }
 354
 355 static void rvce_get_feedback(struct pipe_video_codec *encoder,
 356                               void *feedback, unsigned *size)
 357 {
 358         struct rvce_encoder *enc = (struct rvce_encoder*)encoder;
 359         struct rvid_buffer *fb = feedback;
 360
 361         if (size) {
 362                 uint32_t *ptr = enc->ws->buffer_map(fb->res->buf, enc->cs, PIPE_TRANSFER_READ_WRITE);
 363
 364                 if (ptr[1]) {
 365                         *size = ptr[4] - ptr[9];
 366                 } else {
 367                         *size = 0;
 368                 }
 369
 370                 enc->ws->buffer_unmap(fb->res->buf);
 371         }
 372         //dump_feedback(enc, fb);
 373         rvid_destroy_buffer(fb);
 374         FREE(fb);
 375 }
 376
 377 /**
 378  * flush any outstanding command buffers to the hardware
 379  */
 380 static void rvce_flush(struct pipe_video_codec *encoder)
 381 {
 382         struct rvce_encoder *enc = (struct rvce_encoder*)encoder;
 383
 384         flush(enc);
 385 }
 386
 387 static void rvce_cs_flush(void *ctx, unsigned flags,
 388                           struct pipe_fence_handle **fence)
 389 {
 390         // just ignored
 391 }
 392
 393 struct pipe_video_codec *rvce_create_encoder(struct pipe_context *context,
 394                                              const struct pipe_video_codec *templ,
 395                                              struct radeon_winsys* ws,
 396                                              rvce_get_buffer get_buffer)
 397 {
 398         struct r600_common_screen *rscreen = (struct r600_common_screen *)context->screen;
 399         struct r600_common_context *rctx = (struct r600_common_context*)context;
 400         struct rvce_encoder *enc;
 401         struct pipe_video_buffer *tmp_buf, templat = {};
 402         struct radeon_surf *tmp_surf;
 403         unsigned cpb_size;
 404
 405         if (!rscreen->info.vce_fw_version) {
 406                 RVID_ERR("Kernel doesn't supports VCE!\n");
 407                 return NULL;
 408
 409         } else if (!rvce_is_fw_version_supported(rscreen)) {
 410                 RVID_ERR("Unsupported VCE fw version loaded!\n");
 411                 return NULL;
 412         }
 413
 414         enc = CALLOC_STRUCT(rvce_encoder);
 415         if (!enc)
 416                 return NULL;
 417
 418         if (rscreen->info.drm_major == 3)
 419                 enc->use_vm = true;
 420         if ((rscreen->info.drm_major == 2 && rscreen->info.drm_minor >= 42) ||
 421             rscreen->info.drm_major == 3)
 422                 enc->use_vui = true;
 423         if (rscreen->info.family >= CHIP_TONGA &&
 424             rscreen->info.family != CHIP_STONEY &&
 425             rscreen->info.family != CHIP_POLARIS11 &&
 426             rscreen->info.family != CHIP_POLARIS12)
 427                 enc->dual_pipe = true;
 428         /* TODO enable B frame with dual instance */
 429         if ((rscreen->info.family >= CHIP_TONGA) &&
 430                 (templ->max_references == 1) &&
 431                 (rscreen->info.vce_harvest_config == 0))
 432                 enc->dual_inst = true;
 433
 434         enc->base = *templ;
 435         enc->base.context = context;
 436
 437         enc->base.destroy = rvce_destroy;
 438         enc->base.begin_frame = rvce_begin_frame;
 439         enc->base.encode_bitstream = rvce_encode_bitstream;
 440         enc->base.end_frame = rvce_end_frame;
 441         enc->base.flush = rvce_flush;
 442         enc->base.get_feedback = rvce_get_feedback;
 443         enc->get_buffer = get_buffer;
 444
 445         enc->screen = context->screen;
 446         enc->ws = ws;
 447         enc->cs = ws->cs_create(rctx->ctx, RING_VCE, rvce_cs_flush, enc);
 448         if (!enc->cs) {
 449                 RVID_ERR("Can't get command submission context.\n");
 450                 goto error;
 451         }
 452
 453         templat.buffer_format = PIPE_FORMAT_NV12;
 454         templat.chroma_format = PIPE_VIDEO_CHROMA_FORMAT_420;
 455         templat.width = enc->base.width;
 456         templat.height = enc->base.height;
 457         templat.interlaced = false;
 458         if (!(tmp_buf = context->create_video_buffer(context, &templat))) {
 459                 RVID_ERR("Can't create video buffer.\n");
 460                 goto error;
 461         }
 462
 463         enc->cpb_num = get_cpb_num(enc);
 464         if (!enc->cpb_num)
 465                 goto error;
 466
 467         get_buffer(((struct vl_video_buffer *)tmp_buf)->resources[0], NULL, &tmp_surf);
 468
 469         cpb_size = (rscreen->chip_class < GFX9) ?
 470                 align(tmp_surf->u.legacy.level[0].nblk_x * tmp_surf->bpe, 128) *
 471                 align(tmp_surf->u.legacy.level[0].nblk_y, 32) :
 472
 473                 align(tmp_surf->u.gfx9.surf_pitch * tmp_surf->bpe, 256) *
 474                 align(tmp_surf->u.gfx9.surf_height, 32);
 475
 476         cpb_size = cpb_size * 3 / 2;
 477         cpb_size = cpb_size * enc->cpb_num;
 478         if (enc->dual_pipe)
 479                 cpb_size +=  RVCE_MAX_AUX_BUFFER_NUM *
 480                         RVCE_MAX_BITSTREAM_OUTPUT_ROW_SIZE * 2;
 481         tmp_buf->destroy(tmp_buf);
 482         if (!rvid_create_buffer(enc->screen, &enc->cpb, cpb_size, PIPE_USAGE_DEFAULT)) {
 483                 RVID_ERR("Can't create CPB buffer.\n");
 484                 goto error;
 485         }
 486
 487         enc->cpb_array = CALLOC(enc->cpb_num, sizeof(struct rvce_cpb_slot));
 488         if (!enc->cpb_array)
 489                 goto error;
 490
 491         reset_cpb(enc);
 492
 493         goto error;
 494
 495         return &enc->base;
 496
 497 error:
 498         if (enc->cs)
 499                 enc->ws->cs_destroy(enc->cs);
 500
 501         rvid_destroy_buffer(&enc->cpb);
 502
 503         FREE(enc->cpb_array);
 504         FREE(enc);
 505         return NULL;
 506 }
 507
 508 /**
 509  * check if kernel has the right fw version loaded
 510  */
 511 bool rvce_is_fw_version_supported(struct r600_common_screen *rscreen)
 512 {
 513         switch (rscreen->info.vce_fw_version) {
 514         case FW_40_2_2:
 515         case FW_50_0_1:
 516         case FW_50_1_2:
 517         case FW_50_10_2:
 518         case FW_50_17_3:
 519         case FW_52_0_3:
 520         case FW_52_4_3:
 521         case FW_52_8_3:
 522                 return true;
 523         default:
 524                 if ((rscreen->info.vce_fw_version & (0xff << 24)) == FW_53)
 525                         return true;
 526                 else
 527                         return false;
 528         }
 529 }
 530
 531 /**
 532  * Add the buffer as relocation to the current command submission
 533  */
 534 void rvce_add_buffer(struct rvce_encoder *enc, struct pb_buffer *buf,
 535                      enum radeon_bo_usage usage, enum radeon_bo_domain domain,
 536                      signed offset)
 537 {
 538         int reloc_idx;
 539
 540         reloc_idx = enc->ws->cs_add_buffer(enc->cs, buf, usage | RADEON_USAGE_SYNCHRONIZED,
 541                                            domain, RADEON_PRIO_VCE);
 542         if (enc->use_vm) {
 543                 uint64_t addr;
 544                 addr = enc->ws->buffer_get_virtual_address(buf);
 545                 addr = addr + offset;
 546                 RVCE_CS(addr >> 32);
 547                 RVCE_CS(addr);
 548         } else {
 549                 offset += enc->ws->buffer_get_reloc_offset(buf);
 550                 RVCE_CS(reloc_idx * 4);
 551                 RVCE_CS(offset);
 552         }
 553 }