nir/opt_vectorize: Add a callback for filtering of vectorizing.
[mesa.git] / src / gallium / drivers / r600 / sfn / sfn_alu_defines.cpp
1 /* -*- mesa-c++ -*-
2 *
3 * Copyright (c) 2018 Collabora LTD
4 *
5 * Author: Gert Wollny <gert.wollny@collabora.com>
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a
8 * copy of this software and associated documentation files (the "Software"),
9 * to deal in the Software without restriction, including without limitation
10 * on the rights to use, copy, modify, merge, publish, distribute, sub
11 * license, and/or sell copies of the Software, and to permit persons to whom
12 * the Software is furnished to do so, subject to the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the next
15 * paragraph) shall be included in all copies or substantial portions of the
16 * Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
21 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
22 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
23 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
24 * USE OR OTHER DEALINGS IN THE SOFTWARE.
25 */
26
27 #include "sfn_alu_defines.h"
28
29 namespace r600 {
30
31 const std::map<EAluOp, AluOp> alu_ops = {
32 {op0_nop ,AluOp(0, 0, AluOp::a,"NOP")},
33 {op0_group_barrier ,AluOp(0, 0, AluOp::a,"GROUP_BARRIER")},
34 {op0_group_seq_begin ,AluOp(0, 0, AluOp::a,"GROUP_SEQ_BEGIN")},
35 {op0_group_seq_end ,AluOp(0, 0, AluOp::a,"GROUP_SEQ_END")},
36 {op0_pred_set_clr ,AluOp(0, 1, AluOp::a,"PRED_SET_CLR")},
37 {op0_store_flags ,AluOp(0, 0, AluOp::v,"STORE_FLAGS")},
38 {op0_lds_1a ,AluOp(0, 0, AluOp::v,"LDS_1A")},
39 {op0_lds_1a1d ,AluOp(0, 0, AluOp::v,"LDS_1A1D")},
40 {op0_lds_2a ,AluOp(0, 0, AluOp::v,"LDS_2A")},
41
42 {op1_bcnt_int ,AluOp(1, 0, AluOp::v,"BCNT_INT")},
43 {op1_bcnt_accum_prev_int ,AluOp(1, 0, AluOp::v,"BCNT_ACCUM_PREV_INT")},
44 {op1_bfrev_int ,AluOp(1, 0, AluOp::a,"BFREV_INT")},
45 {op1_ceil ,AluOp(1, 1, AluOp::a,"CEIL")},
46 {op1_cos ,AluOp(1, 1, AluOp::t,"COS")},
47 {op1_exp_ieee ,AluOp(1, 1, AluOp::t,"EXP_IEEE")},
48 {op1_floor ,AluOp(1, 1, AluOp::a,"FLOOR")},
49 {op1_flt_to_int ,AluOp(1, 0, AluOp::a,"FLT_TO_INT")},
50 {op1_flt_to_uint ,AluOp(1, 1, AluOp::t,"FLT_TO_UINT")},
51 {op1_flt_to_int_rpi ,AluOp(1, 1, AluOp::v,"FLT_TO_INT_RPI")},
52 {op1_flt_to_int_floor ,AluOp(1, 1, AluOp::v,"FLT_TO_INT_FLOOR")},
53 {op1_flt16_to_flt32 ,AluOp(1, 1, AluOp::v,"FLT16_TO_FLT32")},
54 {op1_flt32_to_flt16 ,AluOp(1, 1, AluOp::v,"FLT32_TO_FLT16")},
55 {op1_flt32_to_flt64 ,AluOp(1, 1, AluOp::v,"FLT32_TO_FLT64")},
56 {op1_flt64_to_flt32 ,AluOp(1, 1, AluOp::a,"FLT64_TO_FLT32")},
57 {op1_fract ,AluOp(1, 1, AluOp::a,"FRACT")},
58 {op1_fract_64 ,AluOp(1, 1, AluOp::v,"FRACT_64")},
59 {op1_frexp_64 ,AluOp(1, 1, AluOp::v,"FREXP_64")},
60 {op1_int_to_flt ,AluOp(1, 0, AluOp::t,"INT_TO_FLT")},
61 {op1_ldexp_64 ,AluOp(1, 1, AluOp::v,"LDEXP_64")},
62 {op1_interp_load_p0 ,AluOp(1, 1, AluOp::v,"INTERP_LOAD_P0")},
63 {op1_interp_load_p10 ,AluOp(1, 1, AluOp::v,"INTERP_LOAD_P10")},
64 {op1_interp_load_p20 ,AluOp(1, 1, AluOp::v,"INTERP_LOAD_P20")},
65 {op1_load_store_flags ,AluOp(1, 0, AluOp::v,"LOAD_STORE_FLAGS")},
66 {op1_log_clamped ,AluOp(1, 1, AluOp::t,"LOG_CLAMPED")},
67 {op1_log_ieee ,AluOp(1, 1, AluOp::t,"LOG_IEEE")},
68 {op1_max4 ,AluOp(1, 1, AluOp::v,"MAX4")},
69 {op1_mbcnt_32hi_int ,AluOp(1, 0, AluOp::v,"MBCNT_32HI_INT")},
70 {op1_mbcnt_32lo_accum_prev_int ,AluOp(1, 0, AluOp::v,"MBCNT_32LO_ACCUM_PREV_INT")},
71 {op1_mov ,AluOp(1, 0, AluOp::a,"MOV")},
72 {op1_mova_int ,AluOp(1, 0, AluOp::v,"MOVA_INT")},
73 {op1_not_int ,AluOp(1, 0, AluOp::a,"NOT_INT")},
74 {op1_offset_to_flt ,AluOp(1, 0, AluOp::v,"OFFSET_TO_FLT")},
75 {op1_pred_set_inv ,AluOp(1, 1, AluOp::a,"PRED_SET_INV")},
76 {op1_pred_set_restore ,AluOp(1, 1, AluOp::a,"PRED_SET_RESTORE")},
77 {op1_set_cf_idx0 ,AluOp(1, 0, AluOp::a,"SET_CF_IDX0")}, /* Reads from AR register? */
78 {op1_set_cf_idx1 ,AluOp(1, 0, AluOp::a,"SET_CF_IDX1")}, /* Reads from AR register? */
79 {op1_recip_clamped ,AluOp(1, 1, AluOp::t,"RECIP_CLAMPED")},
80 {op1_recip_ff ,AluOp(1, 1, AluOp::t,"RECIP_FF")},
81 {op1_recip_ieee ,AluOp(1, 1, AluOp::t,"RECIP_IEEE")},
82 {op1_recipsqrt_clamped ,AluOp(1, 1, AluOp::t,"RECIPSQRT_CLAMPED")},
83 {op1_recipsqrt_ff ,AluOp(1, 1, AluOp::t,"RECIPSQRT_FF")},
84 {op1_recipsqrt_ieee1 ,AluOp(1, 1, AluOp::t,"RECIPSQRT_IEEE")},
85 {op1_recip_int ,AluOp(1, 0, AluOp::t,"RECIP_INT")},
86 {op1_recip_uint ,AluOp(1, 0, AluOp::t,"RECIP_UINT")},
87 {op1_recip_64 ,AluOp(1, 1, AluOp::t,"RECIP_64")},
88 {op1_recip_clamped_64 ,AluOp(1, 1, AluOp::t,"RECIP_CLAMPED_64")},
89 {op1_recipsqrt_64 ,AluOp(1, 1, AluOp::t,"RECIPSQRT_64")},
90 {op1_recipsqrt_clamped_64,AluOp(1, 1, AluOp::t,"RECIPSQRT_CLAMPED_64")},
91 {op1_rndne ,AluOp(1, 1, AluOp::a,"RNDNE")},
92 {op1_sqrt_ieee ,AluOp(1, 1, AluOp::t,"SQRT_IEEE")},
93 {op1_sin ,AluOp(1, 1, AluOp::t,"SIN")},
94 {op1_trunc ,AluOp(1, 1, AluOp::a,"TRUNC")},
95 {op1_sqrt_64 ,AluOp(1, 1, AluOp::t,"SQRT_64")},
96 {op1_ubyte0_flt ,AluOp(1, 1, AluOp::v,"UBYTE0_FLT")},
97 {op1_ubyte1_flt ,AluOp(1, 1, AluOp::v,"UBYTE1_FLT")},
98 {op1_ubyte2_flt ,AluOp(1, 1, AluOp::v,"UBYTE2_FLT")},
99 {op1_ubyte3_flt ,AluOp(1, 1, AluOp::v,"UBYTE3_FLT")},
100 {op1_uint_to_flt ,AluOp(1, 0, AluOp::t,"UINT_TO_FLT")},
101 {op1_ffbh_uint ,AluOp(1, 0, AluOp::v,"FFBH_UINT")},
102 {op1_ffbl_int ,AluOp(1, 0, AluOp::v,"FFBL_INT")},
103 {op1_ffbh_int ,AluOp(1, 0, AluOp::v,"FFBH_INT")},
104 {op1_flt_to_uint4 ,AluOp(1, 1, AluOp::v,"FLT_TO_UINT4")},
105 {op1v_flt32_to_flt64 ,AluOp(1, 1, AluOp::a,"FLT32_TO_FLT64")},
106 {op1v_flt64_to_flt32 ,AluOp(1, 1, AluOp::v,"FLT64_TO_FLT32")},
107
108 {op2_add ,AluOp(2, 1, AluOp::a,"ADD")},
109 {op2_bfm_int ,AluOp(2, 0, AluOp::v,"BFM_INT")},
110 {op2_mul ,AluOp(2, 1, AluOp::a,"MUL")},
111 {op2_mul_ieee ,AluOp(2, 1, AluOp::a,"MUL_IEEE")},
112 {op2_max ,AluOp(2, 1, AluOp::a,"MAX")},
113 {op2_min ,AluOp(2, 1, AluOp::a,"MIN")},
114 {op2_max_dx10 ,AluOp(2, 1, AluOp::a,"MAX_DX10")},
115 {op2_min_dx10 ,AluOp(2, 1, AluOp::a,"MIN_DX10")},
116 {op2_sete ,AluOp(2, 1, AluOp::a,"SETE")},
117 {op2_setgt ,AluOp(2, 1, AluOp::a,"SETGT")},
118 {op2_setge ,AluOp(2, 1, AluOp::a,"SETGE")},
119 {op2_setne ,AluOp(2, 1, AluOp::a,"SETNE")},
120 {op2_sete_dx10 ,AluOp(2, 1, AluOp::a,"SETE_DX10")},
121 {op2_setgt_dx10 ,AluOp(2, 1, AluOp::a,"SETGT_DX10")},
122 {op2_setge_dx10 ,AluOp(2, 1, AluOp::a,"SETGE_DX10")},
123 {op2_setne_dx10 ,AluOp(2, 1, AluOp::a,"SETNE_DX10")},
124 {op2_ashr_int ,AluOp(2, 0, AluOp::a,"ASHR_INT")},
125 {op2_lshr_int ,AluOp(2, 0, AluOp::a,"LSHR_INT")},
126 {op2_lshl_int ,AluOp(2, 0, AluOp::a,"LSHL_INT")},
127 {op2_mul_64 ,AluOp(2, 1, AluOp::a,"MUL_64")},
128 {op2_pred_setgt_uint ,AluOp(2, 0, AluOp::a,"PRED_SETGT_UINT")},
129 {op2_pred_setge_uint ,AluOp(2, 0, AluOp::a,"PRED_SETGE_UINT")},
130 {op2_pred_sete ,AluOp(2, 1, AluOp::a,"PRED_SETE")},
131 {op2_pred_setgt ,AluOp(2, 1, AluOp::a,"PRED_SETGT")},
132 {op2_pred_setge ,AluOp(2, 1, AluOp::a,"PRED_SETGE")},
133 {op2_pred_setne ,AluOp(2, 1, AluOp::a,"PRED_SETNE")},
134 {op2_pred_set_pop ,AluOp(2, 1, AluOp::a,"PRED_SET_POP")},
135 {op2_pred_sete_push ,AluOp(2, 1, AluOp::a,"PRED_SETE_PUSH")},
136 {op2_pred_setgt_push ,AluOp(2, 1, AluOp::a,"PRED_SETGT_PUSH")},
137 {op2_pred_setge_push ,AluOp(2, 1, AluOp::a,"PRED_SETGE_PUSH")},
138 {op2_pred_setne_push ,AluOp(2, 1, AluOp::a,"PRED_SETNE_PUSH")},
139 {op2_kille ,AluOp(2, 1, AluOp::a,"KILLE")},
140 {op2_killgt ,AluOp(2, 1, AluOp::a,"KILLGT")},
141 {op2_killge ,AluOp(2, 1, AluOp::a,"KILLGE")},
142 {op2_killne ,AluOp(2, 1, AluOp::a,"KILLNE")},
143 {op2_and_int ,AluOp(2, 0, AluOp::a,"AND_INT")},
144 {op2_or_int ,AluOp(2, 0, AluOp::a,"OR_INT")},
145 {op2_xor_int ,AluOp(2, 0, AluOp::a,"XOR_INT")},
146 {op2_add_int ,AluOp(2, 0, AluOp::a,"ADD_INT")},
147 {op2_sub_int ,AluOp(2, 0, AluOp::a,"SUB_INT")},
148 {op2_max_int ,AluOp(2, 0, AluOp::a,"MAX_INT")},
149 {op2_min_int ,AluOp(2, 0, AluOp::a,"MIN_INT")},
150 {op2_max_uint ,AluOp(2, 0, AluOp::a,"MAX_UINT")},
151 {op2_min_uint ,AluOp(2, 0, AluOp::a,"MIN_UINT")},
152 {op2_sete_int ,AluOp(2, 0, AluOp::a,"SETE_INT")},
153 {op2_setgt_int ,AluOp(2, 0, AluOp::a,"SETGT_INT")},
154 {op2_setge_int ,AluOp(2, 0, AluOp::a,"SETGE_INT")},
155 {op2_setne_int ,AluOp(2, 0, AluOp::a,"SETNE_INT")},
156 {op2_setgt_uint ,AluOp(2, 0, AluOp::a,"SETGT_UINT")},
157 {op2_setge_uint ,AluOp(2, 0, AluOp::a,"SETGE_UINT")},
158 {op2_killgt_uint ,AluOp(2, 0, AluOp::a,"KILLGT_UINT")},
159 {op2_killge_uint ,AluOp(2, 0, AluOp::a,"KILLGE_UINT")},
160 {op2_prede_int ,AluOp(2, 0, AluOp::a,"PREDE_INT")},
161 {op2_pred_setgt_int ,AluOp(2, 0, AluOp::a,"PRED_SETGT_INT")},
162 {op2_pred_setge_int ,AluOp(2, 0, AluOp::a,"PRED_SETGE_INT")},
163 {op2_pred_setne_int ,AluOp(2, 0, AluOp::a,"PRED_SETNE_INT")},
164 {op2_kille_int ,AluOp(2, 0, AluOp::a,"KILLE_INT")},
165 {op2_killgt_int ,AluOp(2, 0, AluOp::a,"KILLGT_INT")},
166 {op2_killge_int ,AluOp(2, 0, AluOp::a,"KILLGE_INT")},
167 {op2_killne_int ,AluOp(2, 0, AluOp::a,"KILLNE_INT")},
168 {op2_pred_sete_push_int ,AluOp(2, 0, AluOp::a,"PRED_SETE_PUSH_INT")},
169 {op2_pred_setgt_push_int ,AluOp(2, 0, AluOp::a,"PRED_SETGT_PUSH_INT")},
170 {op2_pred_setge_push_int ,AluOp(2, 0, AluOp::a,"PRED_SETGE_PUSH_INT")},
171 {op2_pred_setne_push_int ,AluOp(2, 0, AluOp::a,"PRED_SETNE_PUSH_INT")},
172 {op2_pred_setlt_push_int ,AluOp(2, 0, AluOp::a,"PRED_SETLT_PUSH_INT")},
173 {op2_pred_setle_push_int ,AluOp(2, 0, AluOp::a,"PRED_SETLE_PUSH_INT")},
174 {op2_addc_uint ,AluOp(2, 0, AluOp::a,"ADDC_UINT")},
175 {op2_subb_uint ,AluOp(2, 0, AluOp::a,"SUBB_UINT")},
176 {op2_set_mode ,AluOp(2, 0, AluOp::a,"SET_MODE")},
177 {op2_set_lds_size ,AluOp(2, 0, AluOp::a,"SET_LDS_SIZE")},
178 {op2_mullo_int ,AluOp(2, 0, AluOp::t,"MULLO_INT")},
179 {op2_mulhi_int ,AluOp(2, 0, AluOp::t,"MULHI_INT")},
180 {op2_mullo_uint ,AluOp(2, 0, AluOp::t,"MULLO_UINT")},
181 {op2_mulhi_uint ,AluOp(2, 0, AluOp::t,"MULHI_UINT")},
182 {op2_dot_ieee ,AluOp(2, 1, AluOp::v,"DOT_IEEE")},
183 {op2_mulhi_uint24 ,AluOp(2, 0, AluOp::v,"MULHI_UINT24")},
184 {op2_mul_uint24 ,AluOp(2, 0, AluOp::v,"MUL_UINT24")},
185 {op2_sete_64 ,AluOp(2, 1, AluOp::v,"SETE_64")},
186 {op2_setne_64 ,AluOp(2, 1, AluOp::v,"SETNE_64")},
187 {op2_setgt_64 ,AluOp(2, 1, AluOp::v,"SETGT_64")},
188 {op2_setge_64 ,AluOp(2, 1, AluOp::v,"SETGE_64")},
189 {op2_min_64 ,AluOp(2, 1, AluOp::v,"MIN_64")},
190 {op2_max_64 ,AluOp(2, 1, AluOp::v,"MAX_64")},
191 {op2_dot4 ,AluOp(2, 1, AluOp::v,"DOT4")},
192 {op2_dot4_ieee ,AluOp(2, 1, AluOp::v,"DOT4_IEEE")},
193 {op2_cube ,AluOp(2, 1, AluOp::v,"CUBE")},
194 {op2_pred_setgt_64 ,AluOp(2, 1, AluOp::v,"PRED_SETGT_64")},
195 {op2_pred_sete_64 ,AluOp(2, 1, AluOp::v,"PRED_SETE_64")},
196 {op2_pred_setge_64 ,AluOp(2, 1, AluOp::v,"PRED_SETGE_64")},
197 {OP2V_MUL_64 ,AluOp(2, 1, AluOp::v,"MUL_64")},
198 {op2_add_64 ,AluOp(2, 1, AluOp::v,"ADD_64")},
199 {op2_sad_accum_prev_uint ,AluOp(2, 0, AluOp::v,"SAD_ACCUM_PREV_UINT")},
200 {op2_dot ,AluOp(2, 1, AluOp::v,"DOT")},
201 {op2_mul_prev ,AluOp(2, 1, AluOp::v,"MUL_PREV")},
202 {op2_mul_ieee_prev ,AluOp(2, 1, AluOp::v,"MUL_IEEE_PREV")},
203 {op2_add_prev ,AluOp(2, 1, AluOp::v,"ADD_PREV")},
204 {op2_muladd_prev ,AluOp(2, 1, AluOp::v,"MULADD_PREV")},
205 {op2_muladd_ieee_prev ,AluOp(2, 1, AluOp::v,"MULADD_IEEE_PREV")},
206 {op2_interp_xy ,AluOp(2, 1, AluOp::v,"INTERP_XY")},
207 {op2_interp_zw ,AluOp(2, 1, AluOp::v,"INTERP_ZW")},
208 {op2_interp_x ,AluOp(2, 1, AluOp::v,"INTERP_X")},
209 {op2_interp_z ,AluOp(2, 1, AluOp::v,"INTERP_Z")},
210
211 {op3_bfe_uint ,AluOp(3, 0, AluOp::v,"BFE_UINT")},
212 {op3_bfe_int ,AluOp(3, 0, AluOp::v,"BFE_INT")},
213 {op3_bfi_int ,AluOp(3, 0, AluOp::v,"BFI_INT")},
214 {op3_fma ,AluOp(3, 1, AluOp::v,"FMA")},
215 {op3_cndne_64 ,AluOp(3, 1, AluOp::v,"CNDNE_64")},
216 {op3_fma_64 ,AluOp(3, 1, AluOp::v,"FMA_64")},
217 {op3_lerp_uint ,AluOp(3, 0, AluOp::v,"LERP_UINT")},
218 {op3_bit_align_int ,AluOp(3, 0, AluOp::v,"BIT_ALIGN_INT")},
219 {op3_byte_align_int ,AluOp(3, 0, AluOp::v,"BYTE_ALIGN_INT")},
220 {op3_sad_accum_uint ,AluOp(3, 0, AluOp::v,"SAD_ACCUM_UINT")},
221 {op3_sad_accum_hi_uint ,AluOp(3, 0, AluOp::v,"SAD_ACCUM_HI_UINT")},
222 {op3_muladd_uint24 ,AluOp(3, 0, AluOp::v,"MULADD_UINT24")},
223 {op3_lds_idx_op ,AluOp(3, 0, AluOp::x,"LDS_IDX_OP")},
224 {op3_muladd ,AluOp(3, 1, AluOp::a,"MULADD")},
225 {op3_muladd_m2 ,AluOp(3, 1, AluOp::a,"MULADD_M2")},
226 {op3_muladd_m4 ,AluOp(3, 1, AluOp::a,"MULADD_M4")},
227 {op3_muladd_d2 ,AluOp(3, 1, AluOp::a,"MULADD_D2")},
228 {op3_muladd_ieee ,AluOp(3, 1, AluOp::a,"MULADD_IEEE")},
229 {op3_cnde ,AluOp(3, 1, AluOp::a,"CNDE")},
230 {op3_cndgt ,AluOp(3, 1, AluOp::a,"CNDGT")},
231 {op3_cndge ,AluOp(3, 1, AluOp::a,"CNDGE")},
232 {op3_cnde_int ,AluOp(3, 0, AluOp::a,"CNDE_INT")},
233 {op3_cndgt_int ,AluOp(3, 0, AluOp::a,"CNDGT_INT")},
234 {op3_cndge_int ,AluOp(3, 0, AluOp::a,"CNDGE_INT")},
235 {op3_mul_lit ,AluOp(3, 1, AluOp::t,"MUL_LIT")}
236 };
237
238 const std::map<AluInlineConstants, AluInlineConstantDescr> alu_src_const = {
239 {ALU_SRC_LDS_OQ_A, {false, "LDS_OQ_A"}},
240 {ALU_SRC_LDS_OQ_B, {false, "LDS_OQ_B"}},
241 {ALU_SRC_LDS_OQ_A_POP, {false, "LDS_OQ_A_POP"}},
242 {ALU_SRC_LDS_OQ_B_POP, {false, "LDS_OQ_B_POP"}},
243 {ALU_SRC_LDS_DIRECT_A, {false, "LDS_DIRECT_A"}},
244 {ALU_SRC_LDS_DIRECT_B, {false, "LDS_DIRECT_B"}},
245 {ALU_SRC_TIME_HI, {false, "TIME_HI"}},
246 {ALU_SRC_TIME_LO, {false, "TIME_LO"}},
247 {ALU_SRC_MASK_HI, {false, "MASK_HI"}},
248 {ALU_SRC_MASK_LO, {false, "MASK_LO"}},
249 {ALU_SRC_HW_WAVE_ID, {false, "HW_WAVE_ID"}},
250 {ALU_SRC_SIMD_ID, {false, "SIMD_ID"}},
251 {ALU_SRC_SE_ID, {false, "SE_ID"}},
252 {ALU_SRC_HW_THREADGRP_ID, {false, "HW_THREADGRP_ID"}},
253 {ALU_SRC_WAVE_ID_IN_GRP, {false, "WAVE_ID_IN_GRP"}},
254 {ALU_SRC_NUM_THREADGRP_WAVES, {false, "NUM_THREADGRP_WAVES"}},
255 {ALU_SRC_HW_ALU_ODD, {false, "HW_ALU_ODD"}},
256 {ALU_SRC_LOOP_IDX, {false, "LOOP_IDX"}},
257 {ALU_SRC_PARAM_BASE_ADDR, {false, "PARAM_BASE_ADDR"}},
258 {ALU_SRC_NEW_PRIM_MASK, {false, "NEW_PRIM_MASK"}},
259 {ALU_SRC_PRIM_MASK_HI, {false, "PRIM_MASK_HI"}},
260 {ALU_SRC_PRIM_MASK_LO, {false, "PRIM_MASK_LO"}},
261 {ALU_SRC_1_DBL_L, {false, "1.0L"}},
262 {ALU_SRC_1_DBL_M, {false, "1.0H"}},
263 {ALU_SRC_0_5_DBL_L, {false, "0.5L"}},
264 {ALU_SRC_0_5_DBL_M, {false, "0.5H"}},
265 {ALU_SRC_0, {false, "0"}},
266 {ALU_SRC_1, {false, "1.0"}},
267 {ALU_SRC_1_INT, {false, "1"}},
268 {ALU_SRC_M_1_INT, {false, "-1"}},
269 {ALU_SRC_0_5, {false, "0.5"}},
270 {ALU_SRC_LITERAL, {true, "ALU_SRC_LITERAL"}},
271 {ALU_SRC_PV, {true, "PV"}},
272 {ALU_SRC_PS, {false, "PS"}}
273 };
274
275 const std::map<ESDOp, LDSOp> lds_ops = {
276 {DS_OP_ADD , {2, "DS_ADD"}},
277 {DS_OP_SUB , {2, "DS_SUB"}},
278 {DS_OP_RSUB , {2, "DS_RSUB"}},
279 {DS_OP_INC , {2, "DS_INC"}},
280 {DS_OP_DEC , {2, "DS_DEC"}},
281 {DS_OP_MIN_INT , {2, "DS_MIN_INT"}},
282 {DS_OP_MAX_INT , {2, "DS_MAX_INT"}},
283 {DS_OP_MIN_UINT , {2, "DS_MIN_UINT"}},
284 {DS_OP_MAX_UINT , {2, "DS_MAX_UINT"}},
285 {DS_OP_AND , {2, "DS_AND"}},
286 {DS_OP_OR , {2, "DS_OR"}},
287 {DS_OP_XOR , {2, "DS_XOR"}},
288 {DS_OP_MSKOR , {3, "DS_MSKOR"}},
289 {DS_OP_WRITE , {2, "DS_WRITE"}},
290 {DS_OP_WRITE_REL , {3, "DS_WRITE_REL"}},
291 {DS_OP_WRITE2 , {3, "DS_WRITE2"}},
292 {DS_OP_CMP_STORE , {3, "DS_CMP_STORE"}},
293 {DS_OP_CMP_STORE_SPF , {3, "DS_CMP_STORE_SPF"}},
294 {DS_OP_BYTE_WRITE , {2, "DS_BYTE_WRITE"}},
295 {DS_OP_SHORT_WRITE , {2, "DS_SHORT_WRITE"}},
296 {DS_OP_ADD_RET , {2, "DS_ADD_RET"}},
297 {DS_OP_SUB_RET , {2, "DS_SUB_RET"}},
298 {DS_OP_RSUB_RET , {2, "DS_RSUB_RET"}},
299 {DS_OP_INC_RET , {2, "DS_INC_RET"}},
300 {DS_OP_DEC_RET , {2, "DS_DEC_RET"}},
301 {DS_OP_MIN_INT_RET , {2, "DS_MIN_INT_RET"}},
302 {DS_OP_MAX_INT_RET , {2, "DS_MAX_INT_RET"}},
303 {DS_OP_MIN_UINT_RET , {2, "DS_MIN_UINT_RET"}},
304 {DS_OP_MAX_UINT_RET , {2, "DS_MAX_UINT_RET"}},
305 {DS_OP_AND_RET , {2, "DS_AND_RET"}},
306 {DS_OP_OR_RET , {2, "DS_OR_RET"}},
307 {DS_OP_XOR_RET , {2, "DS_XOR_RET"}},
308 {DS_OP_MSKOR_RET , {3, "DS_MSKOR_RET"}},
309 {DS_OP_XCHG_RET , {2, "DS_XCHG_RET"}},
310 {DS_OP_XCHG_REL_RET , {3, "DS_XCHG_REL_RET"}},
311 {DS_OP_XCHG2_RET , {3, "DS_XCHG2_RET"}},
312 {DS_OP_CMP_XCHG_RET , {3, "DS_CMP_XCHG_RET"}},
313 {DS_OP_CMP_XCHG_SPF_RET, {3, "DS_CMP_XCHG_SPF_RET"}},
314 {DS_OP_READ_RET , {1, "DS_READ_RET"}},
315 {DS_OP_READ_REL_RET , {1, "DS_READ_REL_RET"}},
316 {DS_OP_READ2_RET , {2, "DS_READ2_RET"}},
317 {DS_OP_READWRITE_RET , {3, "DS_READWRITE_RET"}},
318 {DS_OP_BYTE_READ_RET , {1, "DS_BYTE_READ_RET"}},
319 {DS_OP_UBYTE_READ_RET, {1, "DS_UBYTE_READ_RET"}},
320 {DS_OP_SHORT_READ_RET, {1, "DS_SHORT_READ_RET"}},
321 {DS_OP_USHORT_READ_RET, {1, "DS_USHORT_READ_RET"}},
322 {DS_OP_ATOMIC_ORDERED_ALLOC_RET , {3, "DS_ATOMIC_ORDERED_ALLOC_RET"}}
323 };
324
325 }