src/gallium/drivers/r600/sfn/sfn_docu.txt

   1 # R600 shader from NIR
   2
   3 This code is an attempt to implement a NIR backend for r600.
   4
   5 ## State
   6
   7 piglits glsl-1.10 - 3.3 and gl-1.* gl-2.* and gl-3.* pass mostly like with TGSI, there are some fixes but
   8 also a few regressions.
   9
  10 ## Currently missing features w.r.t. TGSI:
  11
  12  - Tesselation shaders
  13  - compute shader support
  14  - image load/store
  15  - work group shared values
  16  - SSBO atomics
  17
  18 ## Needed optimizations:
  19
  20   - Register allocator and scheduler (Could the sb allocator and scheduler
  21     be ported?)
  22
  23   - peepholes:
  24     - compare + set predicate
  25
  26   - copy propagation:
  27     - Moves from inputs are usually not required, they could be forwarded
  28     - texture operations often move additional parameters in extra registers
  29       but they are actually needed in the same registes they come from and
  30       could just be swizzled into the right place
  31       (lower in NIR like it is done in e.g. in ETNAVIV)
  32
  33
  34 ## Problems
  35
  36 - figure out what is wrong with the textcoord semantics: disabling it results in
  37   varyings beyond the supporteed VAR31, and enabling it lets some shaders with
  38   VAR0 fail.
  39
  40 - UBOs have a strange behaviour: with
  41   glsl-1.50/uniform_buffer/gs-mat4x3.shader_test
  42   on TGSI we have
  43      ADD TEMP[1].xyz = CONST[1][0].xyzz CONST[1][1].xyzz
  44   with NIR we have
  45      vec4 ssa_12 = intrinsic load_ubo(_r600) (0, 0)(0 , 4 ,0)
  46      vec4 ssa_13 = intrinsic load_ubo(_r600) (0, 1)(0 , 4 ,0)
  47      vec3 ssa_14 = fadd ssa_12.xyw, ssa_13.xyw
  48   so why is the "w" component emitted?
  49
  50 ## Unknows
  51
  52 - multi-function shaders, how to deal with them? fp64 seems to have lots
  53   of them, one option is to inline them
  54
  55 - can type information from variables be harvested?
  56
  57 lowering passes in NIR:
  58   - TESS IO address evaluation should be lowered
  59
  60 ## Work plan
  61
  62 The idea is to create two conversions: a NIR to a new R600 IR that
  63 can be  used to run some finalizing optimizations (replacing the
  64 need for r600/sb) and the binary code generation.
  65
  66 The implementation uses C++ to separate the code for the different
  67 shader types and the byte code generation backends. The initial attempt
  68 will use the already available r600_asm code
  69