r600/sfn: Make 3vec loads skip possible moves
[mesa.git] / src / gallium / drivers / r600 / sfn / sfn_emitaluinstruction.h
1 /* -*- mesa-c++ -*-
2 *
3 * Copyright (c) 2018-2019 Collabora LTD
4 *
5 * Author: Gert Wollny <gert.wollny@collabora.com>
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a
8 * copy of this software and associated documentation files (the "Software"),
9 * to deal in the Software without restriction, including without limitation
10 * on the rights to use, copy, modify, merge, publish, distribute, sub
11 * license, and/or sell copies of the Software, and to permit persons to whom
12 * the Software is furnished to do so, subject to the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the next
15 * paragraph) shall be included in all copies or substantial portions of the
16 * Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
21 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
22 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
23 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
24 * USE OR OTHER DEALINGS IN THE SOFTWARE.
25 */
26
27 #ifndef SFN_EMITALUINSTRUCTION_H
28 #define SFN_EMITALUINSTRUCTION_H
29
30 #include "sfn_emitinstruction.h"
31
32 #include "sfn_alu_defines.h"
33 #include "sfn_instruction_alu.h"
34 #include "sfn_instruction_tex.h"
35
36 namespace r600 {
37
38
39 class EmitAluInstruction : public EmitInstruction
40 {
41 public:
42 EmitAluInstruction(ShaderFromNirProcessor& processor);
43
44 private:
45
46 enum AluOp2Opts {
47 op2_opt_none = 0,
48 op2_opt_reverse = 1,
49 op2_opt_neg_src1 = 1 << 1
50 };
51
52 bool do_emit(nir_instr* instr) override;
53
54 void split_constants(const nir_alu_instr& instr);
55
56 bool emit_mov(const nir_alu_instr& instr);
57 bool emit_alu_op1(const nir_alu_instr& instr, EAluOp opcode, const AluOpFlags &flags = 0);
58 bool emit_alu_op2(const nir_alu_instr& instr, EAluOp opcode, AluOp2Opts ops = op2_opt_none);
59 bool emit_alu_op2_split_src_mods(const nir_alu_instr& instr, EAluOp opcode, AluOp2Opts ops = op2_opt_none);
60
61 bool emit_alu_trans_op2(const nir_alu_instr& instr, EAluOp opcode);
62
63 bool emit_alu_inot(const nir_alu_instr& instr);
64 bool emit_alu_iabs(const nir_alu_instr& instr);
65 bool emit_alu_ineg(const nir_alu_instr& instr);
66 bool emit_alu_isign(const nir_alu_instr& instr);
67 bool emit_alu_div_int(const nir_alu_instr& instr, bool use_signed, bool mod);
68 bool emit_alu_op2_int(const nir_alu_instr& instr, EAluOp opcode, AluOp2Opts ops = op2_opt_none);
69
70 bool emit_alu_op3(const nir_alu_instr& instr, EAluOp opcode, std::array<uint8_t, 3> reorder={0,1,2});
71 bool emit_alu_trans_op1(const nir_alu_instr& instr, EAluOp opcode, bool absolute = false);
72 bool emit_alu_trig_op1(const nir_alu_instr& instr, EAluOp opcode);
73
74 bool emit_alu_b2f(const nir_alu_instr& instr);
75 bool emit_alu_i2orf2_b1(const nir_alu_instr& instr, EAluOp op);
76 bool emit_dot(const nir_alu_instr& instr, int n);
77 bool emit_fsign(const nir_alu_instr& instr);
78 bool emit_create_vec(const nir_alu_instr& instr, unsigned nc);
79 bool emit_any_all_icomp(const nir_alu_instr& instr, EAluOp op, unsigned nc, bool all);
80 bool emit_any_iequal(const nir_alu_instr& instr, unsigned nc);
81
82 bool emit_any_all_fcomp(const nir_alu_instr& instr, EAluOp op, unsigned nc, bool all);
83 bool emit_any_all_fcomp2(const nir_alu_instr& instr, EAluOp op, bool all);
84
85 bool emit_fdph(const nir_alu_instr &instr);
86 bool emit_discard_if(const nir_intrinsic_instr *instr);
87
88 bool emit_find_msb(const nir_alu_instr& instr, bool sgn);
89 bool emit_b2i32(const nir_alu_instr& instr);
90 bool emit_alu_f2i32_or_u32(const nir_alu_instr& instr, EAluOp op);
91 bool emit_pack_64_2x32_split(const nir_alu_instr& instr);
92 bool emit_unpack_64_2x32_split(const nir_alu_instr& instr, unsigned comp);
93
94 bool emit_tex_fdd(const nir_alu_instr& instr, TexInstruction::Opcode op, bool fine);
95 bool emit_bitfield_extract(const nir_alu_instr& instr, EAluOp opcode);
96 bool emit_bitfield_insert(const nir_alu_instr& instr);
97 bool emit_unpack_32_2x16_split_y(const nir_alu_instr& instr);
98 bool emit_unpack_32_2x16_split_x(const nir_alu_instr& instr);
99 bool emit_pack_32_2x16_split(const nir_alu_instr& instr);
100
101 private:
102 void make_last(AluInstruction *ir) const;
103 void split_alu_modifiers(const nir_alu_src &src, GPRVector::Values& s, GPRVector::Values& v, int ncomp);
104
105 using vreg = std::array<PValue, 4>;
106
107 };
108
109 inline void EmitAluInstruction::make_last(AluInstruction *ir) const
110 {
111 if (ir)
112 ir->set_flag(alu_last_instr);
113 }
114
115 }
116
117 #endif // SFN_EMITALUINSTRUCTION_H