r600/sfn: Add tesselation shaders
[mesa.git] / src / gallium / drivers / r600 / sfn / sfn_emitinstruction.h
1 /* -*- mesa-c++ -*-
2 *
3 * Copyright (c) 2018-2019 Collabora LTD
4 *
5 * Author: Gert Wollny <gert.wollny@collabora.com>
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a
8 * copy of this software and associated documentation files (the "Software"),
9 * to deal in the Software without restriction, including without limitation
10 * on the rights to use, copy, modify, merge, publish, distribute, sub
11 * license, and/or sell copies of the Software, and to permit persons to whom
12 * the Software is furnished to do so, subject to the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the next
15 * paragraph) shall be included in all copies or substantial portions of the
16 * Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
21 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
22 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
23 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
24 * USE OR OTHER DEALINGS IN THE SOFTWARE.
25 */
26
27 #ifndef EMITINSTRUCTION_H
28 #define EMITINSTRUCTION_H
29
30 #include "compiler/nir/nir.h"
31 #include "sfn_value.h"
32 #include "sfn_instruction_alu.h"
33
34 namespace r600 {
35
36 class ShaderFromNirProcessor;
37
38 class EmitInstruction
39 {
40 public:
41 EmitInstruction(ShaderFromNirProcessor& processor);
42 virtual ~EmitInstruction();
43 bool emit(nir_instr* instr);
44
45 static const std::set<AluModifiers> empty;
46 static const std::set<AluModifiers> write;
47 static const std::set<AluModifiers> last_write;
48 static const std::set<AluModifiers> last;
49
50 protected:
51 virtual bool do_emit(nir_instr* instr) = 0;
52
53 // forwards from ValuePool
54 PValue from_nir(const nir_src& v, unsigned component, unsigned swizzled);
55 PValue from_nir(const nir_src& v, unsigned component);
56 PValue from_nir(const nir_alu_src& v, unsigned component);
57 PValue from_nir(const nir_tex_src& v, unsigned component);
58 PValue from_nir(const nir_alu_dest& v, unsigned component);
59 PValue from_nir(const nir_dest& v, unsigned component);
60
61 const nir_load_const_instr* get_literal_register(const nir_src& src) const;
62
63 int lookup_register_index(const nir_src& src) const;
64 int lookup_register_index(const nir_dest& dst);
65 PValue create_register_from_nir_src(const nir_src& src, unsigned comp);
66
67 int allocate_temp_register();
68
69 PValue get_temp_register();
70 GPRVector get_temp_vec4();
71
72 // forwards from ShaderFromNirProcessor
73 void emit_instruction(Instruction *ir);
74 bool emit_instruction(EAluOp opcode, PValue dest,
75 std::vector<PValue> src0,
76 const std::set<AluModifiers>& m_flags);
77
78 PValue from_nir_with_fetch_constant(const nir_src& src, unsigned component);
79 GPRVector *vec_from_nir_with_fetch_constant(const nir_src& src, unsigned mask,
80 const GPRVector::Swizzle& swizzle);
81
82 void load_uniform(const nir_alu_src& src);
83 const nir_variable *get_deref_location(const nir_src& v) const;
84
85
86
87 private:
88
89 ShaderFromNirProcessor& m_proc;
90 };
91
92 }
93
94
95
96 #endif // EMITINSTRUCTION_H