3 * Copyright (c) 2019 Collabora LTD
5 * Author: Gert Wollny <gert.wollny@collabora.com>
7 * Permission is hereby granted, free of charge, to any person obtaining a
8 * copy of this software and associated documentation files (the "Software"),
9 * to deal in the Software without restriction, including without limitation
10 * on the rights to use, copy, modify, merge, publish, distribute, sub
11 * license, and/or sell copies of the Software, and to permit persons to whom
12 * the Software is furnished to do so, subject to the following conditions:
14 * The above copyright notice and this permission notice (including the next
15 * paragraph) shall be included in all copies or substantial portions of the
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
21 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
22 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
23 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
24 * USE OR OTHER DEALINGS IN THE SOFTWARE.
31 #include "nir_builder.h"
34 #include "sfn_shader_base.h"
39 bool r600_nir_lower_pack_unpack_2x16(nir_shader
*shader
);
41 bool r600_lower_scratch_addresses(nir_shader
*shader
);
43 bool r600_lower_ubo_to_align16(nir_shader
*shader
);
47 std::vector
<InstructionBlock
>& m_ir
;
56 unsigned ninputs() const;
58 bool lower(const nir_shader
*shader
, r600_pipe_shader
*sh
,
59 r600_pipe_shader_selector
*sel
, r600_shader_key
&key
,
60 r600_shader
*gs_shader
, enum chip_class chip_class
);
62 bool process_declaration();
64 pipe_shader_type
processor_type() const;
66 bool emit_instruction(nir_instr
*instr
);
68 const std::vector
<InstructionBlock
> &shader_ir() const;
70 Shader
shader() const;
74 bool process_cf_node(nir_cf_node
*node
);
75 bool process_if(nir_if
*node
);
76 bool process_loop(nir_loop
*node
);
77 bool process_block(nir_block
*node
);
79 std::unique_ptr
<ShaderFromNirProcessor
> impl
;
82 enum chip_class chip_class
;
84 int m_current_loop_id
;
85 std::stack
<int> m_if_stack
;
89 class AssemblyFromShader
{
91 virtual ~AssemblyFromShader();
92 bool lower(const std::vector
<InstructionBlock
> &ir
);
94 virtual bool do_lower(const std::vector
<InstructionBlock
>& ir
) = 0 ;
101 static inline nir_ssa_def
*
102 r600_imm_ivec3(nir_builder
*build
, int x
, int y
, int z
)
104 nir_const_value v
[3] = {
105 nir_const_value_for_int(x
, 32),
106 nir_const_value_for_int(y
, 32),
107 nir_const_value_for_int(z
, 32),
110 return nir_build_imm(build
, 3, 32, v
);
113 bool r600_lower_tess_io(nir_shader
*shader
, enum pipe_prim_type prim_type
);
114 bool r600_append_tcs_TF_emission(nir_shader
*shader
, enum pipe_prim_type prim_type
);
120 bool r600_vectorize_vs_inputs(nir_shader
*shader
);
123 int r600_shader_from_nir(struct r600_context
*rctx
,
124 struct r600_pipe_shader
*pipeshader
,
125 union r600_shader_key
*key
);