src/gallium/drivers/r600/sfn/sfn_shader_base.h

   1 /* -*- mesa-c++  -*-
   2  *
   3  * Copyright (c) 2019 Collabora LTD
   4  *
   5  * Author: Gert Wollny <gert.wollny@collabora.com>
   6  *
   7  * Permission is hereby granted, free of charge, to any person obtaining a
   8  * copy of this software and associated documentation files (the "Software"),
   9  * to deal in the Software without restriction, including without limitation
  10  * on the rights to use, copy, modify, merge, publish, distribute, sub
  11  * license, and/or sell copies of the Software, and to permit persons to whom
  12  * the Software is furnished to do so, subject to the following conditions:
  13  *
  14  * The above copyright notice and this permission notice (including the next
  15  * paragraph) shall be included in all copies or substantial portions of the
  16  * Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  19  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  20  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  21  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  22  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  23  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  24  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  25  */
  26
  27 #ifndef sfn_shader_from_nir_h
  28 #define sfn_shader_from_nir_h
  29
  30
  31 #include "gallium/drivers/r600/r600_shader.h"
  32
  33 #include "compiler/nir/nir.h"
  34 #include "compiler/nir_types.h"
  35
  36 #include "sfn_instruction_block.h"
  37 #include "sfn_instruction_export.h"
  38 #include "sfn_alu_defines.h"
  39 #include "sfn_valuepool.h"
  40 #include "sfn_debug.h"
  41 #include "sfn_instruction_cf.h"
  42 #include "sfn_emittexinstruction.h"
  43 #include "sfn_emitaluinstruction.h"
  44 #include "sfn_emitssboinstruction.h"
  45
  46 #include <vector>
  47 #include <set>
  48 #include <stack>
  49
  50 struct nir_instr;
  51
  52 namespace r600 {
  53
  54 extern SfnLog sfn_log;
  55
  56 class ShaderFromNirProcessor : public ValuePool {
  57 public:
  58    ShaderFromNirProcessor(pipe_shader_type ptype, r600_pipe_shader_selector& sel,
  59                           r600_shader& sh_info, int scratch_size, enum chip_class _chip_class,
  60                           int atomic_base);
  61    virtual ~ShaderFromNirProcessor();
  62
  63    void emit_instruction(Instruction *ir);
  64
  65    PValue from_nir_with_fetch_constant(const nir_src& src, unsigned component, int channel = -1);
  66    GPRVector vec_from_nir_with_fetch_constant(const nir_src& src, unsigned mask,
  67                                               const GPRVector::Swizzle& swizzle, bool match = false);
  68
  69    bool emit_instruction(EAluOp opcode, PValue dest,
  70                          std::vector<PValue> src0,
  71                          const std::set<AluModifiers>& m_flags);
  72    void emit_export_instruction(WriteoutInstruction *ir);
  73
  74    void split_constants(nir_alu_instr* instr);
  75    void load_uniform(const nir_alu_src& src);
  76
  77    void remap_registers();
  78
  79    const nir_variable *get_deref_location(const nir_src& src) const;
  80
  81    r600_shader& sh_info() {return m_sh_info;}
  82    void add_param_output_reg(int loc, const GPRVector *gpr);
  83    void set_output(unsigned pos, int sel);
  84    const GPRVector *output_register(unsigned location) const;
  85    void evaluate_spi_sid(r600_shader_io &io);
  86
  87    enum chip_class get_chip_class() const;
  88 protected:
  89
  90    void set_var_address(nir_deref_instr *instr);
  91    void set_input(unsigned pos, PValue var);
  92
  93    bool scan_instruction(nir_instr *instr);
  94
  95    virtual bool scan_sysvalue_access(nir_instr *instr) = 0;
  96
  97    bool emit_if_start(int if_id, nir_if *if_stmt);
  98    bool emit_else_start(int if_id);
  99    bool emit_ifelse_end(int if_id);
 100
 101    bool emit_loop_start(int loop_id);
 102    bool emit_loop_end(int loop_id);
 103    bool emit_jump_instruction(nir_jump_instr *instr);
 104
 105    bool emit_load_tcs_param_base(nir_intrinsic_instr* instr, int offset);
 106    bool emit_load_local_shared(nir_intrinsic_instr* instr);
 107    bool emit_store_local_shared(nir_intrinsic_instr* instr);
 108    bool emit_atomic_local_shared(nir_intrinsic_instr* instr);
 109
 110    bool emit_barrier(nir_intrinsic_instr* instr);
 111
 112    bool load_preloaded_value(const nir_dest& dest, int chan, PValue value,
 113                              bool as_last = true);
 114
 115    void inc_atomic_file_count();
 116
 117    enum ESlots {
 118       es_face,
 119       es_instanceid,
 120       es_invocation_id,
 121       es_patch_id,
 122       es_pos,
 123       es_rel_patch_id,
 124       es_sample_mask_in,
 125       es_sample_id,
 126       es_sample_pos,
 127       es_tess_factor_base,
 128       es_vertexid,
 129       es_tess_coord,
 130       es_primitive_id,
 131       es_last
 132    };
 133
 134    std::bitset<es_last> m_sv_values;
 135
 136    bool allocate_reserved_registers();
 137
 138 private:
 139    virtual bool do_allocate_reserved_registers() = 0;
 140
 141    bool emit_alu_instruction(nir_instr *instr);
 142    bool emit_deref_instruction(nir_deref_instr* instr);
 143    bool emit_intrinsic_instruction(nir_intrinsic_instr* instr);
 144    virtual bool emit_intrinsic_instruction_override(nir_intrinsic_instr* instr);
 145    bool emit_tex_instruction(nir_instr* instr);
 146    bool emit_discard_if(nir_intrinsic_instr* instr);
 147    bool emit_load_ubo(nir_intrinsic_instr* instr);
 148    bool emit_ssbo_atomic_add(nir_intrinsic_instr* instr);
 149    bool load_uniform_indirect(nir_intrinsic_instr* instr, PValue addr, int offest, int bufid);
 150
 151    /* Code creating functions */
 152    bool emit_load_input_deref(const nir_variable *var, nir_intrinsic_instr* instr);
 153    bool emit_load_function_temp(const nir_variable *var, nir_intrinsic_instr *instr);
 154    AluInstruction *emit_load_literal(const nir_load_const_instr *literal, const nir_src& src, unsigned writemask);
 155
 156    bool emit_store_deref(nir_intrinsic_instr* instr);
 157
 158    bool reserve_uniform(nir_intrinsic_instr* instr);
 159    bool process_uniforms(nir_variable *uniform);
 160    bool process_inputs(nir_variable *input);
 161    bool process_outputs(nir_variable *output);
 162
 163    void add_array_deref(nir_deref_instr* instr);
 164
 165    void append_block(int nesting_change);
 166
 167    virtual void emit_shader_start();
 168    virtual bool emit_deref_instruction_override(nir_deref_instr* instr);
 169    virtual bool do_process_inputs(nir_variable *input) = 0;
 170    virtual bool do_process_outputs(nir_variable *output) = 0;
 171    virtual bool do_emit_load_deref(const nir_variable *in_var, nir_intrinsic_instr* instr) = 0;
 172    virtual bool do_emit_store_deref(const nir_variable *out_var, nir_intrinsic_instr* instr) = 0;
 173
 174    bool emit_store_scratch(nir_intrinsic_instr* instr);
 175    bool emit_load_scratch(nir_intrinsic_instr* instr);
 176    virtual void do_finalize() = 0;
 177
 178    void finalize();
 179    friend class ShaderFromNir;
 180
 181    std::set<nir_variable*> m_arrays;
 182
 183    std::map<unsigned, PValue> m_inputs;
 184    std::map<unsigned, int> m_outputs;
 185
 186    std::map<unsigned, nir_variable*> m_var_derefs;
 187    std::map<const nir_variable *, nir_variable_mode> m_var_mode;
 188
 189    std::map<unsigned, const glsl_type*>  m_uniform_type_map;
 190    std::map<int, IfElseInstruction *> m_if_block_start_map;
 191    std::map<int, LoopBeginInstruction *> m_loop_begin_block_map;
 192
 193    pipe_shader_type m_processor_type;
 194
 195    std::vector<InstructionBlock> m_output;
 196    unsigned m_nesting_depth;
 197    unsigned m_block_number;
 198    InstructionBlock m_export_output;
 199    r600_shader& m_sh_info;
 200    enum chip_class m_chip_class;
 201    EmitTexInstruction m_tex_instr;
 202    EmitAluInstruction m_alu_instr;
 203    EmitSSBOInstruction m_ssbo_instr;
 204    OutputRegisterMap m_output_register_map;
 205
 206    IfElseInstruction *m_pending_else;
 207    int m_scratch_size;
 208    int m_next_hwatomic_loc;
 209
 210    r600_pipe_shader_selector& m_sel;
 211    int m_atomic_base ;
 212    int m_image_count;
 213 };
 214
 215 }
 216
 217 #endif