3 * Copyright (c) 2019 Collabora LTD
5 * Author: Gert Wollny <gert.wollny@collabora.com>
7 * Permission is hereby granted, free of charge, to any person obtaining a
8 * copy of this software and associated documentation files (the "Software"),
9 * to deal in the Software without restriction, including without limitation
10 * on the rights to use, copy, modify, merge, publish, distribute, sub
11 * license, and/or sell copies of the Software, and to permit persons to whom
12 * the Software is furnished to do so, subject to the following conditions:
14 * The above copyright notice and this permission notice (including the next
15 * paragraph) shall be included in all copies or substantial portions of the
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
21 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
22 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
23 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
24 * USE OR OTHER DEALINGS IN THE SOFTWARE.
27 #ifndef sfn_shader_from_nir_h
28 #define sfn_shader_from_nir_h
31 #include "gallium/drivers/r600/r600_shader.h"
33 #include "compiler/nir/nir.h"
34 #include "compiler/nir_types.h"
36 #include "sfn_instruction_export.h"
37 #include "sfn_alu_defines.h"
38 #include "sfn_valuepool.h"
39 #include "sfn_debug.h"
40 #include "sfn_instruction_cf.h"
41 #include "sfn_emittexinstruction.h"
42 #include "sfn_emitaluinstruction.h"
52 extern SfnLog sfn_log
;
54 class ShaderFromNirProcessor
: public ValuePool
{
56 ShaderFromNirProcessor(pipe_shader_type ptype
, r600_pipe_shader_selector
& sel
,
57 r600_shader
& sh_info
);
58 virtual ~ShaderFromNirProcessor();
60 void emit_instruction(Instruction
*ir
);
62 PValue
from_nir_with_fetch_constant(const nir_src
& src
, unsigned component
);
63 GPRVector
*vec_from_nir_with_fetch_constant(const nir_src
& src
, unsigned mask
,
64 const GPRVector::Swizzle
& swizzle
);
66 bool emit_instruction(EAluOp opcode
, PValue dest
,
67 std::vector
<PValue
> src0
,
68 const std::set
<AluModifiers
>& m_flags
);
69 void emit_export_instruction(WriteoutInstruction
*ir
);
71 void split_constants(nir_alu_instr
* instr
);
72 void load_uniform(const nir_alu_src
& src
);
74 const nir_variable
*get_deref_location(const nir_src
& src
) const;
77 void set_var_address(nir_deref_instr
*instr
);
78 void set_input(unsigned pos
, PValue var
);
79 void set_output(unsigned pos
, PValue var
);
81 void evaluate_spi_sid(r600_shader_io
&io
);
83 r600_shader
& sh_info() {return m_sh_info
;}
85 bool scan_instruction(nir_instr
*instr
);
87 virtual bool scan_sysvalue_access(nir_instr
*instr
) = 0;
89 bool emit_if_start(int if_id
, nir_if
*if_stmt
);
90 bool emit_else_start(int if_id
);
91 bool emit_ifelse_end(int if_id
);
93 bool emit_loop_start(int loop_id
);
94 bool emit_loop_end(int loop_id
);
95 bool emit_jump_instruction(nir_jump_instr
*instr
);
97 const GPRVector
*output_register(unsigned location
) const;
99 bool load_preloaded_value(const nir_dest
& dest
, int chan
, PValue value
,
100 bool as_last
= true);
101 void add_param_output_reg(int loc
, const GPRVector
*gpr
);
102 void inc_atomic_file_count();
103 std::bitset
<8> m_sv_values
;
115 virtual bool allocate_reserved_registers() = 0;
117 bool emit_alu_instruction(nir_instr
*instr
);
118 bool emit_deref_instruction(nir_deref_instr
* instr
);
119 bool emit_intrinsic_instruction(nir_intrinsic_instr
* instr
);
120 virtual bool emit_intrinsic_instruction_override(nir_intrinsic_instr
* instr
);
121 bool emit_tex_instruction(nir_instr
* instr
);
122 bool emit_discard_if(nir_intrinsic_instr
* instr
);
123 bool emit_load_ubo(nir_intrinsic_instr
* instr
);
124 bool emit_ssbo_atomic_add(nir_intrinsic_instr
* instr
);
125 bool load_uniform_indirect(nir_intrinsic_instr
* instr
, PValue addr
, int offest
, int bufid
);
127 /* Code creating functions */
128 bool emit_load_input_deref(const nir_variable
*var
, nir_intrinsic_instr
* instr
);
129 bool emit_load_function_temp(const nir_variable
*var
, nir_intrinsic_instr
*instr
);
130 AluInstruction
*emit_load_literal(const nir_load_const_instr
*literal
, const nir_src
& src
, unsigned writemask
);
132 bool emit_store_deref(nir_intrinsic_instr
* instr
);
134 bool reserve_uniform(nir_intrinsic_instr
* instr
);
135 bool process_uniforms(nir_variable
*uniform
);
136 bool process_inputs(nir_variable
*input
);
137 bool process_outputs(nir_variable
*output
);
139 void add_array_deref(nir_deref_instr
* instr
);
141 virtual void emit_shader_start();
142 virtual bool emit_deref_instruction_override(nir_deref_instr
* instr
);
143 virtual bool do_process_inputs(nir_variable
*input
) = 0;
144 virtual bool do_process_outputs(nir_variable
*output
) = 0;
145 virtual bool do_emit_load_deref(const nir_variable
*in_var
, nir_intrinsic_instr
* instr
) = 0;
146 virtual bool do_emit_store_deref(const nir_variable
*out_var
, nir_intrinsic_instr
* instr
) = 0;
148 virtual void do_finalize() = 0;
151 friend class ShaderFromNir
;
153 std::set
<nir_variable
*> m_arrays
;
155 std::map
<unsigned, PValue
> m_inputs
;
156 std::map
<unsigned, PValue
> m_outputs
;
158 std::map
<unsigned, nir_variable
*> m_var_derefs
;
159 std::map
<const nir_variable
*, nir_variable_mode
> m_var_mode
;
161 std::map
<unsigned, const glsl_type
*> m_uniform_type_map
;
162 std::map
<int, IfElseInstruction
*> m_if_block_start_map
;
163 std::map
<int, LoopBeginInstruction
*> m_loop_begin_block_map
;
165 pipe_shader_type m_processor_type
;
167 std::vector
<PInstruction
> m_output
;
168 std::vector
<PInstruction
> m_export_output
;
169 r600_shader
& m_sh_info
;
171 EmitTexInstruction m_tex_instr
;
172 EmitAluInstruction m_alu_instr
;
173 OutputRegisterMap m_output_register_map
;
175 IfElseInstruction
*m_pending_else
;
176 int m_next_hwatomic_loc
;
178 r600_pipe_shader_selector
& m_sel
;