radeon/llvm: Move lowering of SETCC node to R600ISelLowering
[mesa.git] / src / gallium / drivers / radeon / AMDGPU.h
1 //===-- AMDGPU.h - MachineFunction passes hw codegen --------------*- C++ -*-=//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9
10 #ifndef AMDGPU_H
11 #define AMDGPU_H
12
13 #include "AMDGPUTargetMachine.h"
14 #include "llvm/Support/TargetRegistry.h"
15 #include "llvm/Target/TargetMachine.h"
16
17 namespace llvm {
18
19 class FunctionPass;
20 class AMDGPUTargetMachine;
21
22 // R600 Passes
23 FunctionPass* createR600KernelParametersPass(const TargetData* TD);
24 FunctionPass *createR600CodeEmitterPass(formatted_raw_ostream &OS);
25
26 // SI Passes
27 FunctionPass *createSIAssignInterpRegsPass(TargetMachine &tm);
28 FunctionPass *createSICodeEmitterPass(formatted_raw_ostream &OS);
29
30 // Passes common to R600 and SI
31 FunctionPass *createAMDGPUConvertToISAPass(TargetMachine &tm);
32
33 } // End namespace llvm
34
35 #endif // AMDGPU_H