radeon/llvm: Use correct float->int conversion opcode on SI.
[mesa.git] / src / gallium / drivers / radeon / AMDGPU.td
1 //===-- AMDIL.td - AMDIL Tablegen files --*- tablegen -*-------------------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //==-----------------------------------------------------------------------===//
9
10 // Include AMDIL TD files
11 include "AMDILBase.td"
12
13
14 def AMDGPUInstrInfo : InstrInfo {}
15
16 //===----------------------------------------------------------------------===//
17 // Declare the target which we are implementing
18 //===----------------------------------------------------------------------===//
19 def AMDGPUAsmWriter : AsmWriter {
20 string AsmWriterClassName = "InstPrinter";
21 int Variant = 0;
22 bit isMCAsmWriter = 1;
23 }
24
25 def AMDGPU : Target {
26 // Pull in Instruction Info:
27 let InstructionSet = AMDGPUInstrInfo;
28 let AssemblyWriters = [AMDGPUAsmWriter];
29 }
30
31 // Include AMDGPU TD files
32 include "R600Schedule.td"
33 include "SISchedule.td"
34 include "Processors.td"
35 include "AMDGPUInstrInfo.td"
36 include "AMDGPUIntrinsics.td"
37 include "AMDGPURegisterInfo.td"
38 include "AMDGPUInstructions.td"