radeon/llvm: Remove AMDIL floating-point ADD instruction defs
[mesa.git] / src / gallium / drivers / radeon / AMDGPUGenInstrEnums.pl
1 #===-- AMDGPUGenInstrEnums.pl - Script for generating instruction enums ----===#
2 #
3 # The LLVM Compiler Infrastructure
4 #
5 # This file is distributed under the University of Illinois Open Source
6 # License. See LICENSE.TXT for details.
7 #
8 #===-----------------------------------------------------------------------===#
9 #
10 # This perl script is used to generate the following files:
11 #
12 # 1. perl AMDGPUGenInstrEnums.pl td > AMDGPUInstrEnums.td
13 #
14 # This file contains Tablegen constants used for matching hw instructions
15 # from R600 and SI with functionally similar AMDIL instruction. It aslo
16 # contains definitions of floating point constants like pi (in hex notation)
17 # that are used in some of the shader patterns.
18 #
19 # 2. perl AMDGPUGenInstrEnums.pl h > AMDGPUInstrEnums.h
20 #
21 # This file contains cpp enums that match the constant values in
22 # AMDGPUInstrEnums.td
23 #
24 # 3. perl AMDGPUGenInstrEnums.pl inc > AMDGPUInstrEnums.include
25 #
26 # This file contains a function called GetRealAMDILOpcode which maps the
27 # constant values defined in AMDGPUInstrEnums.h to the corresponding AMDIL
28 # instructions.
29 #===-----------------------------------------------------------------------===#
30
31 use warnings;
32 use strict;
33
34 my @F32_MULTICLASSES = qw {
35 UnaryIntrinsicFloat
36 UnaryIntrinsicFloatScalar
37 TernaryIntrinsicFloat
38 };
39
40 my @I32_MULTICLASSES = qw {
41 BinaryOpMCInt
42 BinaryOpMCi32
43 BinaryOpMCi32Const
44 };
45
46 my @GENERATION_ENUM = qw {
47 R600_CAYMAN
48 R600
49 EG
50 EG_CAYMAN
51 CAYMAN
52 SI
53 };
54
55 my $FILE_TYPE = $ARGV[0];
56
57 open AMDIL, '<', 'AMDILInstructions.td';
58
59 my @INST_ENUMS = ('NONE', 'FEQ', 'FGE', 'FLT', 'FNE', 'MOVE_f32', 'MOVE_i32', 'FTOI', 'ITOF', 'UGT', 'IGE', 'INE', 'UGE', 'IEQ', 'BINARY_OR_i32', 'BINARY_NOT_i32', 'MIN_f32', 'MUL_IEEE_f32');
60
61 while (<AMDIL>) {
62 if ($_ =~ /defm\s+([A-Z_]+)\s+:\s+([A-Za-z0-9]+)</) {
63 if (grep {$_ eq $2} @F32_MULTICLASSES) {
64 push @INST_ENUMS, "$1\_f32";
65
66 } elsif (grep {$_ eq $2} @I32_MULTICLASSES) {
67 push @INST_ENUMS, "$1\_i32";
68 }
69 } elsif ($_ =~ /def\s+([A-Z_]+)(_[fi]32)/) {
70 push @INST_ENUMS, "$1$2";
71 }
72 }
73
74 if ($FILE_TYPE eq 'td') {
75
76 print_td_enum('AMDILInst', 'AMDILInstEnums', 'field bits<16>', @INST_ENUMS);
77
78 print_td_enum('AMDGPUGen', 'AMDGPUGenEnums', 'field bits<3>', @GENERATION_ENUM);
79
80 my %constants = (
81 'PI' => '0x40490fdb',
82 'TWO_PI' => '0x40c90fdb',
83 'TWO_PI_INV' => '0x3e22f983'
84 );
85
86 print "class Constants {\n";
87 foreach (keys(%constants)) {
88 print "int $_ = $constants{$_};\n";
89 }
90 print "}\n";
91 print "def CONST : Constants;\n";
92
93 } elsif ($FILE_TYPE eq 'h') {
94
95 print "unsigned GetRealAMDILOpcode(unsigned internalOpcode) const;\n";
96
97 print_h_enum('AMDILTblgenOpcode', @INST_ENUMS);
98
99 print_h_enum('AMDGPUGen', @GENERATION_ENUM);
100
101 } elsif ($FILE_TYPE eq 'inc') {
102 print "unsigned AMDGPUInstrInfo::GetRealAMDILOpcode(unsigned internalOpcode) const\n{\n";
103 print " switch(internalOpcode) {\n";
104 #Start at 1 so we skip NONE
105 for (my $i = 1; $i < scalar(@INST_ENUMS); $i++) {
106 my $inst = $INST_ENUMS[$i];
107 print " case AMDGPUInstrInfo::$inst: return AMDIL::$inst;\n";
108 }
109 print " default: abort();\n";
110 print " }\n}\n";
111 }
112
113
114 sub print_td_enum {
115 my ($instance, $class, $field, @values) = @_;
116
117 print "class $class {\n";
118
119 for (my $i = 0; $i < scalar(@values); $i++) {
120 print " $field $values[$i] = $i;\n";
121 }
122 print "}\n";
123
124 print "def $instance : $class;\n";
125 }
126
127 sub print_h_enum {
128
129 my ($enum, @list) = @_;
130 print "enum $enum {\n";
131
132 for (my $i = 0; $i < scalar(@list); $i++) {
133 print " $list[$i] = $i";
134 if ($i != $#list) {
135 print ',';
136 }
137 print "\n";
138 }
139 print "};\n";
140 }
141