src/gallium/drivers/radeon/AMDILBase.td

   1 //===- AMDIL.td - AMDIL Target Machine -------------*- tablegen -*-===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file is distributed under the University of Illinois Open Source
   6 // License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9 // Target-independent interfaces which we are implementing
  10 //===----------------------------------------------------------------------===//
  11
  12 include "llvm/Target/Target.td"
  13
  14 //===----------------------------------------------------------------------===//
  15 // AMDIL Subtarget features.
  16 //===----------------------------------------------------------------------===//
  17 def FeatureFP64     : SubtargetFeature<"fp64",
  18         "CapsOverride[AMDILDeviceInfo::DoubleOps]",
  19         "true",
  20         "Enable 64bit double precision operations">;
  21 def FeatureByteAddress    : SubtargetFeature<"byte_addressable_store",
  22         "CapsOverride[AMDILDeviceInfo::ByteStores]",
  23         "true",
  24         "Enable byte addressable stores">;
  25 def FeatureBarrierDetect : SubtargetFeature<"barrier_detect",
  26         "CapsOverride[AMDILDeviceInfo::BarrierDetect]",
  27         "true",
  28         "Enable duplicate barrier detection(HD5XXX or later).">;
  29 def FeatureImages : SubtargetFeature<"images",
  30         "CapsOverride[AMDILDeviceInfo::Images]",
  31         "true",
  32         "Enable image functions">;
  33 def FeatureMultiUAV : SubtargetFeature<"multi_uav",
  34         "CapsOverride[AMDILDeviceInfo::MultiUAV]",
  35         "true",
  36         "Generate multiple UAV code(HD5XXX family or later)">;
  37 def FeatureMacroDB : SubtargetFeature<"macrodb",
  38         "CapsOverride[AMDILDeviceInfo::MacroDB]",
  39         "true",
  40         "Use internal macrodb, instead of macrodb in driver">;
  41 def FeatureNoAlias : SubtargetFeature<"noalias",
  42         "CapsOverride[AMDILDeviceInfo::NoAlias]",
  43         "true",
  44         "assert that all kernel argument pointers are not aliased">;
  45 def FeatureNoInline : SubtargetFeature<"no-inline",
  46         "CapsOverride[AMDILDeviceInfo::NoInline]",
  47         "true",
  48         "specify whether to not inline functions">;
  49
  50 def Feature64BitPtr : SubtargetFeature<"64BitPtr",
  51         "mIs64bit",
  52         "false",
  53         "Specify if 64bit addressing should be used.">;
  54
  55 def Feature32on64BitPtr : SubtargetFeature<"64on32BitPtr",
  56         "mIs32on64bit",
  57         "false",
  58         "Specify if 64bit sized pointers with 32bit addressing should be used.">;
  59 def FeatureDebug : SubtargetFeature<"debug",
  60         "CapsOverride[AMDILDeviceInfo::Debug]",
  61         "true",
  62         "Debug mode is enabled, so disable hardware accelerated address spaces.">;
  63 def FeatureDumpCode : SubtargetFeature <"DumpCode",
  64         "mDumpCode",
  65         "true",
  66         "Dump MachineInstrs in the CodeEmitter">;
  67
  68
  69 //===----------------------------------------------------------------------===//
  70 // Register File, Calling Conv, Instruction Descriptions
  71 //===----------------------------------------------------------------------===//
  72
  73
  74 include "AMDILRegisterInfo.td"
  75 include "AMDILCallingConv.td"
  76 include "AMDILInstrInfo.td"
  77
  78 def AMDILInstrInfo : InstrInfo {}
  79
  80 //===----------------------------------------------------------------------===//
  81 // AMDIL processors supported.
  82 //===----------------------------------------------------------------------===//
  83 //include "Processors.td"
  84
  85 //===----------------------------------------------------------------------===//
  86 // Declare the target which we are implementing
  87 //===----------------------------------------------------------------------===//
  88 def AMDILAsmWriter : AsmWriter {
  89     string AsmWriterClassName = "AsmPrinter";
  90     int Variant = 0;
  91 }
  92
  93 def AMDILAsmParser : AsmParser {
  94     string AsmParserClassName = "AsmParser";
  95     int Variant = 0;
  96
  97     string CommentDelimiter = ";";
  98
  99     string RegisterPrefix = "r";
 100
 101 }
 102
 103
 104 def AMDIL : Target {
 105   // Pull in Instruction Info:
 106   let InstructionSet = AMDILInstrInfo;
 107   let AssemblyWriters = [AMDILAsmWriter];
 108   let AssemblyParsers = [AMDILAsmParser];
 109 }