radeon/llvm: add support to fetch temps as vectors
[mesa.git] / src / gallium / drivers / radeon / AMDILFrameLowering.cpp
1 //===----------------------- AMDILFrameLowering.cpp -----------------*- C++ -*-===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //==-----------------------------------------------------------------------===//
9 //
10 // Interface to describe a layout of a stack frame on a AMDIL target machine
11 //
12 //===----------------------------------------------------------------------===//
13 #include "AMDILFrameLowering.h"
14 #include "llvm/CodeGen/MachineFrameInfo.h"
15
16 using namespace llvm;
17 AMDGPUFrameLowering::AMDGPUFrameLowering(StackDirection D, unsigned StackAl,
18 int LAO, unsigned TransAl)
19 : TargetFrameLowering(D, StackAl, LAO, TransAl)
20 {
21 }
22
23 AMDGPUFrameLowering::~AMDGPUFrameLowering()
24 {
25 }
26
27 /// getFrameIndexOffset - Returns the displacement from the frame register to
28 /// the stack frame of the specified index.
29 int AMDGPUFrameLowering::getFrameIndexOffset(const MachineFunction &MF,
30 int FI) const {
31 const MachineFrameInfo *MFI = MF.getFrameInfo();
32 return MFI->getObjectOffset(FI);
33 }
34
35 const TargetFrameLowering::SpillSlot *
36 AMDGPUFrameLowering::getCalleeSavedSpillSlots(unsigned &NumEntries) const
37 {
38 NumEntries = 0;
39 return 0;
40 }
41 void
42 AMDGPUFrameLowering::emitPrologue(MachineFunction &MF) const
43 {
44 }
45 void
46 AMDGPUFrameLowering::emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const
47 {
48 }
49 bool
50 AMDGPUFrameLowering::hasFP(const MachineFunction &MF) const
51 {
52 return false;
53 }