radeon/llvm: add support to fetch temps as vectors
[mesa.git] / src / gallium / drivers / radeon / AMDILFrameLowering.h
1 //===--------------------- AMDILFrameLowering.h -----------------*- C++ -*-===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //==-----------------------------------------------------------------------===//
9 //
10 // The LLVM Compiler Infrastructure
11 //
12 // This file is distributed under the University of Illinois Open Source
13 // License. See LICENSE.TXT for details.
14 //
15 //===----------------------------------------------------------------------===//
16 //
17 // Interface to describe a layout of a stack frame on a AMDIL target machine
18 //
19 //===----------------------------------------------------------------------===//
20 #ifndef _AMDILFRAME_LOWERING_H_
21 #define _AMDILFRAME_LOWERING_H_
22
23 #include "llvm/CodeGen/MachineFunction.h"
24 #include "llvm/Target/TargetFrameLowering.h"
25
26 /// Information about the stack frame layout on the AMDGPU targets. It holds
27 /// the direction of the stack growth, the known stack alignment on entry to
28 /// each function, and the offset to the locals area.
29 /// See TargetFrameInfo for more comments.
30
31 namespace llvm {
32 class AMDGPUFrameLowering : public TargetFrameLowering {
33 public:
34 AMDGPUFrameLowering(StackDirection D, unsigned StackAl, int LAO, unsigned
35 TransAl = 1);
36 virtual ~AMDGPUFrameLowering();
37 virtual int getFrameIndexOffset(const MachineFunction &MF,
38 int FI) const;
39 virtual const SpillSlot *
40 getCalleeSavedSpillSlots(unsigned &NumEntries) const;
41 virtual void emitPrologue(MachineFunction &MF) const;
42 virtual void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const;
43 virtual bool hasFP(const MachineFunction &MF) const;
44 }; // class AMDGPUFrameLowering
45 } // namespace llvm
46 #endif // _AMDILFRAME_LOWERING_H_