radeon/llvm: Remove GlobalManager and KernelManager
[mesa.git] / src / gallium / drivers / radeon / AMDILLiteralManager.cpp
1 //===--- AMDILLiteralManager.cpp - AMDIL Literal Manager Pass --*- C++ -*--===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //==-----------------------------------------------------------------------===//
9
10 #define DEBUG_TYPE "literal_manager"
11
12 #include "AMDIL.h"
13
14 #include "AMDILAlgorithms.tpp"
15 #include "AMDILMachineFunctionInfo.h"
16 #include "AMDILSubtarget.h"
17 #include "AMDILTargetMachine.h"
18 #include "llvm/CodeGen/MachineFunctionPass.h"
19 #include "llvm/CodeGen/Passes.h"
20 #include "llvm/Support/Debug.h"
21 #include "llvm/Target/TargetMachine.h"
22
23 using namespace llvm;
24
25
26 // AMDIL Literal Manager traverses through all of the LOADCONST instructions and
27 // converts them from an immediate value to the literal index. The literal index
28 // is valid IL, but the immediate values are not. The Immediate values must be
29 // aggregated and declared for clarity and to reduce the number of literals that
30 // are used. It is also illegal to declare the same literal twice, so this keeps
31 // that from occuring.
32
33 namespace {
34 class AMDILLiteralManager : public MachineFunctionPass {
35 public:
36 static char ID;
37 AMDILLiteralManager(TargetMachine &tm AMDIL_OPT_LEVEL_DECL);
38 virtual const char *getPassName() const;
39
40 bool runOnMachineFunction(MachineFunction &MF);
41 private:
42 bool trackLiterals(MachineBasicBlock::iterator *bbb);
43 TargetMachine &TM;
44 const AMDILSubtarget *mSTM;
45 AMDILMachineFunctionInfo *mMFI;
46 int32_t mLitIdx;
47 bool mChanged;
48 };
49 char AMDILLiteralManager::ID = 0;
50 }
51
52 namespace llvm {
53 FunctionPass *
54 createAMDILLiteralManager(TargetMachine &tm AMDIL_OPT_LEVEL_DECL) {
55 return new AMDILLiteralManager(tm AMDIL_OPT_LEVEL_VAR);
56 }
57
58 }
59
60 AMDILLiteralManager::AMDILLiteralManager(TargetMachine &tm
61 AMDIL_OPT_LEVEL_DECL)
62 : MachineFunctionPass(ID),
63 TM(tm) {
64 }
65
66 bool AMDILLiteralManager::runOnMachineFunction(MachineFunction &MF) {
67 mChanged = false;
68 mMFI = MF.getInfo<AMDILMachineFunctionInfo>();
69 const AMDILTargetMachine *amdtm =
70 reinterpret_cast<const AMDILTargetMachine *>(&TM);
71 mSTM = dynamic_cast<const AMDILSubtarget *>(amdtm->getSubtargetImpl());
72 safeNestedForEach(MF.begin(), MF.end(), MF.begin()->begin(),
73 std::bind1st(std::mem_fun(&AMDILLiteralManager::trackLiterals), this));
74 return mChanged;
75 }
76
77 bool AMDILLiteralManager::trackLiterals(MachineBasicBlock::iterator *bbb) {
78 MachineInstr *MI = *bbb;
79 uint32_t Opcode = MI->getOpcode();
80 switch(Opcode) {
81 default:
82 return false;
83 case AMDIL::LOADCONST_i8:
84 case AMDIL::LOADCONST_i16:
85 case AMDIL::LOADCONST_i32:
86 case AMDIL::LOADCONST_i64:
87 case AMDIL::LOADCONST_f32:
88 case AMDIL::LOADCONST_f64:
89 break;
90 };
91 MachineOperand &dstOp = MI->getOperand(0);
92 MachineOperand &litOp = MI->getOperand(1);
93 if (!litOp.isImm() && !litOp.isFPImm()) {
94 return false;
95 }
96 if (!dstOp.isReg()) {
97 return false;
98 }
99 // Change the literal to the correct index for each literal that is found.
100 if (litOp.isImm()) {
101 int64_t immVal = litOp.getImm();
102 uint32_t idx = MI->getOpcode() == AMDIL::LOADCONST_i64
103 ? mMFI->addi64Literal(immVal)
104 : mMFI->addi32Literal(static_cast<int>(immVal), Opcode);
105 litOp.ChangeToImmediate(idx);
106 return false;
107 }
108
109 if (litOp.isFPImm()) {
110 const ConstantFP *fpVal = litOp.getFPImm();
111 uint32_t idx = MI->getOpcode() == AMDIL::LOADCONST_f64
112 ? mMFI->addf64Literal(fpVal)
113 : mMFI->addf32Literal(fpVal);
114 litOp.ChangeToImmediate(idx);
115 return false;
116 }
117
118 return false;
119 }
120
121 const char* AMDILLiteralManager::getPassName() const {
122 return "AMDIL Constant Propagation";
123 }
124
125