radeon/llvm: Move lowering of SETCC node to R600ISelLowering
[mesa.git] / src / gallium / drivers / radeon / AMDILMultiClass.td
1 //===-- AMDILMultiClass.td - AMDIL Multiclass defs ---*- tablegen -*-------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //==-----------------------------------------------------------------------===//
9 // Multiclass that handles branch instructions
10 multiclass BranchConditional<SDNode Op> {
11 def _i32 : ILFormat<IL_OP_IFC, (outs),
12 (ins brtarget:$target, GPRI32:$src0),
13 "; i32 Pseudo branch instruction",
14 [(Op bb:$target, GPRI32:$src0)]>;
15 def _f32 : ILFormat<IL_OP_IFC, (outs),
16 (ins brtarget:$target, GPRF32:$src0),
17 "; f32 Pseudo branch instruction",
18 [(Op bb:$target, GPRF32:$src0)]>;
19 }
20
21 // Multiclass that handles memory store operations
22 multiclass GTRUNCSTORE<string asm> {
23 def _i32i8 : OneInOneOut<IL_OP_MOV, (outs), (ins GPRI32:$val, MEMI32:$ptr),
24 !strconcat(asm, " $val $ptr"),
25 [(global_i8trunc_store GPRI32:$val, ADDR:$ptr)]>;
26 def _i32i16 : OneInOneOut<IL_OP_MOV, (outs), (ins GPRI32:$val, MEMI32:$ptr),
27 !strconcat(asm, " $val $ptr"),
28 [(global_i16trunc_store GPRI32:$val, ADDR:$ptr)]>;
29 }
30
31 // Multiclass that handles memory store operations
32 multiclass LTRUNCSTORE<string asm> {
33 def _i32i8 : OneInOneOut<IL_OP_MOV, (outs), (ins GPRI32:$val, MEMI32:$ptr),
34 !strconcat(asm, " $val $ptr"),
35 [(local_i8trunc_store GPRI32:$val, ADDR:$ptr)]>;
36 def _i32i16 : OneInOneOut<IL_OP_MOV, (outs), (ins GPRI32:$val, MEMI32:$ptr),
37 !strconcat(asm, " $val $ptr"),
38 [(local_i16trunc_store GPRI32:$val, ADDR:$ptr)]>;
39 }
40
41 // Multiclass that handles memory store operations
42 multiclass PTRUNCSTORE<string asm> {
43 def _i32i8 : OneInOneOut<IL_OP_MOV, (outs), (ins GPRI32:$val, MEMI32:$ptr),
44 !strconcat(asm, " $val $ptr"),
45 [(private_i8trunc_store GPRI32:$val, ADDR:$ptr)]>;
46 def _i32i16 : OneInOneOut<IL_OP_MOV, (outs), (ins GPRI32:$val, MEMI32:$ptr),
47 !strconcat(asm, " $val $ptr"),
48 [(private_i16trunc_store GPRI32:$val, ADDR:$ptr)]>;
49 }
50
51 // Multiclass that handles memory store operations
52 multiclass RTRUNCSTORE<string asm> {
53 def _i32i8 : OneInOneOut<IL_OP_MOV, (outs), (ins GPRI32:$val, MEMI32:$ptr),
54 !strconcat(asm, " $val $ptr"),
55 [(region_i8trunc_store GPRI32:$val, ADDR:$ptr)]>;
56 def _i32i16 : OneInOneOut<IL_OP_MOV, (outs), (ins GPRI32:$val, MEMI32:$ptr),
57 !strconcat(asm, " $val $ptr"),
58 [(region_i16trunc_store GPRI32:$val, ADDR:$ptr)]>;
59 }
60
61
62 // Multiclass that handles memory store operations
63 multiclass STORE<string asm, PatFrag OpNode> {
64 def _i32 : OneInOneOut<IL_OP_MOV, (outs), (ins GPRI32:$val, MEMI32:$ptr),
65 !strconcat(asm, " $val $ptr"),
66 [(OpNode GPRI32:$val, ADDR:$ptr)]>;
67 def _f32 : OneInOneOut<IL_OP_MOV, (outs), (ins GPRF32:$val, MEMI32:$ptr),
68 !strconcat(asm, " $val $ptr"),
69 [(OpNode GPRF32:$val, ADDR:$ptr)]>;
70 }
71
72 // Multiclass that handles load operations
73 multiclass LOAD<string asm, PatFrag OpNode> {
74 def _i32 : OneInOneOut<IL_OP_MOV, (outs GPRI32:$dst), (ins MEMI32:$ptr),
75 !strconcat(asm, " $dst $ptr"),
76 [(set GPRI32:$dst, (OpNode ADDR:$ptr))]>;
77 def _f32 : OneInOneOut<IL_OP_MOV, (outs GPRF32:$dst), (ins MEMI32:$ptr),
78 !strconcat(asm, " $dst $ptr"),
79 [(set GPRF32:$dst, (OpNode ADDR:$ptr))]>;
80 }
81
82 // Only scalar types should generate flow control
83 multiclass BranchInstr<ILOpCode opc> {
84 def _i32 : UnaryOpNoRet<opc, (outs), (ins GPRI32:$src),
85 !strconcat(opc.Text, " $src"), []>;
86 def _f32 : UnaryOpNoRet<opc, (outs), (ins GPRF32:$src),
87 !strconcat(opc.Text, " $src"), []>;
88 }
89 // Only scalar types should generate flow control
90 multiclass BranchInstr2<ILOpCode opc> {
91 def _i32 : BinaryOpNoRet<opc, (outs), (ins GPRI32:$src0, GPRI32:$src1),
92 !strconcat(opc.Text, " $src0, $src1"), []>;
93 def _f32 : BinaryOpNoRet<opc, (outs), (ins GPRF32:$src0, GPRF32:$src1),
94 !strconcat(opc.Text, " $src0, $src1"), []>;
95 }