radeonsi: initial WIP SI code
[mesa.git] / src / gallium / drivers / radeon / AMDILRegisterInfo.h
1 //===- AMDILRegisterInfo.h - AMDIL Register Information Impl ----*- C++ -*-===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //==-----------------------------------------------------------------------===//
9 //
10 // This file contains the AMDIL implementation of the TargetRegisterInfo class.
11 //
12 //===----------------------------------------------------------------------===//
13
14 #ifndef AMDILREGISTERINFO_H_
15 #define AMDILREGISTERINFO_H_
16
17 #include "llvm/Target/TargetRegisterInfo.h"
18
19 #define GET_REGINFO_HEADER
20 #include "AMDILGenRegisterInfo.inc"
21 // See header file for explanation
22
23 namespace llvm
24 {
25
26 class AMDILTargetMachine;
27 class TargetInstrInfo;
28 class Type;
29
30 /// DWARFFlavour - Flavour of dwarf regnumbers
31 ///
32 namespace DWARFFlavour {
33 enum {
34 AMDIL_Generic = 0
35 };
36 }
37
38 struct AMDILRegisterInfo : public AMDILGenRegisterInfo
39 {
40 AMDILTargetMachine &TM;
41 const TargetInstrInfo &TII;
42
43 AMDILRegisterInfo(AMDILTargetMachine &tm, const TargetInstrInfo &tii);
44 /// Code Generation virtual methods...
45 const uint16_t * getCalleeSavedRegs(const MachineFunction *MF = 0) const;
46
47 const TargetRegisterClass* const*
48 getCalleeSavedRegClasses(
49 const MachineFunction *MF = 0) const;
50
51 BitVector
52 getReservedRegs(const MachineFunction &MF) const;
53 BitVector
54 getAllocatableSet(const MachineFunction &MF,
55 const TargetRegisterClass *RC) const;
56
57 void
58 eliminateCallFramePseudoInstr(
59 MachineFunction &MF,
60 MachineBasicBlock &MBB,
61 MachineBasicBlock::iterator I) const;
62 void
63 eliminateFrameIndex(MachineBasicBlock::iterator II,
64 int SPAdj, RegScavenger *RS = NULL) const;
65
66 void
67 processFunctionBeforeFrameFinalized(MachineFunction &MF) const;
68
69 // Debug information queries.
70 unsigned int
71 getRARegister() const;
72
73 unsigned int
74 getFrameRegister(const MachineFunction &MF) const;
75
76 // Exception handling queries.
77 unsigned int
78 getEHExceptionRegister() const;
79 unsigned int
80 getEHHandlerRegister() const;
81
82 int64_t
83 getStackSize() const;
84 private:
85 mutable int64_t baseOffset;
86 mutable int64_t nextFuncOffset;
87 };
88
89 } // end namespace llvm
90
91 #endif // AMDILREGISTERINFO_H_