src/gallium/drivers/radeon/Makefile.sources

   1
   2 TD_FILES := \
   3         AMDGPU.td               \
   4         AMDGPUInstrInfo.td      \
   5         AMDGPUInstructions.td   \
   6         AMDGPUIntrinsics.td     \
   7         AMDGPURegisterInfo.td   \
   8         AMDILBase.td            \
   9         AMDILInstrInfo.td       \
  10         AMDILIntrinsics.td      \
  11         AMDILRegisterInfo.td    \
  12         Processors.td           \
  13         R600Instructions.td     \
  14         R600Intrinsics.td       \
  15         R600IntrinsicsNoOpenCL.td       \
  16         R600IntrinsicsOpenCL.td \
  17         R600RegisterInfo.td     \
  18         R600Schedule.td         \
  19         SIInstrFormats.td       \
  20         SIInstrInfo.td          \
  21         SIInstructions.td       \
  22         SIIntrinsics.td         \
  23         SIRegisterInfo.td       \
  24         SISchedule.td
  25
  26 LLVM_GENERATED_SOURCES := \
  27         R600Intrinsics.td               \
  28         R600RegisterInfo.td             \
  29         SIRegisterInfo.td               \
  30         SIRegisterGetHWRegNum.inc               \
  31         AMDGPUGenRegisterInfo.inc       \
  32         AMDGPUGenInstrInfo.inc          \
  33         AMDGPUGenAsmWriter.inc          \
  34         AMDGPUGenDAGISel.inc            \
  35         AMDGPUGenCallingConv.inc                \
  36         AMDGPUGenSubtargetInfo.inc              \
  37         AMDGPUGenEDInfo.inc             \
  38         AMDGPUGenIntrinsics.inc         \
  39         AMDGPUGenCodeEmitter.inc        \
  40         AMDGPUGenMCCodeEmitter.inc      \
  41         AMDGPUGenDFAPacketizer.inc
  42
  43 LLVM_CPP_SOURCES := \
  44         AMDIL7XXDevice.cpp              \
  45         AMDILCFGStructurizer.cpp        \
  46         AMDILDevice.cpp                 \
  47         AMDILDeviceInfo.cpp             \
  48         AMDILEvergreenDevice.cpp        \
  49         AMDILFrameLowering.cpp          \
  50         AMDILIntrinsicInfo.cpp          \
  51         AMDILISelDAGToDAG.cpp           \
  52         AMDILISelLowering.cpp           \
  53         AMDILNIDevice.cpp               \
  54         AMDILPeepholeOptimizer.cpp      \
  55         AMDILSIDevice.cpp               \
  56         AMDGPUAsmPrinter.cpp \
  57         AMDGPUMCInstLower.cpp \
  58         AMDGPUSubtarget.cpp             \
  59         AMDGPUTargetMachine.cpp         \
  60         AMDGPUISelLowering.cpp          \
  61         AMDGPUConvertToISA.cpp          \
  62         AMDGPUInstrInfo.cpp             \
  63         AMDGPURegisterInfo.cpp          \
  64         R600ExpandSpecialInstrs.cpp     \
  65         R600ISelLowering.cpp            \
  66         R600InstrInfo.cpp               \
  67         R600MachineFunctionInfo.cpp     \
  68         R600RegisterInfo.cpp            \
  69         SIAssignInterpRegs.cpp          \
  70         SIInstrInfo.cpp                 \
  71         SIISelLowering.cpp              \
  72         SILowerLiteralConstants.cpp             \
  73         SILowerFlowControl.cpp  \
  74         SIMachineFunctionInfo.cpp       \
  75         SIRegisterInfo.cpp              \
  76         InstPrinter/AMDGPUInstPrinter.cpp \
  77         MCTargetDesc/AMDGPUMCAsmInfo.cpp        \
  78         MCTargetDesc/AMDGPUAsmBackend.cpp \
  79         MCTargetDesc/AMDGPUMCTargetDesc.cpp     \
  80         MCTargetDesc/SIMCCodeEmitter.cpp \
  81         MCTargetDesc/R600MCCodeEmitter.cpp \
  82         TargetInfo/AMDGPUTargetInfo.cpp \
  83
  84 CPP_SOURCES := \
  85         radeon_llvm_emit.cpp
  86
  87 C_SOURCES := \
  88         radeon_setup_tgsi_llvm.c