3 R600ShaderPatterns.td \
7 SIRegisterGetHWRegNum.inc \
8 AMDILGenRegisterInfo.inc \
9 AMDILGenInstrInfo.inc \
10 AMDILGenAsmWriter.inc \
12 AMDILGenCallingConv.inc \
13 AMDILGenSubtargetInfo.inc \
15 AMDILGenIntrinsics.inc \
16 AMDILGenCodeEmitter.inc \
17 AMDGPUInstrEnums.h.include \
18 AMDGPUInstrEnums.include
22 AMDIL7XXIOExpansion.cpp \
23 AMDIL789IOExpansion.cpp \
25 AMDILBarrierDetect.cpp \
26 AMDILCFGStructurizer.cpp \
29 AMDILEGIOExpansion.cpp \
30 AMDILEvergreenDevice.cpp \
31 AMDILELFWriterInfo.cpp \
32 AMDILFrameLowering.cpp \
33 AMDILGlobalManager.cpp \
34 AMDILImageExpansion.cpp \
37 AMDILIntrinsicInfo.cpp \
38 AMDILIOExpansion.cpp \
39 AMDILISelDAGToDAG.cpp \
40 AMDILISelLowering.cpp \
41 AMDILKernelManager.cpp \
42 AMDILLiteralManager.cpp \
43 AMDILMachineFunctionInfo.cpp \
44 AMDILMachinePeephole.cpp \
45 AMDILMCCodeEmitter.cpp \
48 AMDILPeepholeOptimizer.cpp \
49 AMDILPointerManager.cpp \
50 AMDILPrintfConvert.cpp \
51 AMDILRegisterInfo.cpp \
54 AMDILTargetMachine.cpp \
55 AMDILUtilityFunctions.cpp \
56 AMDGPUTargetMachine.cpp \
57 AMDGPUISelLowering.cpp \
58 AMDGPUConvertToISA.cpp \
59 AMDGPULowerInstructions.cpp \
60 AMDGPULowerShaderInstructions.cpp \
61 AMDGPUReorderPreloadInstructions.cpp \
63 AMDGPURegisterInfo.cpp \
66 R600ISelLowering.cpp \
68 R600KernelParameters.cpp \
69 R600LowerInstructions.cpp \
70 R600LowerShaderInstructions.cpp \
71 R600RegisterInfo.cpp \
72 SIAssignInterpRegs.cpp \
76 SILowerShaderInstructions.cpp \
77 SIMachineFunctionInfo.cpp \
78 SIPropagateImmReads.cpp \
80 MCTargetDesc/AMDILMCAsmInfo.cpp \
81 MCTargetDesc/AMDILMCTargetDesc.cpp \
82 TargetInfo/AMDILTargetInfo.cpp \
86 radeon_setup_tgsi_llvm.c