src/gallium/drivers/radeon/Makefile.sources

   1
   2 GENERATED_SOURCES := \
   3         R600ShaderPatterns.td           \
   4         R600RegisterInfo.td             \
   5         AMDGPUInstrEnums.td             \
   6         SIRegisterInfo.td               \
   7         SIRegisterGetHWRegNum.inc               \
   8         AMDILGenRegisterInfo.inc        \
   9         AMDILGenInstrInfo.inc           \
  10         AMDILGenAsmWriter.inc           \
  11         AMDILGenDAGISel.inc             \
  12         AMDILGenCallingConv.inc         \
  13         AMDILGenSubtargetInfo.inc               \
  14         AMDILGenEDInfo.inc              \
  15         AMDILGenIntrinsics.inc          \
  16         AMDILGenCodeEmitter.inc \
  17         AMDGPUInstrEnums.h.include      \
  18         AMDGPUInstrEnums.include
  19
  20 CPP_SOURCES := \
  21         AMDIL7XXDevice.cpp              \
  22         AMDILCFGStructurizer.cpp        \
  23         AMDILDevice.cpp                 \
  24         AMDILDeviceInfo.cpp             \
  25         AMDILEvergreenDevice.cpp        \
  26         AMDILFrameLowering.cpp          \
  27         AMDILInstrInfo.cpp              \
  28         AMDILIntrinsicInfo.cpp          \
  29         AMDILISelDAGToDAG.cpp           \
  30         AMDILISelLowering.cpp           \
  31         AMDILMachineFunctionInfo.cpp    \
  32         AMDILMachinePeephole.cpp        \
  33         AMDILMCCodeEmitter.cpp          \
  34         AMDILModuleInfo.cpp             \
  35         AMDILNIDevice.cpp               \
  36         AMDILPeepholeOptimizer.cpp      \
  37         AMDILRegisterInfo.cpp           \
  38         AMDILSIDevice.cpp               \
  39         AMDILSubtarget.cpp              \
  40         AMDILTargetMachine.cpp          \
  41         AMDILUtilityFunctions.cpp       \
  42         AMDGPUTargetMachine.cpp         \
  43         AMDGPUISelLowering.cpp          \
  44         AMDGPUConvertToISA.cpp          \
  45         AMDGPULowerInstructions.cpp             \
  46         AMDGPULowerShaderInstructions.cpp       \
  47         AMDGPUReorderPreloadInstructions.cpp    \
  48         AMDGPUInstrInfo.cpp             \
  49         AMDGPURegisterInfo.cpp          \
  50         AMDGPUUtil.cpp                  \
  51         R600CodeEmitter.cpp             \
  52         R600ISelLowering.cpp            \
  53         R600InstrInfo.cpp               \
  54         R600KernelParameters.cpp        \
  55         R600LowerInstructions.cpp       \
  56         R600LowerShaderInstructions.cpp \
  57         R600RegisterInfo.cpp            \
  58         SIAssignInterpRegs.cpp          \
  59         SICodeEmitter.cpp               \
  60         SIInstrInfo.cpp                 \
  61         SIISelLowering.cpp              \
  62         SILowerShaderInstructions.cpp   \
  63         SIMachineFunctionInfo.cpp       \
  64         SIPropagateImmReads.cpp         \
  65         SIRegisterInfo.cpp              \
  66         MCTargetDesc/AMDILMCAsmInfo.cpp \
  67         MCTargetDesc/AMDILMCTargetDesc.cpp      \
  68         TargetInfo/AMDILTargetInfo.cpp  \
  69         radeon_llvm_emit.cpp
  70
  71 C_SOURCES := \
  72         radeon_setup_tgsi_llvm.c