radeon/llvm: Merge AMDILInstrInfo.cpp into AMDGPUInstrInfo.cpp
[mesa.git] / src / gallium / drivers / radeon / Makefile.sources
1
2 GENERATED_SOURCES := \
3 R600Intrinsics.td \
4 R600RegisterInfo.td \
5 SIRegisterInfo.td \
6 SIRegisterGetHWRegNum.inc \
7 AMDGPUGenRegisterInfo.inc \
8 AMDGPUGenInstrInfo.inc \
9 AMDGPUGenAsmWriter.inc \
10 AMDGPUGenDAGISel.inc \
11 AMDGPUGenCallingConv.inc \
12 AMDGPUGenSubtargetInfo.inc \
13 AMDGPUGenEDInfo.inc \
14 AMDGPUGenIntrinsics.inc \
15 AMDGPUGenCodeEmitter.inc \
16 AMDGPUGenDFAPacketizer.inc
17
18 CPP_SOURCES := \
19 AMDIL7XXDevice.cpp \
20 AMDILCFGStructurizer.cpp \
21 AMDILDevice.cpp \
22 AMDILDeviceInfo.cpp \
23 AMDILEvergreenDevice.cpp \
24 AMDILFrameLowering.cpp \
25 AMDILIntrinsicInfo.cpp \
26 AMDILISelDAGToDAG.cpp \
27 AMDILISelLowering.cpp \
28 AMDILNIDevice.cpp \
29 AMDILPeepholeOptimizer.cpp \
30 AMDILSIDevice.cpp \
31 AMDILSubtarget.cpp \
32 AMDGPUSubtarget.cpp \
33 AMDGPUTargetMachine.cpp \
34 AMDGPUISelLowering.cpp \
35 AMDGPUConvertToISA.cpp \
36 AMDGPUInstrInfo.cpp \
37 AMDGPURegisterInfo.cpp \
38 AMDGPUUtil.cpp \
39 R600CodeEmitter.cpp \
40 R600ISelLowering.cpp \
41 R600InstrInfo.cpp \
42 R600KernelParameters.cpp \
43 R600MachineFunctionInfo.cpp \
44 R600RegisterInfo.cpp \
45 SIAssignInterpRegs.cpp \
46 SICodeEmitter.cpp \
47 SIInstrInfo.cpp \
48 SIISelLowering.cpp \
49 SIMachineFunctionInfo.cpp \
50 SIRegisterInfo.cpp \
51 MCTargetDesc/AMDILMCAsmInfo.cpp \
52 MCTargetDesc/AMDILMCTargetDesc.cpp \
53 TargetInfo/AMDILTargetInfo.cpp \
54 radeon_llvm_emit.cpp
55
56 C_SOURCES := \
57 radeon_setup_tgsi_llvm.c