1 //===-- SIISelLowering.h - SI DAG Lowering Interface ------------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // SI DAG Lowering interface definition
12 //===----------------------------------------------------------------------===//
14 #ifndef SIISELLOWERING_H
15 #define SIISELLOWERING_H
17 #include "AMDGPUISelLowering.h"
18 #include "SIInstrInfo.h"
22 class SITargetLowering
: public AMDGPUTargetLowering
24 const SIInstrInfo
* TII
;
26 /// AppendS_WAITCNT - Memory reads and writes are syncronized using the
27 /// S_WAITCNT instruction. This function takes the most conservative
28 /// approach and inserts an S_WAITCNT instruction after every read and
30 void AppendS_WAITCNT(MachineInstr
*MI
, MachineBasicBlock
&BB
,
31 MachineBasicBlock::iterator I
) const;
32 void LowerMOV_IMM(MachineInstr
*MI
, MachineBasicBlock
&BB
,
33 MachineBasicBlock::iterator I
, unsigned Opocde
) const;
34 void LowerSI_INTERP(MachineInstr
*MI
, MachineBasicBlock
&BB
,
35 MachineBasicBlock::iterator I
, MachineRegisterInfo
& MRI
) const;
36 void LowerSI_INTERP_CONST(MachineInstr
*MI
, MachineBasicBlock
&BB
,
37 MachineBasicBlock::iterator I
, MachineRegisterInfo
&MRI
) const;
38 void LowerSI_KIL(MachineInstr
*MI
, MachineBasicBlock
&BB
,
39 MachineBasicBlock::iterator I
, MachineRegisterInfo
& MRI
) const;
40 void LowerSI_WQM(MachineInstr
*MI
, MachineBasicBlock
&BB
,
41 MachineBasicBlock::iterator I
, MachineRegisterInfo
& MRI
) const;
42 void LowerSI_V_CNDLT(MachineInstr
*MI
, MachineBasicBlock
&BB
,
43 MachineBasicBlock::iterator I
, MachineRegisterInfo
& MRI
) const;
45 SDValue
Loweri1ContextSwitch(SDValue Op
, SelectionDAG
&DAG
,
46 unsigned VCCNode
) const;
47 SDValue
LowerBR_CC(SDValue Op
, SelectionDAG
&DAG
) const;
48 SDValue
LowerLOAD(SDValue Op
, SelectionDAG
&DAG
) const;
49 SDValue
LowerSELECT_CC(SDValue Op
, SelectionDAG
&DAG
) const;
52 SITargetLowering(TargetMachine
&tm
);
53 virtual MachineBasicBlock
* EmitInstrWithCustomInserter(MachineInstr
* MI
,
54 MachineBasicBlock
* BB
) const;
55 virtual EVT
getSetCCResultType(EVT VT
) const;
56 virtual SDValue
LowerOperation(SDValue Op
, SelectionDAG
&DAG
) const;
57 virtual SDValue
PerformDAGCombine(SDNode
*N
, DAGCombinerInfo
&DCI
) const;
58 virtual const char* getTargetNodeName(unsigned Opcode
) const;
61 } // End namespace llvm
63 #endif //SIISELLOWERING_H