2 * Copyright 2013 Advanced Micro Devices, Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
23 * Authors: Marek Olšák <maraeo@gmail.com>
27 * This file contains helpers for writing commands to commands streams.
33 #include "r600_pipe_common.h"
34 #include "r600d_common.h"
37 * Add a buffer to the buffer list for the given command stream (CS).
39 * All buffers used by a CS must be added to the list. This tells the kernel
40 * driver which buffers are used by GPU commands. Other buffers can
41 * be swapped out (not accessible) during execution.
43 * The buffer list becomes empty after every context flush and must be
46 static inline unsigned radeon_add_to_buffer_list(struct r600_common_context
*rctx
,
47 struct r600_ring
*ring
,
48 struct r600_resource
*rbo
,
49 enum radeon_bo_usage usage
,
50 enum radeon_bo_priority priority
)
53 return rctx
->ws
->cs_add_buffer(ring
->cs
, rbo
->cs_buf
, usage
,
54 rbo
->domains
, priority
) * 4;
57 static inline void r600_emit_reloc(struct r600_common_context
*rctx
,
58 struct r600_ring
*ring
, struct r600_resource
*rbo
,
59 enum radeon_bo_usage usage
,
60 enum radeon_bo_priority priority
)
62 struct radeon_winsys_cs
*cs
= ring
->cs
;
63 bool has_vm
= ((struct r600_common_screen
*)rctx
->b
.screen
)->info
.r600_virtual_address
;
64 unsigned reloc
= radeon_add_to_buffer_list(rctx
, ring
, rbo
, usage
, priority
);
67 radeon_emit(cs
, PKT3(PKT3_NOP
, 0, 0));
68 radeon_emit(cs
, reloc
);
72 static inline void radeon_set_config_reg_seq(struct radeon_winsys_cs
*cs
, unsigned reg
, unsigned num
)
74 assert(reg
< R600_CONTEXT_REG_OFFSET
);
75 assert(cs
->cdw
+2+num
<= cs
->max_dw
);
76 radeon_emit(cs
, PKT3(PKT3_SET_CONFIG_REG
, num
, 0));
77 radeon_emit(cs
, (reg
- R600_CONFIG_REG_OFFSET
) >> 2);
80 static inline void radeon_set_config_reg(struct radeon_winsys_cs
*cs
, unsigned reg
, unsigned value
)
82 radeon_set_config_reg_seq(cs
, reg
, 1);
83 radeon_emit(cs
, value
);
86 static inline void radeon_set_context_reg_seq(struct radeon_winsys_cs
*cs
, unsigned reg
, unsigned num
)
88 assert(reg
>= R600_CONTEXT_REG_OFFSET
);
89 assert(cs
->cdw
+2+num
<= cs
->max_dw
);
90 radeon_emit(cs
, PKT3(PKT3_SET_CONTEXT_REG
, num
, 0));
91 radeon_emit(cs
, (reg
- R600_CONTEXT_REG_OFFSET
) >> 2);
94 static inline void radeon_set_context_reg(struct radeon_winsys_cs
*cs
, unsigned reg
, unsigned value
)
96 radeon_set_context_reg_seq(cs
, reg
, 1);
97 radeon_emit(cs
, value
);
100 static inline void radeon_set_sh_reg_seq(struct radeon_winsys_cs
*cs
, unsigned reg
, unsigned num
)
102 assert(reg
>= SI_SH_REG_OFFSET
&& reg
< SI_SH_REG_END
);
103 assert(cs
->cdw
+2+num
<= cs
->max_dw
);
104 radeon_emit(cs
, PKT3(PKT3_SET_SH_REG
, num
, 0));
105 radeon_emit(cs
, (reg
- SI_SH_REG_OFFSET
) >> 2);
108 static inline void radeon_set_sh_reg(struct radeon_winsys_cs
*cs
, unsigned reg
, unsigned value
)
110 radeon_set_sh_reg_seq(cs
, reg
, 1);
111 radeon_emit(cs
, value
);
114 static inline void radeon_set_uconfig_reg_seq(struct radeon_winsys_cs
*cs
, unsigned reg
, unsigned num
)
116 assert(reg
>= CIK_UCONFIG_REG_OFFSET
&& reg
< CIK_UCONFIG_REG_END
);
117 assert(cs
->cdw
+2+num
<= cs
->max_dw
);
118 radeon_emit(cs
, PKT3(PKT3_SET_UCONFIG_REG
, num
, 0));
119 radeon_emit(cs
, (reg
- CIK_UCONFIG_REG_OFFSET
) >> 2);
122 static inline void radeon_set_uconfig_reg(struct radeon_winsys_cs
*cs
, unsigned reg
, unsigned value
)
124 radeon_set_uconfig_reg_seq(cs
, reg
, 1);
125 radeon_emit(cs
, value
);