2 * Copyright 2013 Advanced Micro Devices, Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
23 * Authors: Marek Olšák <maraeo@gmail.com>
27 * This file contains helpers for writing commands to commands streams.
33 #include "r600_pipe_common.h"
34 #include "r600d_common.h"
36 static INLINE
uint64_t r600_resource_va(struct pipe_screen
*screen
,
37 struct pipe_resource
*resource
)
39 struct r600_common_screen
*rscreen
= (struct r600_common_screen
*)screen
;
40 struct r600_resource
*rresource
= (struct r600_resource
*)resource
;
42 return rscreen
->ws
->buffer_get_virtual_address(rresource
->cs_buf
);
45 static INLINE
unsigned r600_context_bo_reloc(struct r600_common_context
*rctx
,
46 struct r600_ring
*ring
,
47 struct r600_resource
*rbo
,
48 enum radeon_bo_usage usage
,
49 enum radeon_bo_priority priority
)
53 /* Make sure that all previous rings are flushed so that everything
54 * looks serialized from the driver point of view.
56 if (!ring
->flushing
) {
57 if (ring
== &rctx
->rings
.gfx
) {
58 if (rctx
->rings
.dma
.cs
) {
60 rctx
->rings
.dma
.flush(rctx
, RADEON_FLUSH_ASYNC
);
64 rctx
->rings
.gfx
.flush(rctx
, RADEON_FLUSH_ASYNC
);
67 return rctx
->ws
->cs_add_reloc(ring
->cs
, rbo
->cs_buf
, usage
,
68 rbo
->domains
, priority
) * 4;
71 static INLINE
void r600_emit_reloc(struct r600_common_context
*rctx
,
72 struct r600_ring
*ring
, struct r600_resource
*rbo
,
73 enum radeon_bo_usage usage
,
74 enum radeon_bo_priority priority
)
76 struct radeon_winsys_cs
*cs
= ring
->cs
;
77 bool has_vm
= ((struct r600_common_screen
*)rctx
->b
.screen
)->info
.r600_virtual_address
;
78 unsigned reloc
= r600_context_bo_reloc(rctx
, ring
, rbo
, usage
, priority
);
81 radeon_emit(cs
, PKT3(PKT3_NOP
, 0, 0));
82 radeon_emit(cs
, reloc
);
86 static INLINE
void r600_write_config_reg_seq(struct radeon_winsys_cs
*cs
, unsigned reg
, unsigned num
)
88 assert(reg
< R600_CONTEXT_REG_OFFSET
);
89 assert(cs
->cdw
+2+num
<= RADEON_MAX_CMDBUF_DWORDS
);
90 radeon_emit(cs
, PKT3(PKT3_SET_CONFIG_REG
, num
, 0));
91 radeon_emit(cs
, (reg
- R600_CONFIG_REG_OFFSET
) >> 2);
94 static INLINE
void r600_write_config_reg(struct radeon_winsys_cs
*cs
, unsigned reg
, unsigned value
)
96 r600_write_config_reg_seq(cs
, reg
, 1);
97 radeon_emit(cs
, value
);
100 static INLINE
void r600_write_context_reg_seq(struct radeon_winsys_cs
*cs
, unsigned reg
, unsigned num
)
102 assert(reg
>= R600_CONTEXT_REG_OFFSET
);
103 assert(cs
->cdw
+2+num
<= RADEON_MAX_CMDBUF_DWORDS
);
104 radeon_emit(cs
, PKT3(PKT3_SET_CONTEXT_REG
, num
, 0));
105 radeon_emit(cs
, (reg
- R600_CONTEXT_REG_OFFSET
) >> 2);
108 static INLINE
void r600_write_context_reg(struct radeon_winsys_cs
*cs
, unsigned reg
, unsigned value
)
110 r600_write_context_reg_seq(cs
, reg
, 1);
111 radeon_emit(cs
, value
);
114 static INLINE
void cik_write_uconfig_reg_seq(struct radeon_winsys_cs
*cs
, unsigned reg
, unsigned num
)
116 assert(reg
>= CIK_UCONFIG_REG_OFFSET
&& reg
< CIK_UCONFIG_REG_END
);
117 assert(cs
->cdw
+2+num
<= RADEON_MAX_CMDBUF_DWORDS
);
118 radeon_emit(cs
, PKT3(PKT3_SET_UCONFIG_REG
, num
, 0));
119 radeon_emit(cs
, (reg
- CIK_UCONFIG_REG_OFFSET
) >> 2);
122 static INLINE
void cik_write_uconfig_reg(struct radeon_winsys_cs
*cs
, unsigned reg
, unsigned value
)
124 cik_write_uconfig_reg_seq(cs
, reg
, 1);
125 radeon_emit(cs
, value
);