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r600g, radeonsi: fix primitives-generated query with disabled streamout
[mesa.git] / src / gallium / drivers / radeon / r600_query.c
1 /*
2 * Copyright 2010 Jerome Glisse <glisse@freedesktop.org>
3 * Copyright 2014 Marek Olšák <marek.olsak@amd.com>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * on the rights to use, copy, modify, merge, publish, distribute, sub
9 * license, and/or sell copies of the Software, and to permit persons to whom
10 * the Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
21 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
22 * USE OR OTHER DEALINGS IN THE SOFTWARE.
23 */
24
25 #include "r600_cs.h"
26 #include "util/u_memory.h"
27
28
29 struct r600_query_buffer {
30 /* The buffer where query results are stored. */
31 struct r600_resource *buf;
32 /* Offset of the next free result after current query data */
33 unsigned results_end;
34 /* If a query buffer is full, a new buffer is created and the old one
35 * is put in here. When we calculate the result, we sum up the samples
36 * from all buffers. */
37 struct r600_query_buffer *previous;
38 };
39
40 struct r600_query {
41 /* The query buffer and how many results are in it. */
42 struct r600_query_buffer buffer;
43 /* The type of query */
44 unsigned type;
45 /* Size of the result in memory for both begin_query and end_query,
46 * this can be one or two numbers, or it could even be a size of a structure. */
47 unsigned result_size;
48 /* The number of dwords for begin_query or end_query. */
49 unsigned num_cs_dw;
50 /* linked list of queries */
51 struct list_head list;
52 /* for custom non-GPU queries */
53 uint64_t begin_result;
54 uint64_t end_result;
55 };
56
57
58 static bool r600_is_timer_query(unsigned type)
59 {
60 return type == PIPE_QUERY_TIME_ELAPSED ||
61 type == PIPE_QUERY_TIMESTAMP ||
62 type == PIPE_QUERY_TIMESTAMP_DISJOINT;
63 }
64
65 static bool r600_query_needs_begin(unsigned type)
66 {
67 return type != PIPE_QUERY_GPU_FINISHED &&
68 type != PIPE_QUERY_TIMESTAMP;
69 }
70
71 static struct r600_resource *r600_new_query_buffer(struct r600_common_context *ctx, unsigned type)
72 {
73 unsigned j, i, num_results, buf_size = 4096;
74 uint32_t *results;
75
76 /* Non-GPU queries. */
77 switch (type) {
78 case R600_QUERY_DRAW_CALLS:
79 case R600_QUERY_REQUESTED_VRAM:
80 case R600_QUERY_REQUESTED_GTT:
81 case R600_QUERY_BUFFER_WAIT_TIME:
82 return NULL;
83 }
84
85 /* Queries are normally read by the CPU after
86 * being written by the gpu, hence staging is probably a good
87 * usage pattern.
88 */
89 struct r600_resource *buf = (struct r600_resource*)
90 pipe_buffer_create(ctx->b.screen, PIPE_BIND_CUSTOM,
91 PIPE_USAGE_STAGING, buf_size);
92
93 switch (type) {
94 case PIPE_QUERY_OCCLUSION_COUNTER:
95 case PIPE_QUERY_OCCLUSION_PREDICATE:
96 results = r600_buffer_map_sync_with_rings(ctx, buf, PIPE_TRANSFER_WRITE);
97 memset(results, 0, buf_size);
98
99 /* Set top bits for unused backends. */
100 num_results = buf_size / (16 * ctx->max_db);
101 for (j = 0; j < num_results; j++) {
102 for (i = 0; i < ctx->max_db; i++) {
103 if (!(ctx->backend_mask & (1<<i))) {
104 results[(i * 4)+1] = 0x80000000;
105 results[(i * 4)+3] = 0x80000000;
106 }
107 }
108 results += 4 * ctx->max_db;
109 }
110 ctx->ws->buffer_unmap(buf->cs_buf);
111 break;
112 case PIPE_QUERY_TIME_ELAPSED:
113 case PIPE_QUERY_TIMESTAMP:
114 break;
115 case PIPE_QUERY_PRIMITIVES_EMITTED:
116 case PIPE_QUERY_PRIMITIVES_GENERATED:
117 case PIPE_QUERY_SO_STATISTICS:
118 case PIPE_QUERY_SO_OVERFLOW_PREDICATE:
119 case PIPE_QUERY_PIPELINE_STATISTICS:
120 results = r600_buffer_map_sync_with_rings(ctx, buf, PIPE_TRANSFER_WRITE);
121 memset(results, 0, buf_size);
122 ctx->ws->buffer_unmap(buf->cs_buf);
123 break;
124 default:
125 assert(0);
126 }
127 return buf;
128 }
129
130 static void r600_update_occlusion_query_state(struct r600_common_context *rctx,
131 unsigned type, int diff)
132 {
133 if (type == PIPE_QUERY_OCCLUSION_COUNTER ||
134 type == PIPE_QUERY_OCCLUSION_PREDICATE) {
135 bool old_enable = rctx->num_occlusion_queries != 0;
136 bool enable;
137
138 rctx->num_occlusion_queries += diff;
139 assert(rctx->num_occlusion_queries >= 0);
140
141 enable = rctx->num_occlusion_queries != 0;
142
143 if (enable != old_enable) {
144 rctx->set_occlusion_query_state(&rctx->b, enable);
145 }
146 }
147 }
148
149 static void r600_emit_query_begin(struct r600_common_context *ctx, struct r600_query *query)
150 {
151 struct radeon_winsys_cs *cs = ctx->rings.gfx.cs;
152 uint64_t va;
153
154 r600_update_occlusion_query_state(ctx, query->type, 1);
155 r600_update_prims_generated_query_state(ctx, query->type, 1);
156 ctx->need_gfx_cs_space(&ctx->b, query->num_cs_dw * 2, TRUE);
157
158 /* Get a new query buffer if needed. */
159 if (query->buffer.results_end + query->result_size > query->buffer.buf->b.b.width0) {
160 struct r600_query_buffer *qbuf = MALLOC_STRUCT(r600_query_buffer);
161 *qbuf = query->buffer;
162 query->buffer.buf = r600_new_query_buffer(ctx, query->type);
163 query->buffer.results_end = 0;
164 query->buffer.previous = qbuf;
165 }
166
167 /* emit begin query */
168 va = r600_resource_va(ctx->b.screen, (void*)query->buffer.buf);
169 va += query->buffer.results_end;
170
171 switch (query->type) {
172 case PIPE_QUERY_OCCLUSION_COUNTER:
173 case PIPE_QUERY_OCCLUSION_PREDICATE:
174 radeon_emit(cs, PKT3(PKT3_EVENT_WRITE, 2, 0));
175 radeon_emit(cs, EVENT_TYPE(EVENT_TYPE_ZPASS_DONE) | EVENT_INDEX(1));
176 radeon_emit(cs, va);
177 radeon_emit(cs, (va >> 32UL) & 0xFF);
178 break;
179 case PIPE_QUERY_PRIMITIVES_EMITTED:
180 case PIPE_QUERY_PRIMITIVES_GENERATED:
181 case PIPE_QUERY_SO_STATISTICS:
182 case PIPE_QUERY_SO_OVERFLOW_PREDICATE:
183 radeon_emit(cs, PKT3(PKT3_EVENT_WRITE, 2, 0));
184 radeon_emit(cs, EVENT_TYPE(EVENT_TYPE_SAMPLE_STREAMOUTSTATS) | EVENT_INDEX(3));
185 radeon_emit(cs, va);
186 radeon_emit(cs, (va >> 32UL) & 0xFF);
187 break;
188 case PIPE_QUERY_TIME_ELAPSED:
189 radeon_emit(cs, PKT3(PKT3_EVENT_WRITE_EOP, 4, 0));
190 radeon_emit(cs, EVENT_TYPE(EVENT_TYPE_CACHE_FLUSH_AND_INV_TS_EVENT) | EVENT_INDEX(5));
191 radeon_emit(cs, va);
192 radeon_emit(cs, (3 << 29) | ((va >> 32UL) & 0xFF));
193 radeon_emit(cs, 0);
194 radeon_emit(cs, 0);
195 break;
196 case PIPE_QUERY_PIPELINE_STATISTICS:
197 if (!ctx->num_pipelinestat_queries) {
198 radeon_emit(cs, PKT3(PKT3_EVENT_WRITE, 0, 0));
199 radeon_emit(cs, EVENT_TYPE(EVENT_TYPE_PIPELINESTAT_START) | EVENT_INDEX(0));
200 }
201 ctx->num_pipelinestat_queries++;
202 radeon_emit(cs, PKT3(PKT3_EVENT_WRITE, 2, 0));
203 radeon_emit(cs, EVENT_TYPE(EVENT_TYPE_SAMPLE_PIPELINESTAT) | EVENT_INDEX(2));
204 radeon_emit(cs, va);
205 radeon_emit(cs, (va >> 32UL) & 0xFF);
206 break;
207 default:
208 assert(0);
209 }
210 r600_emit_reloc(ctx, &ctx->rings.gfx, query->buffer.buf, RADEON_USAGE_WRITE,
211 RADEON_PRIO_MIN);
212
213 if (!r600_is_timer_query(query->type)) {
214 ctx->num_cs_dw_nontimer_queries_suspend += query->num_cs_dw;
215 }
216 }
217
218 static void r600_emit_query_end(struct r600_common_context *ctx, struct r600_query *query)
219 {
220 struct radeon_winsys_cs *cs = ctx->rings.gfx.cs;
221 uint64_t va;
222
223 /* The queries which need begin already called this in begin_query. */
224 if (!r600_query_needs_begin(query->type)) {
225 ctx->need_gfx_cs_space(&ctx->b, query->num_cs_dw, FALSE);
226 }
227
228 va = r600_resource_va(ctx->b.screen, (void*)query->buffer.buf);
229 /* emit end query */
230 switch (query->type) {
231 case PIPE_QUERY_OCCLUSION_COUNTER:
232 case PIPE_QUERY_OCCLUSION_PREDICATE:
233 va += query->buffer.results_end + 8;
234 radeon_emit(cs, PKT3(PKT3_EVENT_WRITE, 2, 0));
235 radeon_emit(cs, EVENT_TYPE(EVENT_TYPE_ZPASS_DONE) | EVENT_INDEX(1));
236 radeon_emit(cs, va);
237 radeon_emit(cs, (va >> 32UL) & 0xFF);
238 break;
239 case PIPE_QUERY_PRIMITIVES_EMITTED:
240 case PIPE_QUERY_PRIMITIVES_GENERATED:
241 case PIPE_QUERY_SO_STATISTICS:
242 case PIPE_QUERY_SO_OVERFLOW_PREDICATE:
243 va += query->buffer.results_end + query->result_size/2;
244 radeon_emit(cs, PKT3(PKT3_EVENT_WRITE, 2, 0));
245 radeon_emit(cs, EVENT_TYPE(EVENT_TYPE_SAMPLE_STREAMOUTSTATS) | EVENT_INDEX(3));
246 radeon_emit(cs, va);
247 radeon_emit(cs, (va >> 32UL) & 0xFF);
248 break;
249 case PIPE_QUERY_TIME_ELAPSED:
250 va += query->buffer.results_end + query->result_size/2;
251 /* fall through */
252 case PIPE_QUERY_TIMESTAMP:
253 radeon_emit(cs, PKT3(PKT3_EVENT_WRITE_EOP, 4, 0));
254 radeon_emit(cs, EVENT_TYPE(EVENT_TYPE_CACHE_FLUSH_AND_INV_TS_EVENT) | EVENT_INDEX(5));
255 radeon_emit(cs, va);
256 radeon_emit(cs, (3 << 29) | ((va >> 32UL) & 0xFF));
257 radeon_emit(cs, 0);
258 radeon_emit(cs, 0);
259 break;
260 case PIPE_QUERY_PIPELINE_STATISTICS:
261 assert(ctx->num_pipelinestat_queries > 0);
262 ctx->num_pipelinestat_queries--;
263 if (!ctx->num_pipelinestat_queries) {
264 radeon_emit(cs, PKT3(PKT3_EVENT_WRITE, 0, 0));
265 radeon_emit(cs, EVENT_TYPE(EVENT_TYPE_PIPELINESTAT_STOP) | EVENT_INDEX(0));
266 }
267 va += query->buffer.results_end + query->result_size/2;
268 radeon_emit(cs, PKT3(PKT3_EVENT_WRITE, 2, 0));
269 radeon_emit(cs, EVENT_TYPE(EVENT_TYPE_SAMPLE_PIPELINESTAT) | EVENT_INDEX(2));
270 radeon_emit(cs, va);
271 radeon_emit(cs, (va >> 32UL) & 0xFF);
272 break;
273 default:
274 assert(0);
275 }
276 r600_emit_reloc(ctx, &ctx->rings.gfx, query->buffer.buf, RADEON_USAGE_WRITE,
277 RADEON_PRIO_MIN);
278
279 query->buffer.results_end += query->result_size;
280
281 if (r600_query_needs_begin(query->type)) {
282 if (!r600_is_timer_query(query->type)) {
283 ctx->num_cs_dw_nontimer_queries_suspend -= query->num_cs_dw;
284 }
285 }
286
287 r600_update_occlusion_query_state(ctx, query->type, -1);
288 r600_update_prims_generated_query_state(ctx, query->type, -1);
289 }
290
291 static void r600_emit_query_predication(struct r600_common_context *ctx, struct r600_query *query,
292 int operation, bool flag_wait)
293 {
294 struct radeon_winsys_cs *cs = ctx->rings.gfx.cs;
295
296 if (operation == PREDICATION_OP_CLEAR) {
297 ctx->need_gfx_cs_space(&ctx->b, 3, FALSE);
298
299 radeon_emit(cs, PKT3(PKT3_SET_PREDICATION, 1, 0));
300 radeon_emit(cs, 0);
301 radeon_emit(cs, PRED_OP(PREDICATION_OP_CLEAR));
302 } else {
303 struct r600_query_buffer *qbuf;
304 unsigned count;
305 uint32_t op;
306
307 /* Find how many results there are. */
308 count = 0;
309 for (qbuf = &query->buffer; qbuf; qbuf = qbuf->previous) {
310 count += qbuf->results_end / query->result_size;
311 }
312
313 ctx->need_gfx_cs_space(&ctx->b, 5 * count, TRUE);
314
315 op = PRED_OP(operation) | PREDICATION_DRAW_VISIBLE |
316 (flag_wait ? PREDICATION_HINT_WAIT : PREDICATION_HINT_NOWAIT_DRAW);
317
318 /* emit predicate packets for all data blocks */
319 for (qbuf = &query->buffer; qbuf; qbuf = qbuf->previous) {
320 unsigned results_base = 0;
321 uint64_t va = r600_resource_va(ctx->b.screen, &qbuf->buf->b.b);
322
323 while (results_base < qbuf->results_end) {
324 radeon_emit(cs, PKT3(PKT3_SET_PREDICATION, 1, 0));
325 radeon_emit(cs, (va + results_base) & 0xFFFFFFFFUL);
326 radeon_emit(cs, op | (((va + results_base) >> 32UL) & 0xFF));
327 r600_emit_reloc(ctx, &ctx->rings.gfx, qbuf->buf, RADEON_USAGE_READ,
328 RADEON_PRIO_MIN);
329 results_base += query->result_size;
330
331 /* set CONTINUE bit for all packets except the first */
332 op |= PREDICATION_CONTINUE;
333 }
334 }
335 }
336 }
337
338 static struct pipe_query *r600_create_query(struct pipe_context *ctx, unsigned query_type)
339 {
340 struct r600_common_context *rctx = (struct r600_common_context *)ctx;
341 struct r600_query *query;
342 bool skip_allocation = false;
343
344 query = CALLOC_STRUCT(r600_query);
345 if (query == NULL)
346 return NULL;
347
348 query->type = query_type;
349
350 switch (query_type) {
351 case PIPE_QUERY_OCCLUSION_COUNTER:
352 case PIPE_QUERY_OCCLUSION_PREDICATE:
353 query->result_size = 16 * rctx->max_db;
354 query->num_cs_dw = 6;
355 break;
356 case PIPE_QUERY_TIME_ELAPSED:
357 query->result_size = 16;
358 query->num_cs_dw = 8;
359 break;
360 case PIPE_QUERY_TIMESTAMP:
361 query->result_size = 8;
362 query->num_cs_dw = 8;
363 break;
364 case PIPE_QUERY_PRIMITIVES_EMITTED:
365 case PIPE_QUERY_PRIMITIVES_GENERATED:
366 case PIPE_QUERY_SO_STATISTICS:
367 case PIPE_QUERY_SO_OVERFLOW_PREDICATE:
368 /* NumPrimitivesWritten, PrimitiveStorageNeeded. */
369 query->result_size = 32;
370 query->num_cs_dw = 6;
371 break;
372 case PIPE_QUERY_PIPELINE_STATISTICS:
373 /* 11 values on EG, 8 on R600. */
374 query->result_size = (rctx->chip_class >= EVERGREEN ? 11 : 8) * 16;
375 query->num_cs_dw = 8;
376 break;
377 /* Non-GPU queries. */
378 case R600_QUERY_DRAW_CALLS:
379 case R600_QUERY_REQUESTED_VRAM:
380 case R600_QUERY_REQUESTED_GTT:
381 case R600_QUERY_BUFFER_WAIT_TIME:
382 skip_allocation = true;
383 break;
384 default:
385 assert(0);
386 FREE(query);
387 return NULL;
388 }
389
390 if (!skip_allocation) {
391 query->buffer.buf = r600_new_query_buffer(rctx, query_type);
392 if (!query->buffer.buf) {
393 FREE(query);
394 return NULL;
395 }
396 }
397 return (struct pipe_query*)query;
398 }
399
400 static void r600_destroy_query(struct pipe_context *ctx, struct pipe_query *query)
401 {
402 struct r600_query *rquery = (struct r600_query*)query;
403 struct r600_query_buffer *prev = rquery->buffer.previous;
404
405 /* Release all query buffers. */
406 while (prev) {
407 struct r600_query_buffer *qbuf = prev;
408 prev = prev->previous;
409 pipe_resource_reference((struct pipe_resource**)&qbuf->buf, NULL);
410 FREE(qbuf);
411 }
412
413 pipe_resource_reference((struct pipe_resource**)&rquery->buffer.buf, NULL);
414 FREE(query);
415 }
416
417 static void r600_begin_query(struct pipe_context *ctx, struct pipe_query *query)
418 {
419 struct r600_common_context *rctx = (struct r600_common_context *)ctx;
420 struct r600_query *rquery = (struct r600_query *)query;
421 struct r600_query_buffer *prev = rquery->buffer.previous;
422
423 if (!r600_query_needs_begin(rquery->type)) {
424 assert(0);
425 return;
426 }
427
428 /* Non-GPU queries. */
429 switch (rquery->type) {
430 case R600_QUERY_DRAW_CALLS:
431 rquery->begin_result = rctx->num_draw_calls;
432 return;
433 case R600_QUERY_REQUESTED_VRAM:
434 case R600_QUERY_REQUESTED_GTT:
435 rquery->begin_result = 0;
436 return;
437 case R600_QUERY_BUFFER_WAIT_TIME:
438 rquery->begin_result = rctx->ws->query_value(rctx->ws, RADEON_BUFFER_WAIT_TIME_NS);
439 return;
440 }
441
442 /* Discard the old query buffers. */
443 while (prev) {
444 struct r600_query_buffer *qbuf = prev;
445 prev = prev->previous;
446 pipe_resource_reference((struct pipe_resource**)&qbuf->buf, NULL);
447 FREE(qbuf);
448 }
449
450 /* Obtain a new buffer if the current one can't be mapped without a stall. */
451 if (r600_rings_is_buffer_referenced(rctx, rquery->buffer.buf->cs_buf, RADEON_USAGE_READWRITE) ||
452 rctx->ws->buffer_is_busy(rquery->buffer.buf->buf, RADEON_USAGE_READWRITE)) {
453 pipe_resource_reference((struct pipe_resource**)&rquery->buffer.buf, NULL);
454 rquery->buffer.buf = r600_new_query_buffer(rctx, rquery->type);
455 }
456
457 rquery->buffer.results_end = 0;
458 rquery->buffer.previous = NULL;
459
460 r600_emit_query_begin(rctx, rquery);
461
462 if (!r600_is_timer_query(rquery->type)) {
463 LIST_ADDTAIL(&rquery->list, &rctx->active_nontimer_queries);
464 }
465 }
466
467 static void r600_end_query(struct pipe_context *ctx, struct pipe_query *query)
468 {
469 struct r600_common_context *rctx = (struct r600_common_context *)ctx;
470 struct r600_query *rquery = (struct r600_query *)query;
471
472 /* Non-GPU queries. */
473 switch (rquery->type) {
474 case R600_QUERY_DRAW_CALLS:
475 rquery->end_result = rctx->num_draw_calls;
476 return;
477 case R600_QUERY_REQUESTED_VRAM:
478 rquery->end_result = rctx->ws->query_value(rctx->ws, RADEON_REQUESTED_VRAM_MEMORY);
479 return;
480 case R600_QUERY_REQUESTED_GTT:
481 rquery->end_result = rctx->ws->query_value(rctx->ws, RADEON_REQUESTED_GTT_MEMORY);
482 return;
483 case R600_QUERY_BUFFER_WAIT_TIME:
484 rquery->end_result = rctx->ws->query_value(rctx->ws, RADEON_BUFFER_WAIT_TIME_NS);
485 return;
486 }
487
488 r600_emit_query_end(rctx, rquery);
489
490 if (r600_query_needs_begin(rquery->type) && !r600_is_timer_query(rquery->type)) {
491 LIST_DELINIT(&rquery->list);
492 }
493 }
494
495 static unsigned r600_query_read_result(char *map, unsigned start_index, unsigned end_index,
496 bool test_status_bit)
497 {
498 uint32_t *current_result = (uint32_t*)map;
499 uint64_t start, end;
500
501 start = (uint64_t)current_result[start_index] |
502 (uint64_t)current_result[start_index+1] << 32;
503 end = (uint64_t)current_result[end_index] |
504 (uint64_t)current_result[end_index+1] << 32;
505
506 if (!test_status_bit ||
507 ((start & 0x8000000000000000UL) && (end & 0x8000000000000000UL))) {
508 return end - start;
509 }
510 return 0;
511 }
512
513 static boolean r600_get_query_buffer_result(struct r600_common_context *ctx,
514 struct r600_query *query,
515 struct r600_query_buffer *qbuf,
516 boolean wait,
517 union pipe_query_result *result)
518 {
519 unsigned results_base = 0;
520 char *map;
521
522 /* Non-GPU queries. */
523 switch (query->type) {
524 case R600_QUERY_DRAW_CALLS:
525 case R600_QUERY_REQUESTED_VRAM:
526 case R600_QUERY_REQUESTED_GTT:
527 case R600_QUERY_BUFFER_WAIT_TIME:
528 result->u64 = query->end_result - query->begin_result;
529 return TRUE;
530 }
531
532 map = r600_buffer_map_sync_with_rings(ctx, qbuf->buf,
533 PIPE_TRANSFER_READ |
534 (wait ? 0 : PIPE_TRANSFER_DONTBLOCK));
535 if (!map)
536 return FALSE;
537
538 /* count all results across all data blocks */
539 switch (query->type) {
540 case PIPE_QUERY_OCCLUSION_COUNTER:
541 while (results_base != qbuf->results_end) {
542 result->u64 +=
543 r600_query_read_result(map + results_base, 0, 2, true);
544 results_base += 16;
545 }
546 break;
547 case PIPE_QUERY_OCCLUSION_PREDICATE:
548 while (results_base != qbuf->results_end) {
549 result->b = result->b ||
550 r600_query_read_result(map + results_base, 0, 2, true) != 0;
551 results_base += 16;
552 }
553 break;
554 case PIPE_QUERY_TIME_ELAPSED:
555 while (results_base != qbuf->results_end) {
556 result->u64 +=
557 r600_query_read_result(map + results_base, 0, 2, false);
558 results_base += query->result_size;
559 }
560 break;
561 case PIPE_QUERY_TIMESTAMP:
562 {
563 uint32_t *current_result = (uint32_t*)map;
564 result->u64 = (uint64_t)current_result[0] |
565 (uint64_t)current_result[1] << 32;
566 break;
567 }
568 case PIPE_QUERY_PRIMITIVES_EMITTED:
569 /* SAMPLE_STREAMOUTSTATS stores this structure:
570 * {
571 * u64 NumPrimitivesWritten;
572 * u64 PrimitiveStorageNeeded;
573 * }
574 * We only need NumPrimitivesWritten here. */
575 while (results_base != qbuf->results_end) {
576 result->u64 +=
577 r600_query_read_result(map + results_base, 2, 6, true);
578 results_base += query->result_size;
579 }
580 break;
581 case PIPE_QUERY_PRIMITIVES_GENERATED:
582 /* Here we read PrimitiveStorageNeeded. */
583 while (results_base != qbuf->results_end) {
584 result->u64 +=
585 r600_query_read_result(map + results_base, 0, 4, true);
586 results_base += query->result_size;
587 }
588 break;
589 case PIPE_QUERY_SO_STATISTICS:
590 while (results_base != qbuf->results_end) {
591 result->so_statistics.num_primitives_written +=
592 r600_query_read_result(map + results_base, 2, 6, true);
593 result->so_statistics.primitives_storage_needed +=
594 r600_query_read_result(map + results_base, 0, 4, true);
595 results_base += query->result_size;
596 }
597 break;
598 case PIPE_QUERY_SO_OVERFLOW_PREDICATE:
599 while (results_base != qbuf->results_end) {
600 result->b = result->b ||
601 r600_query_read_result(map + results_base, 2, 6, true) !=
602 r600_query_read_result(map + results_base, 0, 4, true);
603 results_base += query->result_size;
604 }
605 break;
606 case PIPE_QUERY_PIPELINE_STATISTICS:
607 if (ctx->chip_class >= EVERGREEN) {
608 while (results_base != qbuf->results_end) {
609 result->pipeline_statistics.ps_invocations +=
610 r600_query_read_result(map + results_base, 0, 22, false);
611 result->pipeline_statistics.c_primitives +=
612 r600_query_read_result(map + results_base, 2, 24, false);
613 result->pipeline_statistics.c_invocations +=
614 r600_query_read_result(map + results_base, 4, 26, false);
615 result->pipeline_statistics.vs_invocations +=
616 r600_query_read_result(map + results_base, 6, 28, false);
617 result->pipeline_statistics.gs_invocations +=
618 r600_query_read_result(map + results_base, 8, 30, false);
619 result->pipeline_statistics.gs_primitives +=
620 r600_query_read_result(map + results_base, 10, 32, false);
621 result->pipeline_statistics.ia_primitives +=
622 r600_query_read_result(map + results_base, 12, 34, false);
623 result->pipeline_statistics.ia_vertices +=
624 r600_query_read_result(map + results_base, 14, 36, false);
625 result->pipeline_statistics.hs_invocations +=
626 r600_query_read_result(map + results_base, 16, 38, false);
627 result->pipeline_statistics.ds_invocations +=
628 r600_query_read_result(map + results_base, 18, 40, false);
629 result->pipeline_statistics.cs_invocations +=
630 r600_query_read_result(map + results_base, 20, 42, false);
631 results_base += query->result_size;
632 }
633 } else {
634 while (results_base != qbuf->results_end) {
635 result->pipeline_statistics.ps_invocations +=
636 r600_query_read_result(map + results_base, 0, 16, false);
637 result->pipeline_statistics.c_primitives +=
638 r600_query_read_result(map + results_base, 2, 18, false);
639 result->pipeline_statistics.c_invocations +=
640 r600_query_read_result(map + results_base, 4, 20, false);
641 result->pipeline_statistics.vs_invocations +=
642 r600_query_read_result(map + results_base, 6, 22, false);
643 result->pipeline_statistics.gs_invocations +=
644 r600_query_read_result(map + results_base, 8, 24, false);
645 result->pipeline_statistics.gs_primitives +=
646 r600_query_read_result(map + results_base, 10, 26, false);
647 result->pipeline_statistics.ia_primitives +=
648 r600_query_read_result(map + results_base, 12, 28, false);
649 result->pipeline_statistics.ia_vertices +=
650 r600_query_read_result(map + results_base, 14, 30, false);
651 results_base += query->result_size;
652 }
653 }
654 #if 0 /* for testing */
655 printf("Pipeline stats: IA verts=%llu, IA prims=%llu, VS=%llu, HS=%llu, "
656 "DS=%llu, GS=%llu, GS prims=%llu, Clipper=%llu, "
657 "Clipper prims=%llu, PS=%llu, CS=%llu\n",
658 result->pipeline_statistics.ia_vertices,
659 result->pipeline_statistics.ia_primitives,
660 result->pipeline_statistics.vs_invocations,
661 result->pipeline_statistics.hs_invocations,
662 result->pipeline_statistics.ds_invocations,
663 result->pipeline_statistics.gs_invocations,
664 result->pipeline_statistics.gs_primitives,
665 result->pipeline_statistics.c_invocations,
666 result->pipeline_statistics.c_primitives,
667 result->pipeline_statistics.ps_invocations,
668 result->pipeline_statistics.cs_invocations);
669 #endif
670 break;
671 default:
672 assert(0);
673 }
674
675 ctx->ws->buffer_unmap(qbuf->buf->cs_buf);
676 return TRUE;
677 }
678
679 static boolean r600_get_query_result(struct pipe_context *ctx,
680 struct pipe_query *query,
681 boolean wait, union pipe_query_result *result)
682 {
683 struct r600_common_context *rctx = (struct r600_common_context *)ctx;
684 struct r600_query *rquery = (struct r600_query *)query;
685 struct r600_query_buffer *qbuf;
686
687 util_query_clear_result(result, rquery->type);
688
689 for (qbuf = &rquery->buffer; qbuf; qbuf = qbuf->previous) {
690 if (!r600_get_query_buffer_result(rctx, rquery, qbuf, wait, result)) {
691 return FALSE;
692 }
693 }
694
695 /* Convert the time to expected units. */
696 if (rquery->type == PIPE_QUERY_TIME_ELAPSED ||
697 rquery->type == PIPE_QUERY_TIMESTAMP) {
698 result->u64 = (1000000 * result->u64) / rctx->screen->info.r600_clock_crystal_freq;
699 }
700 return TRUE;
701 }
702
703 static void r600_render_condition(struct pipe_context *ctx,
704 struct pipe_query *query,
705 boolean condition,
706 uint mode)
707 {
708 struct r600_common_context *rctx = (struct r600_common_context *)ctx;
709 struct r600_query *rquery = (struct r600_query *)query;
710 bool wait_flag = false;
711
712 rctx->current_render_cond = query;
713 rctx->current_render_cond_cond = condition;
714 rctx->current_render_cond_mode = mode;
715
716 if (query == NULL) {
717 if (rctx->predicate_drawing) {
718 rctx->predicate_drawing = false;
719 r600_emit_query_predication(rctx, NULL, PREDICATION_OP_CLEAR, false);
720 }
721 return;
722 }
723
724 if (mode == PIPE_RENDER_COND_WAIT ||
725 mode == PIPE_RENDER_COND_BY_REGION_WAIT) {
726 wait_flag = true;
727 }
728
729 rctx->predicate_drawing = true;
730
731 switch (rquery->type) {
732 case PIPE_QUERY_OCCLUSION_COUNTER:
733 case PIPE_QUERY_OCCLUSION_PREDICATE:
734 r600_emit_query_predication(rctx, rquery, PREDICATION_OP_ZPASS, wait_flag);
735 break;
736 case PIPE_QUERY_PRIMITIVES_EMITTED:
737 case PIPE_QUERY_PRIMITIVES_GENERATED:
738 case PIPE_QUERY_SO_STATISTICS:
739 case PIPE_QUERY_SO_OVERFLOW_PREDICATE:
740 r600_emit_query_predication(rctx, rquery, PREDICATION_OP_PRIMCOUNT, wait_flag);
741 break;
742 default:
743 assert(0);
744 }
745 }
746
747 void r600_suspend_nontimer_queries(struct r600_common_context *ctx)
748 {
749 struct r600_query *query;
750
751 LIST_FOR_EACH_ENTRY(query, &ctx->active_nontimer_queries, list) {
752 r600_emit_query_end(ctx, query);
753 }
754 assert(ctx->num_cs_dw_nontimer_queries_suspend == 0);
755 }
756
757 void r600_resume_nontimer_queries(struct r600_common_context *ctx)
758 {
759 struct r600_query *query;
760
761 assert(ctx->num_cs_dw_nontimer_queries_suspend == 0);
762
763 LIST_FOR_EACH_ENTRY(query, &ctx->active_nontimer_queries, list) {
764 r600_emit_query_begin(ctx, query);
765 }
766 }
767
768 /* Get backends mask */
769 void r600_query_init_backend_mask(struct r600_common_context *ctx)
770 {
771 struct radeon_winsys_cs *cs = ctx->rings.gfx.cs;
772 struct r600_resource *buffer;
773 uint32_t *results;
774 unsigned num_backends = ctx->screen->info.r600_num_backends;
775 unsigned i, mask = 0;
776 uint64_t va;
777
778 /* if backend_map query is supported by the kernel */
779 if (ctx->screen->info.r600_backend_map_valid) {
780 unsigned num_tile_pipes = ctx->screen->info.r600_num_tile_pipes;
781 unsigned backend_map = ctx->screen->info.r600_backend_map;
782 unsigned item_width, item_mask;
783
784 if (ctx->chip_class >= EVERGREEN) {
785 item_width = 4;
786 item_mask = 0x7;
787 } else {
788 item_width = 2;
789 item_mask = 0x3;
790 }
791
792 while(num_tile_pipes--) {
793 i = backend_map & item_mask;
794 mask |= (1<<i);
795 backend_map >>= item_width;
796 }
797 if (mask != 0) {
798 ctx->backend_mask = mask;
799 return;
800 }
801 }
802
803 /* otherwise backup path for older kernels */
804
805 /* create buffer for event data */
806 buffer = (struct r600_resource*)
807 pipe_buffer_create(ctx->b.screen, PIPE_BIND_CUSTOM,
808 PIPE_USAGE_STAGING, ctx->max_db*16);
809 if (!buffer)
810 goto err;
811 va = r600_resource_va(ctx->b.screen, (void*)buffer);
812
813 /* initialize buffer with zeroes */
814 results = r600_buffer_map_sync_with_rings(ctx, buffer, PIPE_TRANSFER_WRITE);
815 if (results) {
816 memset(results, 0, ctx->max_db * 4 * 4);
817 ctx->ws->buffer_unmap(buffer->cs_buf);
818
819 /* emit EVENT_WRITE for ZPASS_DONE */
820 radeon_emit(cs, PKT3(PKT3_EVENT_WRITE, 2, 0));
821 radeon_emit(cs, EVENT_TYPE(EVENT_TYPE_ZPASS_DONE) | EVENT_INDEX(1));
822 radeon_emit(cs, va);
823 radeon_emit(cs, va >> 32);
824
825 r600_emit_reloc(ctx, &ctx->rings.gfx, buffer, RADEON_USAGE_WRITE, RADEON_PRIO_MIN);
826
827 /* analyze results */
828 results = r600_buffer_map_sync_with_rings(ctx, buffer, PIPE_TRANSFER_READ);
829 if (results) {
830 for(i = 0; i < ctx->max_db; i++) {
831 /* at least highest bit will be set if backend is used */
832 if (results[i*4 + 1])
833 mask |= (1<<i);
834 }
835 ctx->ws->buffer_unmap(buffer->cs_buf);
836 }
837 }
838
839 pipe_resource_reference((struct pipe_resource**)&buffer, NULL);
840
841 if (mask != 0) {
842 ctx->backend_mask = mask;
843 return;
844 }
845
846 err:
847 /* fallback to old method - set num_backends lower bits to 1 */
848 ctx->backend_mask = (~((uint32_t)0))>>(32-num_backends);
849 return;
850 }
851
852 void r600_query_init(struct r600_common_context *rctx)
853 {
854 rctx->b.create_query = r600_create_query;
855 rctx->b.destroy_query = r600_destroy_query;
856 rctx->b.begin_query = r600_begin_query;
857 rctx->b.end_query = r600_end_query;
858 rctx->b.get_query_result = r600_get_query_result;
859
860 if (((struct r600_common_screen*)rctx->b.screen)->info.r600_num_backends > 0)
861 rctx->b.render_condition = r600_render_condition;
862
863 LIST_INITHEAD(&rctx->active_nontimer_queries);
864 }