vc4: Try to schedule QIR instructions between writing to and reading math.
[mesa.git] / src / gallium / drivers / radeon / r600_query.h
1 /*
2 * Copyright 2015 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 *
23 * Authors:
24 * Nicolai Hähnle <nicolai.haehnle@amd.com>
25 *
26 */
27
28 #ifndef R600_QUERY_H
29 #define R600_QUERY_H
30
31 #include "pipe/p_defines.h"
32 #include "pipe/p_state.h"
33 #include "util/list.h"
34
35 struct pipe_context;
36 struct pipe_query;
37 struct pipe_resource;
38
39 struct r600_common_context;
40 struct r600_common_screen;
41 struct r600_query;
42 struct r600_query_hw;
43 struct r600_resource;
44
45 enum {
46 R600_QUERY_DRAW_CALLS = PIPE_QUERY_DRIVER_SPECIFIC,
47 R600_QUERY_SPILL_DRAW_CALLS,
48 R600_QUERY_COMPUTE_CALLS,
49 R600_QUERY_SPILL_COMPUTE_CALLS,
50 R600_QUERY_DMA_CALLS,
51 R600_QUERY_CP_DMA_CALLS,
52 R600_QUERY_NUM_VS_FLUSHES,
53 R600_QUERY_NUM_PS_FLUSHES,
54 R600_QUERY_NUM_CS_FLUSHES,
55 R600_QUERY_REQUESTED_VRAM,
56 R600_QUERY_REQUESTED_GTT,
57 R600_QUERY_MAPPED_VRAM,
58 R600_QUERY_MAPPED_GTT,
59 R600_QUERY_BUFFER_WAIT_TIME,
60 R600_QUERY_NUM_CTX_FLUSHES,
61 R600_QUERY_NUM_BYTES_MOVED,
62 R600_QUERY_NUM_EVICTIONS,
63 R600_QUERY_VRAM_USAGE,
64 R600_QUERY_GTT_USAGE,
65 R600_QUERY_GPU_TEMPERATURE,
66 R600_QUERY_CURRENT_GPU_SCLK,
67 R600_QUERY_CURRENT_GPU_MCLK,
68 R600_QUERY_GPU_LOAD,
69 R600_QUERY_NUM_COMPILATIONS,
70 R600_QUERY_NUM_SHADERS_CREATED,
71 R600_QUERY_BACK_BUFFER_PS_DRAW_RATIO,
72 R600_QUERY_NUM_SHADER_CACHE_HITS,
73 R600_QUERY_GPIN_ASIC_ID,
74 R600_QUERY_GPIN_NUM_SIMD,
75 R600_QUERY_GPIN_NUM_RB,
76 R600_QUERY_GPIN_NUM_SPI,
77 R600_QUERY_GPIN_NUM_SE,
78
79 R600_QUERY_FIRST_PERFCOUNTER = PIPE_QUERY_DRIVER_SPECIFIC + 100,
80 };
81
82 enum {
83 R600_QUERY_GROUP_GPIN = 0,
84 R600_NUM_SW_QUERY_GROUPS
85 };
86
87 struct r600_query_ops {
88 void (*destroy)(struct r600_common_context *, struct r600_query *);
89 bool (*begin)(struct r600_common_context *, struct r600_query *);
90 bool (*end)(struct r600_common_context *, struct r600_query *);
91 bool (*get_result)(struct r600_common_context *,
92 struct r600_query *, bool wait,
93 union pipe_query_result *result);
94 void (*get_result_resource)(struct r600_common_context *,
95 struct r600_query *, bool wait,
96 enum pipe_query_value_type result_type,
97 int index,
98 struct pipe_resource *resource,
99 unsigned offset);
100 };
101
102 struct r600_query {
103 struct r600_query_ops *ops;
104
105 /* The type of query */
106 unsigned type;
107 };
108
109 enum {
110 R600_QUERY_HW_FLAG_NO_START = (1 << 0),
111 /* gap */
112 /* whether begin_query doesn't clear the result */
113 R600_QUERY_HW_FLAG_BEGIN_RESUMES = (1 << 2),
114 };
115
116 struct r600_query_hw_ops {
117 bool (*prepare_buffer)(struct r600_common_context *,
118 struct r600_query_hw *,
119 struct r600_resource *);
120 void (*emit_start)(struct r600_common_context *,
121 struct r600_query_hw *,
122 struct r600_resource *buffer, uint64_t va);
123 void (*emit_stop)(struct r600_common_context *,
124 struct r600_query_hw *,
125 struct r600_resource *buffer, uint64_t va);
126 void (*clear_result)(struct r600_query_hw *, union pipe_query_result *);
127 void (*add_result)(struct r600_common_context *ctx,
128 struct r600_query_hw *, void *buffer,
129 union pipe_query_result *result);
130 };
131
132 struct r600_query_buffer {
133 /* The buffer where query results are stored. */
134 struct r600_resource *buf;
135 /* Offset of the next free result after current query data */
136 unsigned results_end;
137 /* If a query buffer is full, a new buffer is created and the old one
138 * is put in here. When we calculate the result, we sum up the samples
139 * from all buffers. */
140 struct r600_query_buffer *previous;
141 };
142
143 struct r600_query_hw {
144 struct r600_query b;
145 struct r600_query_hw_ops *ops;
146 unsigned flags;
147
148 /* The query buffer and how many results are in it. */
149 struct r600_query_buffer buffer;
150 /* Size of the result in memory for both begin_query and end_query,
151 * this can be one or two numbers, or it could even be a size of a structure. */
152 unsigned result_size;
153 /* The number of dwords for begin_query or end_query. */
154 unsigned num_cs_dw_begin;
155 unsigned num_cs_dw_end;
156 /* Linked list of queries */
157 struct list_head list;
158 /* For transform feedback: which stream the query is for */
159 unsigned stream;
160 };
161
162 bool r600_query_hw_init(struct r600_common_context *rctx,
163 struct r600_query_hw *query);
164 void r600_query_hw_destroy(struct r600_common_context *rctx,
165 struct r600_query *rquery);
166 bool r600_query_hw_begin(struct r600_common_context *rctx,
167 struct r600_query *rquery);
168 bool r600_query_hw_end(struct r600_common_context *rctx,
169 struct r600_query *rquery);
170 bool r600_query_hw_get_result(struct r600_common_context *rctx,
171 struct r600_query *rquery,
172 bool wait,
173 union pipe_query_result *result);
174
175 /* Performance counters */
176 enum {
177 /* This block is part of the shader engine */
178 R600_PC_BLOCK_SE = (1 << 0),
179
180 /* Expose per-instance groups instead of summing all instances (within
181 * an SE). */
182 R600_PC_BLOCK_INSTANCE_GROUPS = (1 << 1),
183
184 /* Expose per-SE groups instead of summing instances across SEs. */
185 R600_PC_BLOCK_SE_GROUPS = (1 << 2),
186
187 /* Shader block */
188 R600_PC_BLOCK_SHADER = (1 << 3),
189
190 /* Non-shader block with perfcounters windowed by shaders. */
191 R600_PC_BLOCK_SHADER_WINDOWED = (1 << 4),
192 };
193
194 /* Describes a hardware block with performance counters. Multiple instances of
195 * each block, possibly per-SE, may exist on the chip. Depending on the block
196 * and on the user's configuration, we either
197 * (a) expose every instance as a performance counter group,
198 * (b) expose a single performance counter group that reports the sum over all
199 * instances, or
200 * (c) expose one performance counter group per instance, but summed over all
201 * shader engines.
202 */
203 struct r600_perfcounter_block {
204 const char *basename;
205 unsigned flags;
206 unsigned num_counters;
207 unsigned num_selectors;
208 unsigned num_instances;
209
210 unsigned num_groups;
211 char *group_names;
212 unsigned group_name_stride;
213
214 char *selector_names;
215 unsigned selector_name_stride;
216
217 void *data;
218 };
219
220 struct r600_perfcounters {
221 unsigned num_groups;
222 unsigned num_blocks;
223 struct r600_perfcounter_block *blocks;
224
225 unsigned num_start_cs_dwords;
226 unsigned num_stop_cs_dwords;
227 unsigned num_instance_cs_dwords;
228 unsigned num_shaders_cs_dwords;
229
230 unsigned num_shader_types;
231 const char * const *shader_type_suffixes;
232 const unsigned *shader_type_bits;
233
234 void (*get_size)(struct r600_perfcounter_block *,
235 unsigned count, unsigned *selectors,
236 unsigned *num_select_dw, unsigned *num_read_dw);
237
238 void (*emit_instance)(struct r600_common_context *,
239 int se, int instance);
240 void (*emit_shaders)(struct r600_common_context *, unsigned shaders);
241 void (*emit_select)(struct r600_common_context *,
242 struct r600_perfcounter_block *,
243 unsigned count, unsigned *selectors);
244 void (*emit_start)(struct r600_common_context *,
245 struct r600_resource *buffer, uint64_t va);
246 void (*emit_stop)(struct r600_common_context *,
247 struct r600_resource *buffer, uint64_t va);
248 void (*emit_read)(struct r600_common_context *,
249 struct r600_perfcounter_block *,
250 unsigned count, unsigned *selectors,
251 struct r600_resource *buffer, uint64_t va);
252
253 void (*cleanup)(struct r600_common_screen *);
254
255 bool separate_se;
256 bool separate_instance;
257 };
258
259 struct pipe_query *r600_create_batch_query(struct pipe_context *ctx,
260 unsigned num_queries,
261 unsigned *query_types);
262
263 int r600_get_perfcounter_info(struct r600_common_screen *,
264 unsigned index,
265 struct pipe_driver_query_info *info);
266 int r600_get_perfcounter_group_info(struct r600_common_screen *,
267 unsigned index,
268 struct pipe_driver_query_group_info *info);
269
270 bool r600_perfcounters_init(struct r600_perfcounters *, unsigned num_blocks);
271 void r600_perfcounters_add_block(struct r600_common_screen *,
272 struct r600_perfcounters *,
273 const char *name, unsigned flags,
274 unsigned counters, unsigned selectors,
275 unsigned instances, void *data);
276 void r600_perfcounters_do_destroy(struct r600_perfcounters *);
277 void r600_query_hw_reset_buffers(struct r600_common_context *rctx,
278 struct r600_query_hw *query);
279
280 struct r600_qbo_state {
281 void *saved_compute;
282 struct pipe_constant_buffer saved_const0;
283 struct pipe_shader_buffer saved_ssbo[3];
284 };
285
286 #endif /* R600_QUERY_H */