src/gallium/drivers/radeon/r600_viewport.c

   1 /*
   2  * Copyright 2012 Advanced Micro Devices, Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * on the rights to use, copy, modify, merge, publish, distribute, sub
   8  * license, and/or sell copies of the Software, and to permit persons to whom
   9  * the Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  18  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  19  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  20  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  21  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  22  */
  23
  24 #include "r600_cs.h"
  25 #include "tgsi/tgsi_scan.h"
  26
  27 #define GET_MAX_SCISSOR(rctx) (rctx->chip_class >= EVERGREEN ? 16384 : 8192)
  28
  29 static void r600_set_scissor_states(struct pipe_context *ctx,
  30                                     unsigned start_slot,
  31                                     unsigned num_scissors,
  32                                     const struct pipe_scissor_state *state)
  33 {
  34         struct r600_common_context *rctx = (struct r600_common_context *)ctx;
  35         int i;
  36
  37         for (i = 0; i < num_scissors; i++)
  38                 rctx->scissors.states[start_slot + i] = state[i];
  39
  40         if (!rctx->scissor_enabled)
  41                 return;
  42
  43         rctx->scissors.dirty_mask |= ((1 << num_scissors) - 1) << start_slot;
  44         rctx->set_atom_dirty(rctx, &rctx->scissors.atom, true);
  45 }
  46
  47 /* Since the guard band disables clipping, we have to clip per-pixel
  48  * using a scissor.
  49  */
  50 static void r600_get_scissor_from_viewport(struct r600_common_context *rctx,
  51                                            const struct pipe_viewport_state *vp,
  52                                            struct r600_signed_scissor *scissor)
  53 {
  54         float tmp, minx, miny, maxx, maxy;
  55
  56         /* Convert (-1, -1) and (1, 1) from clip space into window space. */
  57         minx = -vp->scale[0] + vp->translate[0];
  58         miny = -vp->scale[1] + vp->translate[1];
  59         maxx = vp->scale[0] + vp->translate[0];
  60         maxy = vp->scale[1] + vp->translate[1];
  61
  62         /* r600_draw_rectangle sets this. Disable the scissor. */
  63         if (minx == -1 && miny == -1 && maxx == 1 && maxy == 1) {
  64                 scissor->minx = scissor->miny = 0;
  65                 scissor->maxx = scissor->maxy = GET_MAX_SCISSOR(rctx);
  66                 return;
  67         }
  68
  69         /* Handle inverted viewports. */
  70         if (minx > maxx) {
  71                 tmp = minx;
  72                 minx = maxx;
  73                 maxx = tmp;
  74         }
  75         if (miny > maxy) {
  76                 tmp = miny;
  77                 miny = maxy;
  78                 maxy = tmp;
  79         }
  80
  81         /* Convert to integer and round up the max bounds. */
  82         scissor->minx = minx;
  83         scissor->miny = miny;
  84         scissor->maxx = ceilf(maxx);
  85         scissor->maxy = ceilf(maxy);
  86 }
  87
  88 static void r600_clamp_scissor(struct r600_common_context *rctx,
  89                                struct pipe_scissor_state *out,
  90                                struct r600_signed_scissor *scissor)
  91 {
  92         unsigned max_scissor = GET_MAX_SCISSOR(rctx);
  93         out->minx = CLAMP(scissor->minx, 0, max_scissor);
  94         out->miny = CLAMP(scissor->miny, 0, max_scissor);
  95         out->maxx = CLAMP(scissor->maxx, 0, max_scissor);
  96         out->maxy = CLAMP(scissor->maxy, 0, max_scissor);
  97 }
  98
  99 static void r600_clip_scissor(struct pipe_scissor_state *out,
 100                               struct pipe_scissor_state *clip)
 101 {
 102         out->minx = MAX2(out->minx, clip->minx);
 103         out->miny = MAX2(out->miny, clip->miny);
 104         out->maxx = MIN2(out->maxx, clip->maxx);
 105         out->maxy = MIN2(out->maxy, clip->maxy);
 106 }
 107
 108 static void r600_scissor_make_union(struct r600_signed_scissor *out,
 109                                     struct r600_signed_scissor *in)
 110 {
 111         out->minx = MIN2(out->minx, in->minx);
 112         out->miny = MIN2(out->miny, in->miny);
 113         out->maxx = MAX2(out->maxx, in->maxx);
 114         out->maxy = MAX2(out->maxy, in->maxy);
 115 }
 116
 117 void evergreen_apply_scissor_bug_workaround(struct r600_common_context *rctx,
 118                                             struct pipe_scissor_state *scissor)
 119 {
 120         if (rctx->chip_class == EVERGREEN || rctx->chip_class == CAYMAN) {
 121                 if (scissor->maxx == 0)
 122                         scissor->minx = 1;
 123                 if (scissor->maxy == 0)
 124                         scissor->miny = 1;
 125
 126                 if (rctx->chip_class == CAYMAN &&
 127                     scissor->maxx == 1 && scissor->maxy == 1)
 128                         scissor->maxx = 2;
 129         }
 130 }
 131
 132 static void r600_emit_one_scissor(struct r600_common_context *rctx,
 133                                   struct radeon_winsys_cs *cs,
 134                                   struct r600_signed_scissor *vp_scissor,
 135                                   struct pipe_scissor_state *scissor)
 136 {
 137         struct pipe_scissor_state final;
 138
 139         if (rctx->vs_disables_clipping_viewport) {
 140                 final.minx = final.miny = 0;
 141                 final.maxx = final.maxy = GET_MAX_SCISSOR(rctx);
 142         } else {
 143                 r600_clamp_scissor(rctx, &final, vp_scissor);
 144         }
 145
 146         if (scissor)
 147                 r600_clip_scissor(&final, scissor);
 148
 149         evergreen_apply_scissor_bug_workaround(rctx, &final);
 150
 151         radeon_emit(cs, S_028250_TL_X(final.minx) |
 152                         S_028250_TL_Y(final.miny) |
 153                         S_028250_WINDOW_OFFSET_DISABLE(1));
 154         radeon_emit(cs, S_028254_BR_X(final.maxx) |
 155                         S_028254_BR_Y(final.maxy));
 156 }
 157
 158 /* the range is [-MAX, MAX] */
 159 #define GET_MAX_VIEWPORT_RANGE(rctx) (rctx->chip_class >= EVERGREEN ? 32768 : 16384)
 160
 161 static void r600_emit_guardband(struct r600_common_context *rctx,
 162                                 struct r600_signed_scissor *vp_as_scissor)
 163 {
 164         struct radeon_winsys_cs *cs = rctx->gfx.cs;
 165         struct pipe_viewport_state vp;
 166         float left, top, right, bottom, max_range, guardband_x, guardband_y;
 167
 168         /* Reconstruct the viewport transformation from the scissor. */
 169         vp.translate[0] = (vp_as_scissor->minx + vp_as_scissor->maxx) / 2.0;
 170         vp.translate[1] = (vp_as_scissor->miny + vp_as_scissor->maxy) / 2.0;
 171         vp.scale[0] = vp_as_scissor->maxx - vp.translate[0];
 172         vp.scale[1] = vp_as_scissor->maxy - vp.translate[1];
 173
 174         /* Treat a 0x0 viewport as 1x1 to prevent division by zero. */
 175         if (vp_as_scissor->minx == vp_as_scissor->maxx)
 176                 vp.scale[0] = 0.5;
 177         if (vp_as_scissor->miny == vp_as_scissor->maxy)
 178                 vp.scale[1] = 0.5;
 179
 180         /* Find the biggest guard band that is inside the supported viewport
 181          * range. The guard band is specified as a horizontal and vertical
 182          * distance from (0,0) in clip space.
 183          *
 184          * This is done by applying the inverse viewport transformation
 185          * on the viewport limits to get those limits in clip space.
 186          *
 187          * Use a limit one pixel smaller to allow for some precision error.
 188          */
 189         max_range = GET_MAX_VIEWPORT_RANGE(rctx) - 1;
 190         left   = (-max_range - vp.translate[0]) / vp.scale[0];
 191         right  = ( max_range - vp.translate[0]) / vp.scale[0];
 192         top    = (-max_range - vp.translate[1]) / vp.scale[1];
 193         bottom = ( max_range - vp.translate[1]) / vp.scale[1];
 194
 195         assert(left <= -1 && top <= -1 && right >= 1 && bottom >= 1);
 196
 197         guardband_x = MIN2(-left, right);
 198         guardband_y = MIN2(-top, bottom);
 199
 200         /* If any of the GB registers is updated, all of them must be updated. */
 201         if (rctx->chip_class >= CAYMAN)
 202                 radeon_set_context_reg_seq(cs, CM_R_028BE8_PA_CL_GB_VERT_CLIP_ADJ, 4);
 203         else
 204                 radeon_set_context_reg_seq(cs, R600_R_028C0C_PA_CL_GB_VERT_CLIP_ADJ, 4);
 205
 206         radeon_emit(cs, fui(guardband_y)); /* R_028BE8_PA_CL_GB_VERT_CLIP_ADJ */
 207         radeon_emit(cs, fui(1.0));         /* R_028BEC_PA_CL_GB_VERT_DISC_ADJ */
 208         radeon_emit(cs, fui(guardband_x)); /* R_028BF0_PA_CL_GB_HORZ_CLIP_ADJ */
 209         radeon_emit(cs, fui(1.0));         /* R_028BF4_PA_CL_GB_HORZ_DISC_ADJ */
 210 }
 211
 212 static void r600_emit_scissors(struct r600_common_context *rctx, struct r600_atom *atom)
 213 {
 214         struct radeon_winsys_cs *cs = rctx->gfx.cs;
 215         struct pipe_scissor_state *states = rctx->scissors.states;
 216         unsigned mask = rctx->scissors.dirty_mask;
 217         bool scissor_enabled = rctx->scissor_enabled;
 218         struct r600_signed_scissor max_vp_scissor;
 219         int i;
 220
 221         /* The simple case: Only 1 viewport is active. */
 222         if (!rctx->vs_writes_viewport_index) {
 223                 struct r600_signed_scissor *vp = &rctx->viewports.as_scissor[0];
 224
 225                 if (!(mask & 1))
 226                         return;
 227
 228                 radeon_set_context_reg_seq(cs, R_028250_PA_SC_VPORT_SCISSOR_0_TL, 2);
 229                 r600_emit_one_scissor(rctx, cs, vp, scissor_enabled ? &states[0] : NULL);
 230                 r600_emit_guardband(rctx, vp);
 231                 rctx->scissors.dirty_mask &= ~1; /* clear one bit */
 232                 return;
 233         }
 234
 235         /* Shaders can draw to any viewport. Make a union of all viewports. */
 236         max_vp_scissor = rctx->viewports.as_scissor[0];
 237         for (i = 1; i < R600_MAX_VIEWPORTS; i++)
 238                 r600_scissor_make_union(&max_vp_scissor,
 239                                       &rctx->viewports.as_scissor[i]);
 240
 241         while (mask) {
 242                 int start, count, i;
 243
 244                 u_bit_scan_consecutive_range(&mask, &start, &count);
 245
 246                 radeon_set_context_reg_seq(cs, R_028250_PA_SC_VPORT_SCISSOR_0_TL +
 247                                                start * 4 * 2, count * 2);
 248                 for (i = start; i < start+count; i++) {
 249                         r600_emit_one_scissor(rctx, cs, &rctx->viewports.as_scissor[i],
 250                                               scissor_enabled ? &states[i] : NULL);
 251                 }
 252         }
 253         r600_emit_guardband(rctx, &max_vp_scissor);
 254         rctx->scissors.dirty_mask = 0;
 255 }
 256
 257 static void r600_set_viewport_states(struct pipe_context *ctx,
 258                                      unsigned start_slot,
 259                                      unsigned num_viewports,
 260                                      const struct pipe_viewport_state *state)
 261 {
 262         struct r600_common_context *rctx = (struct r600_common_context *)ctx;
 263         int i;
 264
 265         for (i = 0; i < num_viewports; i++) {
 266                 unsigned index = start_slot + i;
 267
 268                 rctx->viewports.states[index] = state[i];
 269                 r600_get_scissor_from_viewport(rctx, &state[i],
 270                                                &rctx->viewports.as_scissor[index]);
 271         }
 272
 273         rctx->viewports.dirty_mask |= ((1 << num_viewports) - 1) << start_slot;
 274         rctx->scissors.dirty_mask |= ((1 << num_viewports) - 1) << start_slot;
 275         rctx->set_atom_dirty(rctx, &rctx->viewports.atom, true);
 276         rctx->set_atom_dirty(rctx, &rctx->scissors.atom, true);
 277 }
 278
 279 static void r600_emit_viewports(struct r600_common_context *rctx, struct r600_atom *atom)
 280 {
 281         struct radeon_winsys_cs *cs = rctx->gfx.cs;
 282         struct pipe_viewport_state *states = rctx->viewports.states;
 283         unsigned mask = rctx->viewports.dirty_mask;
 284
 285         /* The simple case: Only 1 viewport is active. */
 286         if (!rctx->vs_writes_viewport_index) {
 287                 if (!(mask & 1))
 288                         return;
 289
 290                 radeon_set_context_reg_seq(cs, R_02843C_PA_CL_VPORT_XSCALE, 6);
 291                 radeon_emit(cs, fui(states[0].scale[0]));
 292                 radeon_emit(cs, fui(states[0].translate[0]));
 293                 radeon_emit(cs, fui(states[0].scale[1]));
 294                 radeon_emit(cs, fui(states[0].translate[1]));
 295                 radeon_emit(cs, fui(states[0].scale[2]));
 296                 radeon_emit(cs, fui(states[0].translate[2]));
 297                 rctx->viewports.dirty_mask &= ~1; /* clear one bit */
 298                 return;
 299         }
 300
 301         while (mask) {
 302                 int start, count, i;
 303
 304                 u_bit_scan_consecutive_range(&mask, &start, &count);
 305
 306                 radeon_set_context_reg_seq(cs, R_02843C_PA_CL_VPORT_XSCALE +
 307                                                start * 4 * 6, count * 6);
 308                 for (i = start; i < start+count; i++) {
 309                         radeon_emit(cs, fui(states[i].scale[0]));
 310                         radeon_emit(cs, fui(states[i].translate[0]));
 311                         radeon_emit(cs, fui(states[i].scale[1]));
 312                         radeon_emit(cs, fui(states[i].translate[1]));
 313                         radeon_emit(cs, fui(states[i].scale[2]));
 314                         radeon_emit(cs, fui(states[i].translate[2]));
 315                 }
 316         }
 317         rctx->viewports.dirty_mask = 0;
 318 }
 319
 320 void r600_set_scissor_enable(struct r600_common_context *rctx, bool enable)
 321 {
 322         if (rctx->scissor_enabled != enable) {
 323                 rctx->scissor_enabled = enable;
 324                 rctx->scissors.dirty_mask = (1 << R600_MAX_VIEWPORTS) - 1;
 325                 rctx->set_atom_dirty(rctx, &rctx->scissors.atom, true);
 326         }
 327 }
 328
 329 /**
 330  * Normally, we only emit 1 viewport and 1 scissor if no shader is using
 331  * the VIEWPORT_INDEX output, and emitting the other viewports and scissors
 332  * is delayed. When a shader with VIEWPORT_INDEX appears, this should be
 333  * called to emit the rest.
 334  */
 335 void r600_update_vs_writes_viewport_index(struct r600_common_context *rctx,
 336                                           struct tgsi_shader_info *info)
 337 {
 338         bool vs_window_space;
 339
 340         if (!info)
 341                 return;
 342
 343         /* When the VS disables clipping and viewport transformation. */
 344         vs_window_space =
 345                 info->properties[TGSI_PROPERTY_VS_WINDOW_SPACE_POSITION];
 346
 347         if (rctx->vs_disables_clipping_viewport != vs_window_space) {
 348                 rctx->vs_disables_clipping_viewport = vs_window_space;
 349                 rctx->scissors.dirty_mask = (1 << R600_MAX_VIEWPORTS) - 1;
 350                 rctx->set_atom_dirty(rctx, &rctx->scissors.atom, true);
 351         }
 352
 353         /* Viewport index handling. */
 354         rctx->vs_writes_viewport_index = info->writes_viewport_index;
 355         if (!rctx->vs_writes_viewport_index)
 356                 return;
 357
 358         if (rctx->scissors.dirty_mask)
 359             rctx->set_atom_dirty(rctx, &rctx->scissors.atom, true);
 360         if (rctx->viewports.dirty_mask)
 361             rctx->set_atom_dirty(rctx, &rctx->viewports.atom, true);
 362 }
 363
 364 void r600_init_viewport_functions(struct r600_common_context *rctx)
 365 {
 366         rctx->scissors.atom.emit = r600_emit_scissors;
 367         rctx->viewports.atom.emit = r600_emit_viewports;
 368
 369         rctx->scissors.atom.num_dw = (2 + 16 * 2) + 6;
 370         rctx->viewports.atom.num_dw = 2 + 16 * 6;
 371
 372         rctx->b.set_scissor_states = r600_set_scissor_states;
 373         rctx->b.set_viewport_states = r600_set_viewport_states;
 374 }