gallium/radeon: fix PIPE_QUERY_GPU_FINISHED
[mesa.git] / src / gallium / drivers / radeon / r600d_common.h
1 /*
2 * Copyright 2013 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
22 *
23 * Authors: Marek Olšák <maraeo@gmail.com>
24 */
25
26 #ifndef R600D_COMMON_H
27 #define R600D_COMMON_H
28
29 #define R600_CONFIG_REG_OFFSET 0x08000
30 #define R600_CONTEXT_REG_OFFSET 0x28000
31 #define SI_SH_REG_OFFSET 0x0000B000
32 #define SI_SH_REG_END 0x0000C000
33 #define CIK_UCONFIG_REG_OFFSET 0x00030000
34 #define CIK_UCONFIG_REG_END 0x00031000
35
36 #define PKT_TYPE_S(x) (((x) & 0x3) << 30)
37 #define PKT_COUNT_S(x) (((x) & 0x3FFF) << 16)
38 #define PKT3_IT_OPCODE_S(x) (((x) & 0xFF) << 8)
39 #define PKT3_PREDICATE(x) (((x) >> 0) & 0x1)
40 #define PKT3(op, count, predicate) (PKT_TYPE_S(3) | PKT_COUNT_S(count) | PKT3_IT_OPCODE_S(op) | PKT3_PREDICATE(predicate))
41
42 #define RADEON_CP_PACKET3_COMPUTE_MODE 0x00000002
43
44 #define PKT3_NOP 0x10
45 #define PKT3_SET_PREDICATION 0x20
46 #define PKT3_STRMOUT_BUFFER_UPDATE 0x34
47 #define STRMOUT_STORE_BUFFER_FILLED_SIZE 1
48 #define STRMOUT_OFFSET_SOURCE(x) (((x) & 0x3) << 1)
49 #define STRMOUT_OFFSET_FROM_PACKET 0
50 #define STRMOUT_OFFSET_FROM_VGT_FILLED_SIZE 1
51 #define STRMOUT_OFFSET_FROM_MEM 2
52 #define STRMOUT_OFFSET_NONE 3
53 #define STRMOUT_SELECT_BUFFER(x) (((x) & 0x3) << 8)
54 #define PKT3_WAIT_REG_MEM 0x3C
55 #define WAIT_REG_MEM_EQUAL 3
56 #define PKT3_EVENT_WRITE 0x46
57 #define PKT3_EVENT_WRITE_EOP 0x47
58 #define PKT3_SET_CONFIG_REG 0x68
59 #define PKT3_SET_CONTEXT_REG 0x69
60 #define PKT3_STRMOUT_BASE_UPDATE 0x72 /* r700 only */
61 #define PKT3_SURFACE_BASE_UPDATE 0x73 /* r600 only */
62 #define SURFACE_BASE_UPDATE_DEPTH (1 << 0)
63 #define SURFACE_BASE_UPDATE_COLOR(x) (2 << (x))
64 #define SURFACE_BASE_UPDATE_COLOR_NUM(x) (((1 << x) - 1) << 1)
65 #define SURFACE_BASE_UPDATE_STRMOUT(x) (0x200 << (x))
66 #define PKT3_SET_SH_REG 0x76 /* SI and later */
67 #define PKT3_SET_UCONFIG_REG 0x79 /* CIK and later */
68
69 #define EVENT_TYPE_SAMPLE_STREAMOUTSTATS1 0x1 /* EG and later */
70 #define EVENT_TYPE_SAMPLE_STREAMOUTSTATS2 0x2 /* EG and later */
71 #define EVENT_TYPE_SAMPLE_STREAMOUTSTATS3 0x3 /* EG and later */
72 #define EVENT_TYPE_PS_PARTIAL_FLUSH 0x10
73 #define EVENT_TYPE_CACHE_FLUSH_AND_INV_TS_EVENT 0x14
74 #define EVENT_TYPE_ZPASS_DONE 0x15
75 #define EVENT_TYPE_CACHE_FLUSH_AND_INV_EVENT 0x16
76 #define EVENT_TYPE_PIPELINESTAT_START 25
77 #define EVENT_TYPE_PIPELINESTAT_STOP 26
78 #define EVENT_TYPE_SAMPLE_PIPELINESTAT 30
79 #define EVENT_TYPE_SO_VGTSTREAMOUT_FLUSH 0x1f
80 #define EVENT_TYPE_SAMPLE_STREAMOUTSTATS 0x20
81 #define EVENT_TYPE_FLUSH_AND_INV_DB_META 0x2c /* supported on r700+ */
82 #define EVENT_TYPE_FLUSH_AND_INV_CB_META 46 /* supported on r700+ */
83 #define EVENT_TYPE(x) ((x) << 0)
84 #define EVENT_INDEX(x) ((x) << 8)
85 /* 0 - any non-TS event
86 * 1 - ZPASS_DONE
87 * 2 - SAMPLE_PIPELINESTAT
88 * 3 - SAMPLE_STREAMOUTSTAT*
89 * 4 - *S_PARTIAL_FLUSH
90 * 5 - TS events
91 */
92
93 #define PREDICATION_OP_CLEAR 0x0
94 #define PREDICATION_OP_ZPASS 0x1
95 #define PREDICATION_OP_PRIMCOUNT 0x2
96 #define PRED_OP(x) ((x) << 16)
97 #define PREDICATION_CONTINUE (1 << 31)
98 #define PREDICATION_HINT_WAIT (0 << 12)
99 #define PREDICATION_HINT_NOWAIT_DRAW (1 << 12)
100 #define PREDICATION_DRAW_NOT_VISIBLE (0 << 8)
101 #define PREDICATION_DRAW_VISIBLE (1 << 8)
102
103 /* R600-R700*/
104 #define R_008490_CP_STRMOUT_CNTL 0x008490
105 #define S_008490_OFFSET_UPDATE_DONE(x) (((x) & 0x1) << 0)
106 #define R_028AB0_VGT_STRMOUT_EN 0x028AB0
107 #define S_028AB0_STREAMOUT(x) (((x) & 0x1) << 0)
108 #define G_028AB0_STREAMOUT(x) (((x) >> 0) & 0x1)
109 #define C_028AB0_STREAMOUT 0xFFFFFFFE
110 #define R_028B20_VGT_STRMOUT_BUFFER_EN 0x028B20
111 #define S_028B20_BUFFER_0_EN(x) (((x) & 0x1) << 0)
112 #define G_028B20_BUFFER_0_EN(x) (((x) >> 0) & 0x1)
113 #define C_028B20_BUFFER_0_EN 0xFFFFFFFE
114 #define S_028B20_BUFFER_1_EN(x) (((x) & 0x1) << 1)
115 #define G_028B20_BUFFER_1_EN(x) (((x) >> 1) & 0x1)
116 #define C_028B20_BUFFER_1_EN 0xFFFFFFFD
117 #define S_028B20_BUFFER_2_EN(x) (((x) & 0x1) << 2)
118 #define G_028B20_BUFFER_2_EN(x) (((x) >> 2) & 0x1)
119 #define C_028B20_BUFFER_2_EN 0xFFFFFFFB
120 #define S_028B20_BUFFER_3_EN(x) (((x) & 0x1) << 3)
121 #define G_028B20_BUFFER_3_EN(x) (((x) >> 3) & 0x1)
122 #define C_028B20_BUFFER_3_EN 0xFFFFFFF7
123 #define R_028AD0_VGT_STRMOUT_BUFFER_SIZE_0 0x028AD0
124
125 #define V_0280A0_SWAP_STD 0x00000000
126 #define V_0280A0_SWAP_ALT 0x00000001
127 #define V_0280A0_SWAP_STD_REV 0x00000002
128 #define V_0280A0_SWAP_ALT_REV 0x00000003
129
130 /* EG+ */
131 #define R_0084FC_CP_STRMOUT_CNTL 0x0084FC
132 #define S_0084FC_OFFSET_UPDATE_DONE(x) (((x) & 0x1) << 0)
133 #define R_028B94_VGT_STRMOUT_CONFIG 0x028B94
134 #define S_028B94_STREAMOUT_0_EN(x) (((x) & 0x1) << 0)
135 #define G_028B94_STREAMOUT_0_EN(x) (((x) >> 0) & 0x1)
136 #define C_028B94_STREAMOUT_0_EN 0xFFFFFFFE
137 #define S_028B94_STREAMOUT_1_EN(x) (((x) & 0x1) << 1)
138 #define G_028B94_STREAMOUT_1_EN(x) (((x) >> 1) & 0x1)
139 #define C_028B94_STREAMOUT_1_EN 0xFFFFFFFD
140 #define S_028B94_STREAMOUT_2_EN(x) (((x) & 0x1) << 2)
141 #define G_028B94_STREAMOUT_2_EN(x) (((x) >> 2) & 0x1)
142 #define C_028B94_STREAMOUT_2_EN 0xFFFFFFFB
143 #define S_028B94_STREAMOUT_3_EN(x) (((x) & 0x1) << 3)
144 #define G_028B94_STREAMOUT_3_EN(x) (((x) >> 3) & 0x1)
145 #define C_028B94_STREAMOUT_3_EN 0xFFFFFFF7
146 #define S_028B94_RAST_STREAM(x) (((x) & 0x07) << 4)
147 #define G_028B94_RAST_STREAM(x) (((x) >> 4) & 0x07)
148 #define C_028B94_RAST_STREAM 0xFFFFFF8F
149 #define S_028B94_RAST_STREAM_MASK(x) (((x) & 0x0F) << 8) /* SI+ */
150 #define G_028B94_RAST_STREAM_MASK(x) (((x) >> 8) & 0x0F)
151 #define C_028B94_RAST_STREAM_MASK 0xFFFFF0FF
152 #define S_028B94_USE_RAST_STREAM_MASK(x) (((x) & 0x1) << 31) /* SI+ */
153 #define G_028B94_USE_RAST_STREAM_MASK(x) (((x) >> 31) & 0x1)
154 #define C_028B94_USE_RAST_STREAM_MASK 0x7FFFFFFF
155 #define R_028B98_VGT_STRMOUT_BUFFER_CONFIG 0x028B98
156 #define S_028B98_STREAM_0_BUFFER_EN(x) (((x) & 0x0F) << 0)
157 #define G_028B98_STREAM_0_BUFFER_EN(x) (((x) >> 0) & 0x0F)
158 #define C_028B98_STREAM_0_BUFFER_EN 0xFFFFFFF0
159 #define S_028B98_STREAM_1_BUFFER_EN(x) (((x) & 0x0F) << 4)
160 #define G_028B98_STREAM_1_BUFFER_EN(x) (((x) >> 4) & 0x0F)
161 #define C_028B98_STREAM_1_BUFFER_EN 0xFFFFFF0F
162 #define S_028B98_STREAM_2_BUFFER_EN(x) (((x) & 0x0F) << 8)
163 #define G_028B98_STREAM_2_BUFFER_EN(x) (((x) >> 8) & 0x0F)
164 #define C_028B98_STREAM_2_BUFFER_EN 0xFFFFF0FF
165 #define S_028B98_STREAM_3_BUFFER_EN(x) (((x) & 0x0F) << 12)
166 #define G_028B98_STREAM_3_BUFFER_EN(x) (((x) >> 12) & 0x0F)
167 #define C_028B98_STREAM_3_BUFFER_EN 0xFFFF0FFF
168
169 #define EG_R_028A4C_PA_SC_MODE_CNTL_1 0x028A4C
170 #define EG_S_028A4C_PS_ITER_SAMPLE(x) (((x) & 0x1) << 16)
171
172 #define CM_R_028804_DB_EQAA 0x00028804
173 #define S_028804_MAX_ANCHOR_SAMPLES(x) (((x) & 0x7) << 0)
174 #define S_028804_PS_ITER_SAMPLES(x) (((x) & 0x7) << 4)
175 #define S_028804_MASK_EXPORT_NUM_SAMPLES(x) (((x) & 0x7) << 8)
176 #define S_028804_ALPHA_TO_MASK_NUM_SAMPLES(x) (((x) & 0x7) << 12)
177 #define S_028804_HIGH_QUALITY_INTERSECTIONS(x) (((x) & 0x1) << 16)
178 #define S_028804_INCOHERENT_EQAA_READS(x) (((x) & 0x1) << 17)
179 #define S_028804_INTERPOLATE_COMP_Z(x) (((x) & 0x1) << 18)
180 #define S_028804_INTERPOLATE_SRC_Z(x) (((x) & 0x1) << 19)
181 #define S_028804_STATIC_ANCHOR_ASSOCIATIONS(x) (((x) & 0x1) << 20)
182 #define S_028804_ALPHA_TO_MASK_EQAA_DISABLE(x) (((x) & 0x1) << 21)
183 #define S_028804_OVERRASTERIZATION_AMOUNT(x) (((x) & 0x07) << 24)
184 #define S_028804_ENABLE_POSTZ_OVERRASTERIZATION(x) (((x) & 0x1) << 27)
185 #define CM_R_028BDC_PA_SC_LINE_CNTL 0x28bdc
186 #define S_028BDC_EXPAND_LINE_WIDTH(x) (((x) & 0x1) << 9)
187 #define G_028BDC_EXPAND_LINE_WIDTH(x) (((x) >> 9) & 0x1)
188 #define C_028BDC_EXPAND_LINE_WIDTH 0xFFFFFDFF
189 #define S_028BDC_LAST_PIXEL(x) (((x) & 0x1) << 10)
190 #define G_028BDC_LAST_PIXEL(x) (((x) >> 10) & 0x1)
191 #define C_028BDC_LAST_PIXEL 0xFFFFFBFF
192 #define CM_R_028BE0_PA_SC_AA_CONFIG 0x28be0
193 #define S_028BE0_MSAA_NUM_SAMPLES(x) (((x) & 0x7) << 0)
194 #define S_028BE0_AA_MASK_CENTROID_DTMN(x) (((x) & 0x1) << 4)
195 #define S_028BE0_MAX_SAMPLE_DIST(x) (((x) & 0xf) << 13)
196 #define S_028BE0_MSAA_EXPOSED_SAMPLES(x) (((x) & 0x7) << 20)
197 #define S_028BE0_DETAIL_TO_EXPOSED_MODE(x) (((x) & 0x3) << 24)
198 #define CM_R_028BF8_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0 0x28bf8
199 #define CM_R_028C08_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_0 0x28c08
200 #define CM_R_028C18_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_0 0x28c18
201 #define CM_R_028C28_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_0 0x28c28
202
203 #define EG_S_028C70_FAST_CLEAR(x) (((x) & 0x1) << 17)
204 #define SI_S_028C70_FAST_CLEAR(x) (((x) & 0x1) << 13)
205 #define VI_S_028C70_DCC_ENABLE(x) (((x) & 0x1) << 28)
206
207 /*CIK+*/
208 #define R_0300FC_CP_STRMOUT_CNTL 0x0300FC
209
210 #endif