src/gallium/drivers/radeon/radeon_llvm.h

   1 /*
   2  * Copyright 2011 Advanced Micro Devices, Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  20  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  21  * SOFTWARE.
  22  *
  23  * Authors: Tom Stellard <thomas.stellard@amd.com>
  24  *
  25  */
  26
  27 #ifndef RADEON_LLVM_H
  28 #define RADEON_LLVM_H
  29
  30 #include <llvm-c/Core.h>
  31 #include "gallivm/lp_bld_init.h"
  32 #include "gallivm/lp_bld_tgsi.h"
  33
  34 #define RADEON_LLVM_MAX_INPUTS 32 * 4
  35 #define RADEON_LLVM_MAX_OUTPUTS 32 * 4
  36
  37 #define RADEON_LLVM_INITIAL_CF_DEPTH 4
  38
  39 #define RADEON_LLVM_MAX_SYSTEM_VALUES 4
  40
  41 struct radeon_llvm_branch {
  42         LLVMBasicBlockRef endif_block;
  43         LLVMBasicBlockRef if_block;
  44         LLVMBasicBlockRef else_block;
  45         unsigned has_else;
  46 };
  47
  48 struct radeon_llvm_loop {
  49         LLVMBasicBlockRef loop_block;
  50         LLVMBasicBlockRef endloop_block;
  51 };
  52
  53 struct radeon_llvm_context {
  54         struct lp_build_tgsi_soa_context soa;
  55
  56         /*=== Front end configuration ===*/
  57
  58         /* Instructions that are not described by any of the TGSI opcodes. */
  59
  60         /** This function is responsible for initilizing the inputs array and will be
  61           * called once for each input declared in the TGSI shader.
  62           */
  63         void (*load_input)(struct radeon_llvm_context *,
  64                         unsigned input_index,
  65                         const struct tgsi_full_declaration *decl);
  66
  67         void (*load_system_value)(struct radeon_llvm_context *,
  68                         unsigned index,
  69                         const struct tgsi_full_declaration *decl);
  70
  71         /** This array contains the input values for the shader.  Typically these
  72           * values will be in the form of a target intrinsic that will inform the
  73           * backend how to load the actual inputs to the shader.
  74           */
  75         LLVMValueRef inputs[RADEON_LLVM_MAX_INPUTS];
  76         LLVMValueRef outputs[RADEON_LLVM_MAX_OUTPUTS][TGSI_NUM_CHANNELS];
  77
  78         /** This pointer is used to contain the temporary values.
  79           * The amount of temporary used in tgsi can't be bound to a max value and
  80           * thus we must allocate this array at runtime.
  81           */
  82         LLVMValueRef *temps;
  83         unsigned temps_count;
  84         LLVMValueRef system_values[RADEON_LLVM_MAX_SYSTEM_VALUES];
  85
  86         /*=== Private Members ===*/
  87
  88         struct radeon_llvm_branch *branch;
  89         struct radeon_llvm_loop *loop;
  90
  91         unsigned branch_depth;
  92         unsigned branch_depth_max;
  93         unsigned loop_depth;
  94         unsigned loop_depth_max;
  95
  96         struct tgsi_declaration_range *arrays;
  97
  98         LLVMValueRef main_fn;
  99         LLVMTypeRef return_type;
 100
 101         struct gallivm_state gallivm;
 102 };
 103
 104 static inline LLVMTypeRef tgsi2llvmtype(
 105                 struct lp_build_tgsi_context * bld_base,
 106                 enum tgsi_opcode_type type)
 107 {
 108         LLVMContextRef ctx = bld_base->base.gallivm->context;
 109
 110         switch (type) {
 111         case TGSI_TYPE_UNSIGNED:
 112         case TGSI_TYPE_SIGNED:
 113                 return LLVMInt32TypeInContext(ctx);
 114         case TGSI_TYPE_DOUBLE:
 115                 return LLVMDoubleTypeInContext(ctx);
 116         case TGSI_TYPE_UNTYPED:
 117         case TGSI_TYPE_FLOAT:
 118                 return LLVMFloatTypeInContext(ctx);
 119         default: break;
 120         }
 121         return 0;
 122 }
 123
 124 static inline LLVMValueRef bitcast(
 125                 struct lp_build_tgsi_context * bld_base,
 126                 enum tgsi_opcode_type type,
 127                 LLVMValueRef value
 128 )
 129 {
 130         LLVMBuilderRef builder = bld_base->base.gallivm->builder;
 131         LLVMTypeRef dst_type = tgsi2llvmtype(bld_base, type);
 132
 133         if (dst_type)
 134                 return LLVMBuildBitCast(builder, value, dst_type, "");
 135         else
 136                 return value;
 137 }
 138
 139
 140 void radeon_llvm_emit_prepare_cube_coords(struct lp_build_tgsi_context * bld_base,
 141                                           struct lp_build_emit_data * emit_data,
 142                                           LLVMValueRef *coords_arg,
 143                                           LLVMValueRef *derivs_arg);
 144
 145 void radeon_llvm_context_init(struct radeon_llvm_context * ctx,
 146                               const char *triple);
 147
 148 void radeon_llvm_create_func(struct radeon_llvm_context * ctx,
 149                              LLVMTypeRef *return_types, unsigned num_return_elems,
 150                              LLVMTypeRef *ParamTypes, unsigned ParamCount);
 151
 152 void radeon_llvm_dispose(struct radeon_llvm_context * ctx);
 153
 154 inline static struct radeon_llvm_context * radeon_llvm_context(
 155         struct lp_build_tgsi_context * bld_base)
 156 {
 157         return (struct radeon_llvm_context*)bld_base;
 158 }
 159
 160 unsigned radeon_llvm_reg_index_soa(unsigned index, unsigned chan);
 161
 162 void radeon_llvm_finalize_module(struct radeon_llvm_context * ctx);
 163
 164 void
 165 build_tgsi_intrinsic_nomem(
 166                 const struct lp_build_tgsi_action * action,
 167                 struct lp_build_tgsi_context * bld_base,
 168                 struct lp_build_emit_data * emit_data);
 169
 170 LLVMValueRef
 171 radeon_llvm_emit_fetch_double(struct lp_build_tgsi_context *bld_base,
 172                               LLVMValueRef ptr,
 173                               LLVMValueRef ptr2);
 174
 175 LLVMValueRef radeon_llvm_saturate(struct lp_build_tgsi_context *bld_base,
 176                                   LLVMValueRef value);
 177
 178 LLVMValueRef radeon_llvm_emit_fetch(struct lp_build_tgsi_context *bld_base,
 179                                     const struct tgsi_full_src_register *reg,
 180                                     enum tgsi_opcode_type type,
 181                                     unsigned swizzle);
 182
 183 void radeon_llvm_emit_store(
 184         struct lp_build_tgsi_context * bld_base,
 185         const struct tgsi_full_instruction * inst,
 186         const struct tgsi_opcode_info * info,
 187         LLVMValueRef dst[4]);
 188
 189 #endif /* RADEON_LLVM_H */