2 * Copyright 2011 Advanced Micro Devices, Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
23 * Authors: Tom Stellard <thomas.stellard@amd.com>
30 #include <llvm-c/Core.h>
31 #include "gallivm/lp_bld_init.h"
32 #include "gallivm/lp_bld_tgsi.h"
34 #define RADEON_LLVM_MAX_INPUTS 16 * 4
35 #define RADEON_LLVM_MAX_OUTPUTS 16 * 4
36 #define RADEON_LLVM_MAX_BRANCH_DEPTH 16
37 #define RADEON_LLVM_MAX_LOOP_DEPTH 16
39 #define RADEON_LLVM_MAX_SYSTEM_VALUES 4
41 struct radeon_llvm_branch
{
42 LLVMBasicBlockRef endif_block
;
43 LLVMBasicBlockRef if_block
;
44 LLVMBasicBlockRef else_block
;
48 struct radeon_llvm_loop
{
49 LLVMBasicBlockRef loop_block
;
50 LLVMBasicBlockRef endloop_block
;
53 struct radeon_llvm_context
{
55 struct lp_build_tgsi_soa_context soa
;
61 struct r600_shader_io
* r600_inputs
;
62 struct r600_shader_io
* r600_outputs
;
63 unsigned color_buffer_count
;
64 unsigned fs_color_all
;
66 /*=== Front end configuration ===*/
68 /* Special Intrinsics */
70 /** Write to an output register: float store_output(float, i32) */
71 const char * store_output_intr
;
73 /** Swizzle a vector value: <4 x float> swizzle(<4 x float>, i32)
74 * The swizzle is an unsigned integer that encodes a TGSI_SWIZZLE_* value
76 * Swizzle{0-1} = X Channel
77 * Swizzle{2-3} = Y Channel
78 * Swizzle{4-5} = Z Channel
79 * Swizzle{6-7} = W Channel
81 const char * swizzle_intr
;
83 /* Instructions that are not described by any of the TGSI opcodes. */
85 /** This function is responsible for initilizing the inputs array and will be
86 * called once for each input declared in the TGSI shader.
88 void (*load_input
)(struct radeon_llvm_context
*,
90 const struct tgsi_full_declaration
*decl
);
92 void (*load_system_value
)(struct radeon_llvm_context
*,
94 const struct tgsi_full_declaration
*decl
);
96 /** User data to use with the callbacks */
99 /** This array contains the input values for the shader. Typically these
100 * values will be in the form of a target intrinsic that will inform the
101 * backend how to load the actual inputs to the shader.
103 LLVMValueRef inputs
[RADEON_LLVM_MAX_INPUTS
];
104 LLVMValueRef outputs
[RADEON_LLVM_MAX_OUTPUTS
][TGSI_NUM_CHANNELS
];
105 unsigned output_reg_count
;
107 LLVMValueRef system_values
[RADEON_LLVM_MAX_SYSTEM_VALUES
];
109 unsigned reserved_reg_count
;
110 /*=== Private Members ===*/
112 struct radeon_llvm_branch branch
[RADEON_LLVM_MAX_BRANCH_DEPTH
];
113 struct radeon_llvm_loop loop
[RADEON_LLVM_MAX_LOOP_DEPTH
];
115 unsigned branch_depth
;
119 LLVMValueRef main_fn
;
121 struct gallivm_state gallivm
;
124 static inline LLVMValueRef
bitcast(
125 struct lp_build_tgsi_context
* bld_base
,
126 enum tgsi_opcode_type type
,
130 LLVMBuilderRef builder
= bld_base
->base
.gallivm
->builder
;
131 LLVMContextRef ctx
= bld_base
->base
.gallivm
->context
;
132 LLVMTypeRef dst_type
;
135 case TGSI_TYPE_UNSIGNED
:
136 case TGSI_TYPE_SIGNED
:
137 dst_type
= LLVMInt32TypeInContext(ctx
);
139 case TGSI_TYPE_UNTYPED
:
140 case TGSI_TYPE_FLOAT
:
141 dst_type
= LLVMFloatTypeInContext(ctx
);
149 return LLVMBuildBitCast(builder
, value
, dst_type
, "");
155 void radeon_llvm_emit_prepare_cube_coords(struct lp_build_tgsi_context
* bld_base
,
156 LLVMValueRef
*arg
, unsigned target
);
158 void radeon_llvm_context_init(struct radeon_llvm_context
* ctx
);
160 void radeon_llvm_dispose(struct radeon_llvm_context
* ctx
);
162 inline static struct radeon_llvm_context
* radeon_llvm_context(
163 struct lp_build_tgsi_context
* bld_base
)
165 return (struct radeon_llvm_context
*)bld_base
;
168 unsigned radeon_llvm_reg_index_soa(unsigned index
, unsigned chan
);
170 void radeon_llvm_finalize_module(struct radeon_llvm_context
* ctx
);
173 build_intrinsic(LLVMBuilderRef builder
,
175 LLVMTypeRef ret_type
,
181 build_tgsi_intrinsic_nomem(
182 const struct lp_build_tgsi_action
* action
,
183 struct lp_build_tgsi_context
* bld_base
,
184 struct lp_build_emit_data
* emit_data
);
188 #endif /* RADEON_LLVM_H */