src/gallium/drivers/radeon/radeon_llvm.h

   1 /*
   2  * Copyright 2011 Advanced Micro Devices, Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  20  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  21  * SOFTWARE.
  22  *
  23  * Authors: Tom Stellard <thomas.stellard@amd.com>
  24  *
  25  */
  26
  27 #ifndef RADEON_LLVM_H
  28 #define RADEON_LLVM_H
  29
  30 #include <llvm-c/Core.h>
  31 #include "gallivm/lp_bld_init.h"
  32 #include "gallivm/lp_bld_tgsi.h"
  33
  34 #define RADEON_LLVM_MAX_INPUTS 32 * 4
  35 #define RADEON_LLVM_MAX_OUTPUTS 32 * 4
  36
  37 #define RADEON_LLVM_INITIAL_CF_DEPTH 4
  38
  39 #define RADEON_LLVM_MAX_SYSTEM_VALUES 4
  40
  41 struct radeon_llvm_branch {
  42         LLVMBasicBlockRef endif_block;
  43         LLVMBasicBlockRef if_block;
  44         LLVMBasicBlockRef else_block;
  45         unsigned has_else;
  46 };
  47
  48 struct radeon_llvm_loop {
  49         LLVMBasicBlockRef loop_block;
  50         LLVMBasicBlockRef endloop_block;
  51 };
  52
  53 struct radeon_llvm_context {
  54
  55         struct lp_build_tgsi_soa_context soa;
  56
  57         unsigned chip_class;
  58         unsigned type;
  59         unsigned face_gpr;
  60         unsigned two_side;
  61         unsigned inputs_count;
  62         struct r600_shader_io * r600_inputs;
  63         struct r600_shader_io * r600_outputs;
  64         struct pipe_stream_output_info *stream_outputs;
  65         unsigned color_buffer_count;
  66         unsigned fs_color_all;
  67         unsigned alpha_to_one;
  68         unsigned has_txq_cube_array_z_comp;
  69         unsigned uses_tex_buffers;
  70         unsigned has_compressed_msaa_texturing;
  71
  72         /*=== Front end configuration ===*/
  73
  74         /* Instructions that are not described by any of the TGSI opcodes. */
  75
  76         /** This function is responsible for initilizing the inputs array and will be
  77           * called once for each input declared in the TGSI shader.
  78           */
  79         void (*load_input)(struct radeon_llvm_context *,
  80                         unsigned input_index,
  81                         const struct tgsi_full_declaration *decl);
  82
  83         void (*load_system_value)(struct radeon_llvm_context *,
  84                         unsigned index,
  85                         const struct tgsi_full_declaration *decl);
  86
  87         /** This array contains the input values for the shader.  Typically these
  88           * values will be in the form of a target intrinsic that will inform the
  89           * backend how to load the actual inputs to the shader.
  90           */
  91         LLVMValueRef inputs[RADEON_LLVM_MAX_INPUTS];
  92         LLVMValueRef outputs[RADEON_LLVM_MAX_OUTPUTS][TGSI_NUM_CHANNELS];
  93         unsigned output_reg_count;
  94
  95         /** This pointer is used to contain the temporary values.
  96           * The amount of temporary used in tgsi can't be bound to a max value and
  97           * thus we must allocate this array at runtime.
  98           */
  99         LLVMValueRef *temps;
 100         unsigned temps_count;
 101         LLVMValueRef system_values[RADEON_LLVM_MAX_SYSTEM_VALUES];
 102
 103         /*=== Private Members ===*/
 104
 105         struct radeon_llvm_branch *branch;
 106         struct radeon_llvm_loop *loop;
 107
 108         unsigned branch_depth;
 109         unsigned branch_depth_max;
 110         unsigned loop_depth;
 111         unsigned loop_depth_max;
 112
 113         struct tgsi_declaration_range *arrays;
 114
 115         LLVMValueRef main_fn;
 116
 117         struct gallivm_state gallivm;
 118 };
 119
 120 static inline LLVMTypeRef tgsi2llvmtype(
 121                 struct lp_build_tgsi_context * bld_base,
 122                 enum tgsi_opcode_type type)
 123 {
 124         LLVMContextRef ctx = bld_base->base.gallivm->context;
 125
 126         switch (type) {
 127         case TGSI_TYPE_UNSIGNED:
 128         case TGSI_TYPE_SIGNED:
 129                 return LLVMInt32TypeInContext(ctx);
 130         case TGSI_TYPE_DOUBLE:
 131                 return LLVMDoubleTypeInContext(ctx);
 132         case TGSI_TYPE_UNTYPED:
 133         case TGSI_TYPE_FLOAT:
 134                 return LLVMFloatTypeInContext(ctx);
 135         default: break;
 136         }
 137         return 0;
 138 }
 139
 140 static inline LLVMValueRef bitcast(
 141                 struct lp_build_tgsi_context * bld_base,
 142                 enum tgsi_opcode_type type,
 143                 LLVMValueRef value
 144 )
 145 {
 146         LLVMBuilderRef builder = bld_base->base.gallivm->builder;
 147         LLVMTypeRef dst_type = tgsi2llvmtype(bld_base, type);
 148
 149         if (dst_type)
 150                 return LLVMBuildBitCast(builder, value, dst_type, "");
 151         else
 152                 return value;
 153 }
 154
 155
 156 void radeon_llvm_emit_prepare_cube_coords(struct lp_build_tgsi_context * bld_base,
 157                                           struct lp_build_emit_data * emit_data,
 158                                           LLVMValueRef *coords_arg,
 159                                           LLVMValueRef *derivs_arg);
 160
 161 void radeon_llvm_context_init(struct radeon_llvm_context * ctx,
 162                               const char *triple);
 163
 164 void radeon_llvm_create_func(struct radeon_llvm_context * ctx,
 165                              LLVMTypeRef *ParamTypes, unsigned ParamCount);
 166
 167 void radeon_llvm_dispose(struct radeon_llvm_context * ctx);
 168
 169 inline static struct radeon_llvm_context * radeon_llvm_context(
 170         struct lp_build_tgsi_context * bld_base)
 171 {
 172         return (struct radeon_llvm_context*)bld_base;
 173 }
 174
 175 unsigned radeon_llvm_reg_index_soa(unsigned index, unsigned chan);
 176
 177 void radeon_llvm_finalize_module(struct radeon_llvm_context * ctx);
 178
 179 void
 180 build_tgsi_intrinsic_nomem(
 181                 const struct lp_build_tgsi_action * action,
 182                 struct lp_build_tgsi_context * bld_base,
 183                 struct lp_build_emit_data * emit_data);
 184
 185 LLVMValueRef
 186 radeon_llvm_emit_fetch_double(struct lp_build_tgsi_context *bld_base,
 187                               LLVMValueRef ptr,
 188                               LLVMValueRef ptr2);
 189
 190 LLVMValueRef radeon_llvm_saturate(struct lp_build_tgsi_context *bld_base,
 191                                   LLVMValueRef value);
 192
 193 LLVMValueRef radeon_llvm_emit_fetch(struct lp_build_tgsi_context *bld_base,
 194                                     const struct tgsi_full_src_register *reg,
 195                                     enum tgsi_opcode_type type,
 196                                     unsigned swizzle);
 197
 198 void radeon_llvm_emit_store(
 199         struct lp_build_tgsi_context * bld_base,
 200         const struct tgsi_full_instruction * inst,
 201         const struct tgsi_opcode_info * info,
 202         LLVMValueRef dst[4]);
 203
 204 #endif /* RADEON_LLVM_H */