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radeon/uvd: move polaris fw check into radeon_video.c v2
[mesa.git] / src / gallium / drivers / radeon / radeon_uvd.c
1 /**************************************************************************
2 *
3 * Copyright 2011 Advanced Micro Devices, Inc.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28 /*
29 * Authors:
30 * Christian König <christian.koenig@amd.com>
31 *
32 */
33
34 #include <sys/types.h>
35 #include <assert.h>
36 #include <errno.h>
37 #include <unistd.h>
38 #include <stdio.h>
39
40 #include "pipe/p_video_codec.h"
41
42 #include "util/u_memory.h"
43 #include "util/u_video.h"
44
45 #include "vl/vl_defines.h"
46 #include "vl/vl_mpeg12_decoder.h"
47
48 #include "r600_pipe_common.h"
49 #include "radeon_video.h"
50 #include "radeon_uvd.h"
51
52 #define NUM_BUFFERS 4
53
54 #define NUM_MPEG2_REFS 6
55 #define NUM_H264_REFS 17
56 #define NUM_VC1_REFS 5
57
58 #define FB_BUFFER_OFFSET 0x1000
59 #define FB_BUFFER_SIZE 2048
60 #define FB_BUFFER_SIZE_TONGA (2048 * 64)
61 #define IT_SCALING_TABLE_SIZE 992
62
63 /* UVD decoder representation */
64 struct ruvd_decoder {
65 struct pipe_video_codec base;
66
67 ruvd_set_dtb set_dtb;
68
69 unsigned stream_handle;
70 unsigned stream_type;
71 unsigned frame_number;
72
73 struct pipe_screen *screen;
74 struct radeon_winsys* ws;
75 struct radeon_winsys_cs* cs;
76
77 unsigned cur_buffer;
78
79 struct rvid_buffer msg_fb_it_buffers[NUM_BUFFERS];
80 struct ruvd_msg *msg;
81 uint32_t *fb;
82 unsigned fb_size;
83 uint8_t *it;
84
85 struct rvid_buffer bs_buffers[NUM_BUFFERS];
86 void* bs_ptr;
87 unsigned bs_size;
88
89 struct rvid_buffer dpb;
90 bool use_legacy;
91 struct rvid_buffer ctx;
92 };
93
94 /* flush IB to the hardware */
95 static void flush(struct ruvd_decoder *dec)
96 {
97 dec->ws->cs_flush(dec->cs, RADEON_FLUSH_ASYNC, NULL);
98 }
99
100 /* add a new set register command to the IB */
101 static void set_reg(struct ruvd_decoder *dec, unsigned reg, uint32_t val)
102 {
103 radeon_emit(dec->cs, RUVD_PKT0(reg >> 2, 0));
104 radeon_emit(dec->cs, val);
105 }
106
107 /* send a command to the VCPU through the GPCOM registers */
108 static void send_cmd(struct ruvd_decoder *dec, unsigned cmd,
109 struct pb_buffer* buf, uint32_t off,
110 enum radeon_bo_usage usage, enum radeon_bo_domain domain)
111 {
112 int reloc_idx;
113
114 reloc_idx = dec->ws->cs_add_buffer(dec->cs, buf, usage, domain,
115 RADEON_PRIO_UVD);
116 if (!dec->use_legacy) {
117 uint64_t addr;
118 addr = dec->ws->buffer_get_virtual_address(buf);
119 addr = addr + off;
120 set_reg(dec, RUVD_GPCOM_VCPU_DATA0, addr);
121 set_reg(dec, RUVD_GPCOM_VCPU_DATA1, addr >> 32);
122 } else {
123 set_reg(dec, RUVD_GPCOM_VCPU_DATA0, off);
124 set_reg(dec, RUVD_GPCOM_VCPU_DATA1, reloc_idx * 4);
125 }
126 set_reg(dec, RUVD_GPCOM_VCPU_CMD, cmd << 1);
127 }
128
129 /* do the codec needs an IT buffer ?*/
130 static bool have_it(struct ruvd_decoder *dec)
131 {
132 return dec->stream_type == RUVD_CODEC_H264_PERF ||
133 dec->stream_type == RUVD_CODEC_H265;
134 }
135
136 /* map the next available message/feedback/itscaling buffer */
137 static void map_msg_fb_it_buf(struct ruvd_decoder *dec)
138 {
139 struct rvid_buffer* buf;
140 uint8_t *ptr;
141
142 /* grab the current message/feedback buffer */
143 buf = &dec->msg_fb_it_buffers[dec->cur_buffer];
144
145 /* and map it for CPU access */
146 ptr = dec->ws->buffer_map(buf->res->buf, dec->cs, PIPE_TRANSFER_WRITE);
147
148 /* calc buffer offsets */
149 dec->msg = (struct ruvd_msg *)ptr;
150 dec->fb = (uint32_t *)(ptr + FB_BUFFER_OFFSET);
151 if (have_it(dec))
152 dec->it = (uint8_t *)(ptr + FB_BUFFER_OFFSET + dec->fb_size);
153 }
154
155 /* unmap and send a message command to the VCPU */
156 static void send_msg_buf(struct ruvd_decoder *dec)
157 {
158 struct rvid_buffer* buf;
159
160 /* ignore the request if message/feedback buffer isn't mapped */
161 if (!dec->msg || !dec->fb)
162 return;
163
164 /* grab the current message buffer */
165 buf = &dec->msg_fb_it_buffers[dec->cur_buffer];
166
167 /* unmap the buffer */
168 dec->ws->buffer_unmap(buf->res->buf);
169 dec->msg = NULL;
170 dec->fb = NULL;
171 dec->it = NULL;
172
173 /* and send it to the hardware */
174 send_cmd(dec, RUVD_CMD_MSG_BUFFER, buf->res->buf, 0,
175 RADEON_USAGE_READ, RADEON_DOMAIN_GTT);
176 }
177
178 /* cycle to the next set of buffers */
179 static void next_buffer(struct ruvd_decoder *dec)
180 {
181 ++dec->cur_buffer;
182 dec->cur_buffer %= NUM_BUFFERS;
183 }
184
185 /* convert the profile into something UVD understands */
186 static uint32_t profile2stream_type(struct ruvd_decoder *dec, unsigned family)
187 {
188 switch (u_reduce_video_profile(dec->base.profile)) {
189 case PIPE_VIDEO_FORMAT_MPEG4_AVC:
190 return (family >= CHIP_TONGA) ?
191 RUVD_CODEC_H264_PERF : RUVD_CODEC_H264;
192
193 case PIPE_VIDEO_FORMAT_VC1:
194 return RUVD_CODEC_VC1;
195
196 case PIPE_VIDEO_FORMAT_MPEG12:
197 return RUVD_CODEC_MPEG2;
198
199 case PIPE_VIDEO_FORMAT_MPEG4:
200 return RUVD_CODEC_MPEG4;
201
202 case PIPE_VIDEO_FORMAT_HEVC:
203 return RUVD_CODEC_H265;
204
205 default:
206 assert(0);
207 return 0;
208 }
209 }
210
211 static unsigned calc_ctx_size_h264_perf(struct ruvd_decoder *dec)
212 {
213 unsigned width_in_mb, height_in_mb, ctx_size;
214 unsigned width = align(dec->base.width, VL_MACROBLOCK_WIDTH);
215 unsigned height = align(dec->base.height, VL_MACROBLOCK_HEIGHT);
216
217 unsigned max_references = dec->base.max_references + 1;
218
219 // picture width & height in 16 pixel units
220 width_in_mb = width / VL_MACROBLOCK_WIDTH;
221 height_in_mb = align(height / VL_MACROBLOCK_HEIGHT, 2);
222
223 if (!dec->use_legacy) {
224 unsigned fs_in_mb = width_in_mb * height_in_mb;
225 unsigned num_dpb_buffer;
226 switch(dec->base.level) {
227 case 30:
228 num_dpb_buffer = 8100 / fs_in_mb;
229 break;
230 case 31:
231 num_dpb_buffer = 18000 / fs_in_mb;
232 break;
233 case 32:
234 num_dpb_buffer = 20480 / fs_in_mb;
235 break;
236 case 41:
237 num_dpb_buffer = 32768 / fs_in_mb;
238 break;
239 case 42:
240 num_dpb_buffer = 34816 / fs_in_mb;
241 break;
242 case 50:
243 num_dpb_buffer = 110400 / fs_in_mb;
244 break;
245 case 51:
246 num_dpb_buffer = 184320 / fs_in_mb;
247 break;
248 default:
249 num_dpb_buffer = 184320 / fs_in_mb;
250 break;
251 }
252 num_dpb_buffer++;
253 max_references = MAX2(MIN2(NUM_H264_REFS, num_dpb_buffer), max_references);
254 ctx_size = max_references * align(width_in_mb * height_in_mb * 192, 256);
255 } else {
256 // the firmware seems to always assume a minimum of ref frames
257 max_references = MAX2(NUM_H264_REFS, max_references);
258 // macroblock context buffer
259 ctx_size = align(width_in_mb * height_in_mb * max_references * 192, 256);
260 }
261
262 return ctx_size;
263 }
264
265 static unsigned calc_ctx_size_h265_main(struct ruvd_decoder *dec)
266 {
267 unsigned width = align(dec->base.width, VL_MACROBLOCK_WIDTH);
268 unsigned height = align(dec->base.height, VL_MACROBLOCK_HEIGHT);
269
270 unsigned max_references = dec->base.max_references + 1;
271
272 if (dec->base.width * dec->base.height >= 4096*2000)
273 max_references = MAX2(max_references, 8);
274 else
275 max_references = MAX2(max_references, 17);
276
277 width = align (width, 16);
278 height = align (height, 16);
279 return ((width + 255) / 16) * ((height + 255) / 16) * 16 * max_references + 52 * 1024;
280 }
281
282 static unsigned calc_ctx_size_h265_main10(struct ruvd_decoder *dec, struct pipe_h265_picture_desc *pic)
283 {
284 unsigned block_size, log2_ctb_size, width_in_ctb, height_in_ctb, num_16x16_block_per_ctb;
285 unsigned context_buffer_size_per_ctb_row, cm_buffer_size, max_mb_address, db_left_tile_pxl_size;
286 unsigned db_left_tile_ctx_size = 4096 / 16 * (32 + 16 * 4);
287
288 unsigned width = align(dec->base.width, VL_MACROBLOCK_WIDTH);
289 unsigned height = align(dec->base.height, VL_MACROBLOCK_HEIGHT);
290 unsigned coeff_10bit = (pic->pps->sps->bit_depth_luma_minus8 || pic->pps->sps->bit_depth_chroma_minus8) ? 2 : 1;
291
292 unsigned max_references = dec->base.max_references + 1;
293
294 if (dec->base.width * dec->base.height >= 4096*2000)
295 max_references = MAX2(max_references, 8);
296 else
297 max_references = MAX2(max_references, 17);
298
299 block_size = (1 << (pic->pps->sps->log2_min_luma_coding_block_size_minus3 + 3));
300 log2_ctb_size = block_size + pic->pps->sps->log2_diff_max_min_luma_coding_block_size;
301
302 width_in_ctb = (width + ((1 << log2_ctb_size) - 1)) >> log2_ctb_size;
303 height_in_ctb = (height + ((1 << log2_ctb_size) - 1)) >> log2_ctb_size;
304
305 num_16x16_block_per_ctb = ((1 << log2_ctb_size) >> 4) * ((1 << log2_ctb_size) >> 4);
306 context_buffer_size_per_ctb_row = align(width_in_ctb * num_16x16_block_per_ctb * 16, 256);
307 max_mb_address = (unsigned) ceil(height * 8 / 2048.0);
308
309 cm_buffer_size = max_references * context_buffer_size_per_ctb_row * height_in_ctb;
310 db_left_tile_pxl_size = coeff_10bit * (max_mb_address * 2 * 2048 + 1024);
311
312 return cm_buffer_size + db_left_tile_ctx_size + db_left_tile_pxl_size;
313 }
314
315 /* calculate size of reference picture buffer */
316 static unsigned calc_dpb_size(struct ruvd_decoder *dec)
317 {
318 unsigned width_in_mb, height_in_mb, image_size, dpb_size;
319
320 // always align them to MB size for dpb calculation
321 unsigned width = align(dec->base.width, VL_MACROBLOCK_WIDTH);
322 unsigned height = align(dec->base.height, VL_MACROBLOCK_HEIGHT);
323
324 // always one more for currently decoded picture
325 unsigned max_references = dec->base.max_references + 1;
326
327 // aligned size of a single frame
328 image_size = width * height;
329 image_size += image_size / 2;
330 image_size = align(image_size, 1024);
331
332 // picture width & height in 16 pixel units
333 width_in_mb = width / VL_MACROBLOCK_WIDTH;
334 height_in_mb = align(height / VL_MACROBLOCK_HEIGHT, 2);
335
336 switch (u_reduce_video_profile(dec->base.profile)) {
337 case PIPE_VIDEO_FORMAT_MPEG4_AVC: {
338 if (!dec->use_legacy) {
339 unsigned fs_in_mb = width_in_mb * height_in_mb;
340 unsigned alignment = 64, num_dpb_buffer;
341
342 if (dec->stream_type == RUVD_CODEC_H264_PERF)
343 alignment = 256;
344 switch(dec->base.level) {
345 case 30:
346 num_dpb_buffer = 8100 / fs_in_mb;
347 break;
348 case 31:
349 num_dpb_buffer = 18000 / fs_in_mb;
350 break;
351 case 32:
352 num_dpb_buffer = 20480 / fs_in_mb;
353 break;
354 case 41:
355 num_dpb_buffer = 32768 / fs_in_mb;
356 break;
357 case 42:
358 num_dpb_buffer = 34816 / fs_in_mb;
359 break;
360 case 50:
361 num_dpb_buffer = 110400 / fs_in_mb;
362 break;
363 case 51:
364 num_dpb_buffer = 184320 / fs_in_mb;
365 break;
366 default:
367 num_dpb_buffer = 184320 / fs_in_mb;
368 break;
369 }
370 num_dpb_buffer++;
371 max_references = MAX2(MIN2(NUM_H264_REFS, num_dpb_buffer), max_references);
372 dpb_size = image_size * max_references;
373 if ((dec->stream_type != RUVD_CODEC_H264_PERF) ||
374 (((struct r600_common_screen*)dec->screen)->family < CHIP_POLARIS10)) {
375 dpb_size += max_references * align(width_in_mb * height_in_mb * 192, alignment);
376 dpb_size += align(width_in_mb * height_in_mb * 32, alignment);
377 }
378 } else {
379 // the firmware seems to allways assume a minimum of ref frames
380 max_references = MAX2(NUM_H264_REFS, max_references);
381 // reference picture buffer
382 dpb_size = image_size * max_references;
383 if ((dec->stream_type != RUVD_CODEC_H264_PERF) ||
384 (((struct r600_common_screen*)dec->screen)->family < CHIP_POLARIS10)) {
385 // macroblock context buffer
386 dpb_size += width_in_mb * height_in_mb * max_references * 192;
387 // IT surface buffer
388 dpb_size += width_in_mb * height_in_mb * 32;
389 }
390 }
391 break;
392 }
393
394 case PIPE_VIDEO_FORMAT_HEVC:
395 if (dec->base.width * dec->base.height >= 4096*2000)
396 max_references = MAX2(max_references, 8);
397 else
398 max_references = MAX2(max_references, 17);
399
400 width = align (width, 16);
401 height = align (height, 16);
402 if (dec->base.profile == PIPE_VIDEO_PROFILE_HEVC_MAIN_10)
403 dpb_size = align((width * height * 9) / 4, 256) * max_references;
404 else
405 dpb_size = align((width * height * 3) / 2, 256) * max_references;
406 break;
407
408 case PIPE_VIDEO_FORMAT_VC1:
409 // the firmware seems to allways assume a minimum of ref frames
410 max_references = MAX2(NUM_VC1_REFS, max_references);
411
412 // reference picture buffer
413 dpb_size = image_size * max_references;
414
415 // CONTEXT_BUFFER
416 dpb_size += width_in_mb * height_in_mb * 128;
417
418 // IT surface buffer
419 dpb_size += width_in_mb * 64;
420
421 // DB surface buffer
422 dpb_size += width_in_mb * 128;
423
424 // BP
425 dpb_size += align(MAX2(width_in_mb, height_in_mb) * 7 * 16, 64);
426 break;
427
428 case PIPE_VIDEO_FORMAT_MPEG12:
429 // reference picture buffer, must be big enough for all frames
430 dpb_size = image_size * NUM_MPEG2_REFS;
431 break;
432
433 case PIPE_VIDEO_FORMAT_MPEG4:
434 // reference picture buffer
435 dpb_size = image_size * max_references;
436
437 // CM
438 dpb_size += width_in_mb * height_in_mb * 64;
439
440 // IT surface buffer
441 dpb_size += align(width_in_mb * height_in_mb * 32, 64);
442
443 dpb_size = MAX2(dpb_size, 30 * 1024 * 1024);
444 break;
445
446 default:
447 // something is missing here
448 assert(0);
449
450 // at least use a sane default value
451 dpb_size = 32 * 1024 * 1024;
452 break;
453 }
454 return dpb_size;
455 }
456
457 /* free associated data in the video buffer callback */
458 static void ruvd_destroy_associated_data(void *data)
459 {
460 /* NOOP, since we only use an intptr */
461 }
462
463 /* get h264 specific message bits */
464 static struct ruvd_h264 get_h264_msg(struct ruvd_decoder *dec, struct pipe_h264_picture_desc *pic)
465 {
466 struct ruvd_h264 result;
467
468 memset(&result, 0, sizeof(result));
469 switch (pic->base.profile) {
470 case PIPE_VIDEO_PROFILE_MPEG4_AVC_BASELINE:
471 result.profile = RUVD_H264_PROFILE_BASELINE;
472 break;
473
474 case PIPE_VIDEO_PROFILE_MPEG4_AVC_MAIN:
475 result.profile = RUVD_H264_PROFILE_MAIN;
476 break;
477
478 case PIPE_VIDEO_PROFILE_MPEG4_AVC_HIGH:
479 result.profile = RUVD_H264_PROFILE_HIGH;
480 break;
481
482 default:
483 assert(0);
484 break;
485 }
486
487 result.level = dec->base.level;
488
489 result.sps_info_flags = 0;
490 result.sps_info_flags |= pic->pps->sps->direct_8x8_inference_flag << 0;
491 result.sps_info_flags |= pic->pps->sps->mb_adaptive_frame_field_flag << 1;
492 result.sps_info_flags |= pic->pps->sps->frame_mbs_only_flag << 2;
493 result.sps_info_flags |= pic->pps->sps->delta_pic_order_always_zero_flag << 3;
494
495 result.bit_depth_luma_minus8 = pic->pps->sps->bit_depth_luma_minus8;
496 result.bit_depth_chroma_minus8 = pic->pps->sps->bit_depth_chroma_minus8;
497 result.log2_max_frame_num_minus4 = pic->pps->sps->log2_max_frame_num_minus4;
498 result.pic_order_cnt_type = pic->pps->sps->pic_order_cnt_type;
499 result.log2_max_pic_order_cnt_lsb_minus4 = pic->pps->sps->log2_max_pic_order_cnt_lsb_minus4;
500
501 switch (dec->base.chroma_format) {
502 case PIPE_VIDEO_CHROMA_FORMAT_NONE:
503 /* TODO: assert? */
504 break;
505 case PIPE_VIDEO_CHROMA_FORMAT_400:
506 result.chroma_format = 0;
507 break;
508 case PIPE_VIDEO_CHROMA_FORMAT_420:
509 result.chroma_format = 1;
510 break;
511 case PIPE_VIDEO_CHROMA_FORMAT_422:
512 result.chroma_format = 2;
513 break;
514 case PIPE_VIDEO_CHROMA_FORMAT_444:
515 result.chroma_format = 3;
516 break;
517 }
518
519 result.pps_info_flags = 0;
520 result.pps_info_flags |= pic->pps->transform_8x8_mode_flag << 0;
521 result.pps_info_flags |= pic->pps->redundant_pic_cnt_present_flag << 1;
522 result.pps_info_flags |= pic->pps->constrained_intra_pred_flag << 2;
523 result.pps_info_flags |= pic->pps->deblocking_filter_control_present_flag << 3;
524 result.pps_info_flags |= pic->pps->weighted_bipred_idc << 4;
525 result.pps_info_flags |= pic->pps->weighted_pred_flag << 6;
526 result.pps_info_flags |= pic->pps->bottom_field_pic_order_in_frame_present_flag << 7;
527 result.pps_info_flags |= pic->pps->entropy_coding_mode_flag << 8;
528
529 result.num_slice_groups_minus1 = pic->pps->num_slice_groups_minus1;
530 result.slice_group_map_type = pic->pps->slice_group_map_type;
531 result.slice_group_change_rate_minus1 = pic->pps->slice_group_change_rate_minus1;
532 result.pic_init_qp_minus26 = pic->pps->pic_init_qp_minus26;
533 result.chroma_qp_index_offset = pic->pps->chroma_qp_index_offset;
534 result.second_chroma_qp_index_offset = pic->pps->second_chroma_qp_index_offset;
535
536 memcpy(result.scaling_list_4x4, pic->pps->ScalingList4x4, 6*16);
537 memcpy(result.scaling_list_8x8, pic->pps->ScalingList8x8, 2*64);
538
539 if (dec->stream_type == RUVD_CODEC_H264_PERF) {
540 memcpy(dec->it, result.scaling_list_4x4, 6*16);
541 memcpy((dec->it + 96), result.scaling_list_8x8, 2*64);
542 }
543
544 result.num_ref_frames = pic->num_ref_frames;
545
546 result.num_ref_idx_l0_active_minus1 = pic->num_ref_idx_l0_active_minus1;
547 result.num_ref_idx_l1_active_minus1 = pic->num_ref_idx_l1_active_minus1;
548
549 result.frame_num = pic->frame_num;
550 memcpy(result.frame_num_list, pic->frame_num_list, 4*16);
551 result.curr_field_order_cnt_list[0] = pic->field_order_cnt[0];
552 result.curr_field_order_cnt_list[1] = pic->field_order_cnt[1];
553 memcpy(result.field_order_cnt_list, pic->field_order_cnt_list, 4*16*2);
554
555 result.decoded_pic_idx = pic->frame_num;
556
557 return result;
558 }
559
560 /* get h265 specific message bits */
561 static struct ruvd_h265 get_h265_msg(struct ruvd_decoder *dec, struct pipe_video_buffer *target,
562 struct pipe_h265_picture_desc *pic)
563 {
564 struct ruvd_h265 result;
565 unsigned i;
566
567 memset(&result, 0, sizeof(result));
568
569 result.sps_info_flags = 0;
570 result.sps_info_flags |= pic->pps->sps->scaling_list_enabled_flag << 0;
571 result.sps_info_flags |= pic->pps->sps->amp_enabled_flag << 1;
572 result.sps_info_flags |= pic->pps->sps->sample_adaptive_offset_enabled_flag << 2;
573 result.sps_info_flags |= pic->pps->sps->pcm_enabled_flag << 3;
574 result.sps_info_flags |= pic->pps->sps->pcm_loop_filter_disabled_flag << 4;
575 result.sps_info_flags |= pic->pps->sps->long_term_ref_pics_present_flag << 5;
576 result.sps_info_flags |= pic->pps->sps->sps_temporal_mvp_enabled_flag << 6;
577 result.sps_info_flags |= pic->pps->sps->strong_intra_smoothing_enabled_flag << 7;
578 result.sps_info_flags |= pic->pps->sps->separate_colour_plane_flag << 8;
579 if (((struct r600_common_screen*)dec->screen)->family == CHIP_CARRIZO)
580 result.sps_info_flags |= 1 << 9;
581 if (pic->UseRefPicList == true)
582 result.sps_info_flags |= 1 << 10;
583
584 result.chroma_format = pic->pps->sps->chroma_format_idc;
585 result.bit_depth_luma_minus8 = pic->pps->sps->bit_depth_luma_minus8;
586 result.bit_depth_chroma_minus8 = pic->pps->sps->bit_depth_chroma_minus8;
587 result.log2_max_pic_order_cnt_lsb_minus4 = pic->pps->sps->log2_max_pic_order_cnt_lsb_minus4;
588 result.sps_max_dec_pic_buffering_minus1 = pic->pps->sps->sps_max_dec_pic_buffering_minus1;
589 result.log2_min_luma_coding_block_size_minus3 = pic->pps->sps->log2_min_luma_coding_block_size_minus3;
590 result.log2_diff_max_min_luma_coding_block_size = pic->pps->sps->log2_diff_max_min_luma_coding_block_size;
591 result.log2_min_transform_block_size_minus2 = pic->pps->sps->log2_min_transform_block_size_minus2;
592 result.log2_diff_max_min_transform_block_size = pic->pps->sps->log2_diff_max_min_transform_block_size;
593 result.max_transform_hierarchy_depth_inter = pic->pps->sps->max_transform_hierarchy_depth_inter;
594 result.max_transform_hierarchy_depth_intra = pic->pps->sps->max_transform_hierarchy_depth_intra;
595 result.pcm_sample_bit_depth_luma_minus1 = pic->pps->sps->pcm_sample_bit_depth_luma_minus1;
596 result.pcm_sample_bit_depth_chroma_minus1 = pic->pps->sps->pcm_sample_bit_depth_chroma_minus1;
597 result.log2_min_pcm_luma_coding_block_size_minus3 = pic->pps->sps->log2_min_pcm_luma_coding_block_size_minus3;
598 result.log2_diff_max_min_pcm_luma_coding_block_size = pic->pps->sps->log2_diff_max_min_pcm_luma_coding_block_size;
599 result.num_short_term_ref_pic_sets = pic->pps->sps->num_short_term_ref_pic_sets;
600
601 result.pps_info_flags = 0;
602 result.pps_info_flags |= pic->pps->dependent_slice_segments_enabled_flag << 0;
603 result.pps_info_flags |= pic->pps->output_flag_present_flag << 1;
604 result.pps_info_flags |= pic->pps->sign_data_hiding_enabled_flag << 2;
605 result.pps_info_flags |= pic->pps->cabac_init_present_flag << 3;
606 result.pps_info_flags |= pic->pps->constrained_intra_pred_flag << 4;
607 result.pps_info_flags |= pic->pps->transform_skip_enabled_flag << 5;
608 result.pps_info_flags |= pic->pps->cu_qp_delta_enabled_flag << 6;
609 result.pps_info_flags |= pic->pps->pps_slice_chroma_qp_offsets_present_flag << 7;
610 result.pps_info_flags |= pic->pps->weighted_pred_flag << 8;
611 result.pps_info_flags |= pic->pps->weighted_bipred_flag << 9;
612 result.pps_info_flags |= pic->pps->transquant_bypass_enabled_flag << 10;
613 result.pps_info_flags |= pic->pps->tiles_enabled_flag << 11;
614 result.pps_info_flags |= pic->pps->entropy_coding_sync_enabled_flag << 12;
615 result.pps_info_flags |= pic->pps->uniform_spacing_flag << 13;
616 result.pps_info_flags |= pic->pps->loop_filter_across_tiles_enabled_flag << 14;
617 result.pps_info_flags |= pic->pps->pps_loop_filter_across_slices_enabled_flag << 15;
618 result.pps_info_flags |= pic->pps->deblocking_filter_override_enabled_flag << 16;
619 result.pps_info_flags |= pic->pps->pps_deblocking_filter_disabled_flag << 17;
620 result.pps_info_flags |= pic->pps->lists_modification_present_flag << 18;
621 result.pps_info_flags |= pic->pps->slice_segment_header_extension_present_flag << 19;
622 //result.pps_info_flags |= pic->pps->deblocking_filter_control_present_flag; ???
623
624 result.num_extra_slice_header_bits = pic->pps->num_extra_slice_header_bits;
625 result.num_long_term_ref_pic_sps = pic->pps->sps->num_long_term_ref_pics_sps;
626 result.num_ref_idx_l0_default_active_minus1 = pic->pps->num_ref_idx_l0_default_active_minus1;
627 result.num_ref_idx_l1_default_active_minus1 = pic->pps->num_ref_idx_l1_default_active_minus1;
628 result.pps_cb_qp_offset = pic->pps->pps_cb_qp_offset;
629 result.pps_cr_qp_offset = pic->pps->pps_cr_qp_offset;
630 result.pps_beta_offset_div2 = pic->pps->pps_beta_offset_div2;
631 result.pps_tc_offset_div2 = pic->pps->pps_tc_offset_div2;
632 result.diff_cu_qp_delta_depth = pic->pps->diff_cu_qp_delta_depth;
633 result.num_tile_columns_minus1 = pic->pps->num_tile_columns_minus1;
634 result.num_tile_rows_minus1 = pic->pps->num_tile_rows_minus1;
635 result.log2_parallel_merge_level_minus2 = pic->pps->log2_parallel_merge_level_minus2;
636 result.init_qp_minus26 = pic->pps->init_qp_minus26;
637
638 for (i = 0; i < 19; ++i)
639 result.column_width_minus1[i] = pic->pps->column_width_minus1[i];
640
641 for (i = 0; i < 21; ++i)
642 result.row_height_minus1[i] = pic->pps->row_height_minus1[i];
643
644 result.num_delta_pocs_ref_rps_idx = pic->NumDeltaPocsOfRefRpsIdx;
645 result.curr_idx = pic->CurrPicOrderCntVal;
646 result.curr_poc = pic->CurrPicOrderCntVal;
647
648 vl_video_buffer_set_associated_data(target, &dec->base,
649 (void *)(uintptr_t)pic->CurrPicOrderCntVal,
650 &ruvd_destroy_associated_data);
651
652 for (i = 0; i < 16; ++i) {
653 struct pipe_video_buffer *ref = pic->ref[i];
654 uintptr_t ref_pic = 0;
655
656 result.poc_list[i] = pic->PicOrderCntVal[i];
657
658 if (ref)
659 ref_pic = (uintptr_t)vl_video_buffer_get_associated_data(ref, &dec->base);
660 else
661 ref_pic = 0x7F;
662 result.ref_pic_list[i] = ref_pic;
663 }
664
665 for (i = 0; i < 8; ++i) {
666 result.ref_pic_set_st_curr_before[i] = 0xFF;
667 result.ref_pic_set_st_curr_after[i] = 0xFF;
668 result.ref_pic_set_lt_curr[i] = 0xFF;
669 }
670
671 for (i = 0; i < pic->NumPocStCurrBefore; ++i)
672 result.ref_pic_set_st_curr_before[i] = pic->RefPicSetStCurrBefore[i];
673
674 for (i = 0; i < pic->NumPocStCurrAfter; ++i)
675 result.ref_pic_set_st_curr_after[i] = pic->RefPicSetStCurrAfter[i];
676
677 for (i = 0; i < pic->NumPocLtCurr; ++i)
678 result.ref_pic_set_lt_curr[i] = pic->RefPicSetLtCurr[i];
679
680 for (i = 0; i < 6; ++i)
681 result.ucScalingListDCCoefSizeID2[i] = pic->pps->sps->ScalingListDCCoeff16x16[i];
682
683 for (i = 0; i < 2; ++i)
684 result.ucScalingListDCCoefSizeID3[i] = pic->pps->sps->ScalingListDCCoeff32x32[i];
685
686 memcpy(dec->it, pic->pps->sps->ScalingList4x4, 6 * 16);
687 memcpy(dec->it + 96, pic->pps->sps->ScalingList8x8, 6 * 64);
688 memcpy(dec->it + 480, pic->pps->sps->ScalingList16x16, 6 * 64);
689 memcpy(dec->it + 864, pic->pps->sps->ScalingList32x32, 2 * 64);
690
691 for (i = 0 ; i < 2 ; i++) {
692 for (int j = 0 ; j < 15 ; j++)
693 result.direct_reflist[i][j] = pic->RefPicList[i][j];
694 }
695
696 if ((pic->base.profile == PIPE_VIDEO_PROFILE_HEVC_MAIN_10) &&
697 (target->buffer_format == PIPE_FORMAT_NV12)) {
698 result.p010_mode = 0;
699 result.luma_10to8 = 5;
700 result.chroma_10to8 = 5;
701 result.sclr_luma10to8 = 4;
702 result.sclr_chroma10to8 = 4;
703 }
704
705 /* TODO
706 result.highestTid;
707 result.isNonRef;
708
709 IDRPicFlag;
710 RAPPicFlag;
711 NumPocTotalCurr;
712 NumShortTermPictureSliceHeaderBits;
713 NumLongTermPictureSliceHeaderBits;
714
715 IsLongTerm[16];
716 */
717
718 return result;
719 }
720
721 /* get vc1 specific message bits */
722 static struct ruvd_vc1 get_vc1_msg(struct pipe_vc1_picture_desc *pic)
723 {
724 struct ruvd_vc1 result;
725
726 memset(&result, 0, sizeof(result));
727
728 switch(pic->base.profile) {
729 case PIPE_VIDEO_PROFILE_VC1_SIMPLE:
730 result.profile = RUVD_VC1_PROFILE_SIMPLE;
731 result.level = 1;
732 break;
733
734 case PIPE_VIDEO_PROFILE_VC1_MAIN:
735 result.profile = RUVD_VC1_PROFILE_MAIN;
736 result.level = 2;
737 break;
738
739 case PIPE_VIDEO_PROFILE_VC1_ADVANCED:
740 result.profile = RUVD_VC1_PROFILE_ADVANCED;
741 result.level = 4;
742 break;
743
744 default:
745 assert(0);
746 }
747
748 /* fields common for all profiles */
749 result.sps_info_flags |= pic->postprocflag << 7;
750 result.sps_info_flags |= pic->pulldown << 6;
751 result.sps_info_flags |= pic->interlace << 5;
752 result.sps_info_flags |= pic->tfcntrflag << 4;
753 result.sps_info_flags |= pic->finterpflag << 3;
754 result.sps_info_flags |= pic->psf << 1;
755
756 result.pps_info_flags |= pic->range_mapy_flag << 31;
757 result.pps_info_flags |= pic->range_mapy << 28;
758 result.pps_info_flags |= pic->range_mapuv_flag << 27;
759 result.pps_info_flags |= pic->range_mapuv << 24;
760 result.pps_info_flags |= pic->multires << 21;
761 result.pps_info_flags |= pic->maxbframes << 16;
762 result.pps_info_flags |= pic->overlap << 11;
763 result.pps_info_flags |= pic->quantizer << 9;
764 result.pps_info_flags |= pic->panscan_flag << 7;
765 result.pps_info_flags |= pic->refdist_flag << 6;
766 result.pps_info_flags |= pic->vstransform << 0;
767
768 /* some fields only apply to main/advanced profile */
769 if (pic->base.profile != PIPE_VIDEO_PROFILE_VC1_SIMPLE) {
770 result.pps_info_flags |= pic->syncmarker << 20;
771 result.pps_info_flags |= pic->rangered << 19;
772 result.pps_info_flags |= pic->loopfilter << 5;
773 result.pps_info_flags |= pic->fastuvmc << 4;
774 result.pps_info_flags |= pic->extended_mv << 3;
775 result.pps_info_flags |= pic->extended_dmv << 8;
776 result.pps_info_flags |= pic->dquant << 1;
777 }
778
779 result.chroma_format = 1;
780
781 #if 0
782 //(((unsigned int)(pPicParams->advance.reserved1)) << SPS_INFO_VC1_RESERVED_SHIFT)
783 uint32_t slice_count
784 uint8_t picture_type
785 uint8_t frame_coding_mode
786 uint8_t deblockEnable
787 uint8_t pquant
788 #endif
789
790 return result;
791 }
792
793 /* extract the frame number from a referenced video buffer */
794 static uint32_t get_ref_pic_idx(struct ruvd_decoder *dec, struct pipe_video_buffer *ref)
795 {
796 uint32_t min = MAX2(dec->frame_number, NUM_MPEG2_REFS) - NUM_MPEG2_REFS;
797 uint32_t max = MAX2(dec->frame_number, 1) - 1;
798 uintptr_t frame;
799
800 /* seems to be the most sane fallback */
801 if (!ref)
802 return max;
803
804 /* get the frame number from the associated data */
805 frame = (uintptr_t)vl_video_buffer_get_associated_data(ref, &dec->base);
806
807 /* limit the frame number to a valid range */
808 return MAX2(MIN2(frame, max), min);
809 }
810
811 /* get mpeg2 specific msg bits */
812 static struct ruvd_mpeg2 get_mpeg2_msg(struct ruvd_decoder *dec,
813 struct pipe_mpeg12_picture_desc *pic)
814 {
815 const int *zscan = pic->alternate_scan ? vl_zscan_alternate : vl_zscan_normal;
816 struct ruvd_mpeg2 result;
817 unsigned i;
818
819 memset(&result, 0, sizeof(result));
820 result.decoded_pic_idx = dec->frame_number;
821 for (i = 0; i < 2; ++i)
822 result.ref_pic_idx[i] = get_ref_pic_idx(dec, pic->ref[i]);
823
824 result.load_intra_quantiser_matrix = 1;
825 result.load_nonintra_quantiser_matrix = 1;
826
827 for (i = 0; i < 64; ++i) {
828 result.intra_quantiser_matrix[i] = pic->intra_matrix[zscan[i]];
829 result.nonintra_quantiser_matrix[i] = pic->non_intra_matrix[zscan[i]];
830 }
831
832 result.profile_and_level_indication = 0;
833 result.chroma_format = 0x1;
834
835 result.picture_coding_type = pic->picture_coding_type;
836 result.f_code[0][0] = pic->f_code[0][0] + 1;
837 result.f_code[0][1] = pic->f_code[0][1] + 1;
838 result.f_code[1][0] = pic->f_code[1][0] + 1;
839 result.f_code[1][1] = pic->f_code[1][1] + 1;
840 result.intra_dc_precision = pic->intra_dc_precision;
841 result.pic_structure = pic->picture_structure;
842 result.top_field_first = pic->top_field_first;
843 result.frame_pred_frame_dct = pic->frame_pred_frame_dct;
844 result.concealment_motion_vectors = pic->concealment_motion_vectors;
845 result.q_scale_type = pic->q_scale_type;
846 result.intra_vlc_format = pic->intra_vlc_format;
847 result.alternate_scan = pic->alternate_scan;
848
849 return result;
850 }
851
852 /* get mpeg4 specific msg bits */
853 static struct ruvd_mpeg4 get_mpeg4_msg(struct ruvd_decoder *dec,
854 struct pipe_mpeg4_picture_desc *pic)
855 {
856 struct ruvd_mpeg4 result;
857 unsigned i;
858
859 memset(&result, 0, sizeof(result));
860 result.decoded_pic_idx = dec->frame_number;
861 for (i = 0; i < 2; ++i)
862 result.ref_pic_idx[i] = get_ref_pic_idx(dec, pic->ref[i]);
863
864 result.variant_type = 0;
865 result.profile_and_level_indication = 0xF0; // ASP Level0
866
867 result.video_object_layer_verid = 0x5; // advanced simple
868 result.video_object_layer_shape = 0x0; // rectangular
869
870 result.video_object_layer_width = dec->base.width;
871 result.video_object_layer_height = dec->base.height;
872
873 result.vop_time_increment_resolution = pic->vop_time_increment_resolution;
874
875 result.flags |= pic->short_video_header << 0;
876 //result.flags |= obmc_disable << 1;
877 result.flags |= pic->interlaced << 2;
878 result.flags |= 1 << 3; // load_intra_quant_mat
879 result.flags |= 1 << 4; // load_nonintra_quant_mat
880 result.flags |= pic->quarter_sample << 5;
881 result.flags |= 1 << 6; // complexity_estimation_disable
882 result.flags |= pic->resync_marker_disable << 7;
883 //result.flags |= data_partitioned << 8;
884 //result.flags |= reversible_vlc << 9;
885 result.flags |= 0 << 10; // newpred_enable
886 result.flags |= 0 << 11; // reduced_resolution_vop_enable
887 //result.flags |= scalability << 12;
888 //result.flags |= is_object_layer_identifier << 13;
889 //result.flags |= fixed_vop_rate << 14;
890 //result.flags |= newpred_segment_type << 15;
891
892 result.quant_type = pic->quant_type;
893
894 for (i = 0; i < 64; ++i) {
895 result.intra_quant_mat[i] = pic->intra_matrix[vl_zscan_normal[i]];
896 result.nonintra_quant_mat[i] = pic->non_intra_matrix[vl_zscan_normal[i]];
897 }
898
899 /*
900 int32_t trd [2]
901 int32_t trb [2]
902 uint8_t vop_coding_type
903 uint8_t vop_fcode_forward
904 uint8_t vop_fcode_backward
905 uint8_t rounding_control
906 uint8_t alternate_vertical_scan_flag
907 uint8_t top_field_first
908 */
909
910 return result;
911 }
912
913 /**
914 * destroy this video decoder
915 */
916 static void ruvd_destroy(struct pipe_video_codec *decoder)
917 {
918 struct ruvd_decoder *dec = (struct ruvd_decoder*)decoder;
919 unsigned i;
920
921 assert(decoder);
922
923 map_msg_fb_it_buf(dec);
924 memset(dec->msg, 0, sizeof(*dec->msg));
925 dec->msg->size = sizeof(*dec->msg);
926 dec->msg->msg_type = RUVD_MSG_DESTROY;
927 dec->msg->stream_handle = dec->stream_handle;
928 send_msg_buf(dec);
929
930 flush(dec);
931
932 dec->ws->cs_destroy(dec->cs);
933
934 for (i = 0; i < NUM_BUFFERS; ++i) {
935 rvid_destroy_buffer(&dec->msg_fb_it_buffers[i]);
936 rvid_destroy_buffer(&dec->bs_buffers[i]);
937 }
938
939 rvid_destroy_buffer(&dec->dpb);
940 if ((u_reduce_video_profile(dec->base.profile) == PIPE_VIDEO_FORMAT_HEVC) ||
941 (dec->stream_type == RUVD_CODEC_H264_PERF &&
942 ((struct r600_common_screen*)dec->screen)->family >= CHIP_POLARIS10))
943 rvid_destroy_buffer(&dec->ctx);
944
945 FREE(dec);
946 }
947
948 /**
949 * start decoding of a new frame
950 */
951 static void ruvd_begin_frame(struct pipe_video_codec *decoder,
952 struct pipe_video_buffer *target,
953 struct pipe_picture_desc *picture)
954 {
955 struct ruvd_decoder *dec = (struct ruvd_decoder*)decoder;
956 uintptr_t frame;
957
958 assert(decoder);
959
960 frame = ++dec->frame_number;
961 vl_video_buffer_set_associated_data(target, decoder, (void *)frame,
962 &ruvd_destroy_associated_data);
963
964 dec->bs_size = 0;
965 dec->bs_ptr = dec->ws->buffer_map(
966 dec->bs_buffers[dec->cur_buffer].res->buf,
967 dec->cs, PIPE_TRANSFER_WRITE);
968 }
969
970 /**
971 * decode a macroblock
972 */
973 static void ruvd_decode_macroblock(struct pipe_video_codec *decoder,
974 struct pipe_video_buffer *target,
975 struct pipe_picture_desc *picture,
976 const struct pipe_macroblock *macroblocks,
977 unsigned num_macroblocks)
978 {
979 /* not supported (yet) */
980 assert(0);
981 }
982
983 /**
984 * decode a bitstream
985 */
986 static void ruvd_decode_bitstream(struct pipe_video_codec *decoder,
987 struct pipe_video_buffer *target,
988 struct pipe_picture_desc *picture,
989 unsigned num_buffers,
990 const void * const *buffers,
991 const unsigned *sizes)
992 {
993 struct ruvd_decoder *dec = (struct ruvd_decoder*)decoder;
994 unsigned i;
995
996 assert(decoder);
997
998 if (!dec->bs_ptr)
999 return;
1000
1001 for (i = 0; i < num_buffers; ++i) {
1002 struct rvid_buffer *buf = &dec->bs_buffers[dec->cur_buffer];
1003 unsigned new_size = dec->bs_size + sizes[i];
1004
1005 if (new_size > buf->res->buf->size) {
1006 dec->ws->buffer_unmap(buf->res->buf);
1007 if (!rvid_resize_buffer(dec->screen, dec->cs, buf, new_size)) {
1008 RVID_ERR("Can't resize bitstream buffer!");
1009 return;
1010 }
1011
1012 dec->bs_ptr = dec->ws->buffer_map(buf->res->buf, dec->cs,
1013 PIPE_TRANSFER_WRITE);
1014 if (!dec->bs_ptr)
1015 return;
1016
1017 dec->bs_ptr += dec->bs_size;
1018 }
1019
1020 memcpy(dec->bs_ptr, buffers[i], sizes[i]);
1021 dec->bs_size += sizes[i];
1022 dec->bs_ptr += sizes[i];
1023 }
1024 }
1025
1026 /**
1027 * end decoding of the current frame
1028 */
1029 static void ruvd_end_frame(struct pipe_video_codec *decoder,
1030 struct pipe_video_buffer *target,
1031 struct pipe_picture_desc *picture)
1032 {
1033 struct ruvd_decoder *dec = (struct ruvd_decoder*)decoder;
1034 struct pb_buffer *dt;
1035 struct rvid_buffer *msg_fb_it_buf, *bs_buf;
1036 unsigned bs_size;
1037
1038 assert(decoder);
1039
1040 if (!dec->bs_ptr)
1041 return;
1042
1043 msg_fb_it_buf = &dec->msg_fb_it_buffers[dec->cur_buffer];
1044 bs_buf = &dec->bs_buffers[dec->cur_buffer];
1045
1046 bs_size = align(dec->bs_size, 128);
1047 memset(dec->bs_ptr, 0, bs_size - dec->bs_size);
1048 dec->ws->buffer_unmap(bs_buf->res->buf);
1049
1050 map_msg_fb_it_buf(dec);
1051 dec->msg->size = sizeof(*dec->msg);
1052 dec->msg->msg_type = RUVD_MSG_DECODE;
1053 dec->msg->stream_handle = dec->stream_handle;
1054 dec->msg->status_report_feedback_number = dec->frame_number;
1055
1056 dec->msg->body.decode.stream_type = dec->stream_type;
1057 dec->msg->body.decode.decode_flags = 0x1;
1058 dec->msg->body.decode.width_in_samples = dec->base.width;
1059 dec->msg->body.decode.height_in_samples = dec->base.height;
1060
1061 if ((picture->profile == PIPE_VIDEO_PROFILE_VC1_SIMPLE) ||
1062 (picture->profile == PIPE_VIDEO_PROFILE_VC1_MAIN)) {
1063 dec->msg->body.decode.width_in_samples = align(dec->msg->body.decode.width_in_samples, 16) / 16;
1064 dec->msg->body.decode.height_in_samples = align(dec->msg->body.decode.height_in_samples, 16) / 16;
1065 }
1066
1067 dec->msg->body.decode.dpb_size = dec->dpb.res->buf->size;
1068 dec->msg->body.decode.bsd_size = bs_size;
1069 dec->msg->body.decode.db_pitch = align(dec->base.width, 16);
1070
1071 if (dec->stream_type == RUVD_CODEC_H264_PERF &&
1072 ((struct r600_common_screen*)dec->screen)->family >= CHIP_POLARIS10)
1073 dec->msg->body.decode.dpb_reserved = dec->ctx.res->buf->size;
1074
1075 dt = dec->set_dtb(dec->msg, (struct vl_video_buffer *)target);
1076 if (((struct r600_common_screen*)dec->screen)->family >= CHIP_STONEY)
1077 dec->msg->body.decode.dt_wa_chroma_top_offset = dec->msg->body.decode.dt_pitch / 2;
1078
1079 switch (u_reduce_video_profile(picture->profile)) {
1080 case PIPE_VIDEO_FORMAT_MPEG4_AVC:
1081 dec->msg->body.decode.codec.h264 = get_h264_msg(dec, (struct pipe_h264_picture_desc*)picture);
1082 break;
1083
1084 case PIPE_VIDEO_FORMAT_HEVC:
1085 dec->msg->body.decode.codec.h265 = get_h265_msg(dec, target, (struct pipe_h265_picture_desc*)picture);
1086 if (dec->ctx.res == NULL) {
1087 unsigned ctx_size;
1088 if (dec->base.profile == PIPE_VIDEO_PROFILE_HEVC_MAIN_10)
1089 ctx_size = calc_ctx_size_h265_main10(dec, (struct pipe_h265_picture_desc*)picture);
1090 else
1091 ctx_size = calc_ctx_size_h265_main(dec);
1092 if (!rvid_create_buffer(dec->screen, &dec->ctx, ctx_size, PIPE_USAGE_DEFAULT)) {
1093 RVID_ERR("Can't allocated context buffer.\n");
1094 }
1095 rvid_clear_buffer(decoder->context, &dec->ctx);
1096 }
1097
1098 if (dec->ctx.res)
1099 dec->msg->body.decode.dpb_reserved = dec->ctx.res->buf->size;
1100 break;
1101
1102 case PIPE_VIDEO_FORMAT_VC1:
1103 dec->msg->body.decode.codec.vc1 = get_vc1_msg((struct pipe_vc1_picture_desc*)picture);
1104 break;
1105
1106 case PIPE_VIDEO_FORMAT_MPEG12:
1107 dec->msg->body.decode.codec.mpeg2 = get_mpeg2_msg(dec, (struct pipe_mpeg12_picture_desc*)picture);
1108 break;
1109
1110 case PIPE_VIDEO_FORMAT_MPEG4:
1111 dec->msg->body.decode.codec.mpeg4 = get_mpeg4_msg(dec, (struct pipe_mpeg4_picture_desc*)picture);
1112 break;
1113
1114 default:
1115 assert(0);
1116 return;
1117 }
1118
1119 dec->msg->body.decode.db_surf_tile_config = dec->msg->body.decode.dt_surf_tile_config;
1120 dec->msg->body.decode.extension_support = 0x1;
1121
1122 /* set at least the feedback buffer size */
1123 dec->fb[0] = dec->fb_size;
1124
1125 send_msg_buf(dec);
1126
1127 send_cmd(dec, RUVD_CMD_DPB_BUFFER, dec->dpb.res->buf, 0,
1128 RADEON_USAGE_READWRITE, RADEON_DOMAIN_VRAM);
1129 if ((u_reduce_video_profile(picture->profile) == PIPE_VIDEO_FORMAT_HEVC) ||
1130 (dec->stream_type == RUVD_CODEC_H264_PERF &&
1131 ((struct r600_common_screen*)dec->screen)->family >= CHIP_POLARIS10)) {
1132 send_cmd(dec, RUVD_CMD_CONTEXT_BUFFER, dec->ctx.res->buf, 0,
1133 RADEON_USAGE_READWRITE, RADEON_DOMAIN_VRAM);
1134 }
1135 send_cmd(dec, RUVD_CMD_BITSTREAM_BUFFER, bs_buf->res->buf,
1136 0, RADEON_USAGE_READ, RADEON_DOMAIN_GTT);
1137 send_cmd(dec, RUVD_CMD_DECODING_TARGET_BUFFER, dt, 0,
1138 RADEON_USAGE_WRITE, RADEON_DOMAIN_VRAM);
1139 send_cmd(dec, RUVD_CMD_FEEDBACK_BUFFER, msg_fb_it_buf->res->buf,
1140 FB_BUFFER_OFFSET, RADEON_USAGE_WRITE, RADEON_DOMAIN_GTT);
1141 if (have_it(dec))
1142 send_cmd(dec, RUVD_CMD_ITSCALING_TABLE_BUFFER, msg_fb_it_buf->res->buf,
1143 FB_BUFFER_OFFSET + dec->fb_size, RADEON_USAGE_READ, RADEON_DOMAIN_GTT);
1144 set_reg(dec, RUVD_ENGINE_CNTL, 1);
1145
1146 flush(dec);
1147 next_buffer(dec);
1148 }
1149
1150 /**
1151 * flush any outstanding command buffers to the hardware
1152 */
1153 static void ruvd_flush(struct pipe_video_codec *decoder)
1154 {
1155 }
1156
1157 /**
1158 * create and UVD decoder
1159 */
1160 struct pipe_video_codec *ruvd_create_decoder(struct pipe_context *context,
1161 const struct pipe_video_codec *templ,
1162 ruvd_set_dtb set_dtb)
1163 {
1164 struct radeon_winsys* ws = ((struct r600_common_context *)context)->ws;
1165 struct r600_common_context *rctx = (struct r600_common_context*)context;
1166 unsigned dpb_size;
1167 unsigned width = templ->width, height = templ->height;
1168 unsigned bs_buf_size;
1169 struct radeon_info info;
1170 struct ruvd_decoder *dec;
1171 int i;
1172
1173 ws->query_info(ws, &info);
1174
1175 switch(u_reduce_video_profile(templ->profile)) {
1176 case PIPE_VIDEO_FORMAT_MPEG12:
1177 if (templ->entrypoint > PIPE_VIDEO_ENTRYPOINT_BITSTREAM || info.family < CHIP_PALM)
1178 return vl_create_mpeg12_decoder(context, templ);
1179
1180 /* fall through */
1181 case PIPE_VIDEO_FORMAT_MPEG4:
1182 width = align(width, VL_MACROBLOCK_WIDTH);
1183 height = align(height, VL_MACROBLOCK_HEIGHT);
1184 break;
1185 case PIPE_VIDEO_FORMAT_MPEG4_AVC:
1186 width = align(width, VL_MACROBLOCK_WIDTH);
1187 height = align(height, VL_MACROBLOCK_HEIGHT);
1188 break;
1189
1190 default:
1191 break;
1192 }
1193
1194
1195 dec = CALLOC_STRUCT(ruvd_decoder);
1196
1197 if (!dec)
1198 return NULL;
1199
1200 if (info.drm_major < 3)
1201 dec->use_legacy = true;
1202
1203 dec->base = *templ;
1204 dec->base.context = context;
1205 dec->base.width = width;
1206 dec->base.height = height;
1207
1208 dec->base.destroy = ruvd_destroy;
1209 dec->base.begin_frame = ruvd_begin_frame;
1210 dec->base.decode_macroblock = ruvd_decode_macroblock;
1211 dec->base.decode_bitstream = ruvd_decode_bitstream;
1212 dec->base.end_frame = ruvd_end_frame;
1213 dec->base.flush = ruvd_flush;
1214
1215 dec->stream_type = profile2stream_type(dec, info.family);
1216 dec->set_dtb = set_dtb;
1217 dec->stream_handle = rvid_alloc_stream_handle();
1218 dec->screen = context->screen;
1219 dec->ws = ws;
1220 dec->cs = ws->cs_create(rctx->ctx, RING_UVD, NULL, NULL);
1221 if (!dec->cs) {
1222 RVID_ERR("Can't get command submission context.\n");
1223 goto error;
1224 }
1225
1226 dec->fb_size = (info.family == CHIP_TONGA) ? FB_BUFFER_SIZE_TONGA :
1227 FB_BUFFER_SIZE;
1228 bs_buf_size = width * height * (512 / (16 * 16));
1229 for (i = 0; i < NUM_BUFFERS; ++i) {
1230 unsigned msg_fb_it_size = FB_BUFFER_OFFSET + dec->fb_size;
1231 STATIC_ASSERT(sizeof(struct ruvd_msg) <= FB_BUFFER_OFFSET);
1232 if (have_it(dec))
1233 msg_fb_it_size += IT_SCALING_TABLE_SIZE;
1234 if (!rvid_create_buffer(dec->screen, &dec->msg_fb_it_buffers[i],
1235 msg_fb_it_size, PIPE_USAGE_STAGING)) {
1236 RVID_ERR("Can't allocated message buffers.\n");
1237 goto error;
1238 }
1239
1240 if (!rvid_create_buffer(dec->screen, &dec->bs_buffers[i],
1241 bs_buf_size, PIPE_USAGE_STAGING)) {
1242 RVID_ERR("Can't allocated bitstream buffers.\n");
1243 goto error;
1244 }
1245
1246 rvid_clear_buffer(context, &dec->msg_fb_it_buffers[i]);
1247 rvid_clear_buffer(context, &dec->bs_buffers[i]);
1248 }
1249
1250 dpb_size = calc_dpb_size(dec);
1251
1252 if (!rvid_create_buffer(dec->screen, &dec->dpb, dpb_size, PIPE_USAGE_DEFAULT)) {
1253 RVID_ERR("Can't allocated dpb.\n");
1254 goto error;
1255 }
1256
1257 rvid_clear_buffer(context, &dec->dpb);
1258
1259 if (dec->stream_type == RUVD_CODEC_H264_PERF && info.family >= CHIP_POLARIS10) {
1260 unsigned ctx_size = calc_ctx_size_h264_perf(dec);
1261 if (!rvid_create_buffer(dec->screen, &dec->ctx, ctx_size, PIPE_USAGE_DEFAULT)) {
1262 RVID_ERR("Can't allocated context buffer.\n");
1263 goto error;
1264 }
1265 rvid_clear_buffer(context, &dec->ctx);
1266 }
1267
1268 map_msg_fb_it_buf(dec);
1269 dec->msg->size = sizeof(*dec->msg);
1270 dec->msg->msg_type = RUVD_MSG_CREATE;
1271 dec->msg->stream_handle = dec->stream_handle;
1272 dec->msg->body.create.stream_type = dec->stream_type;
1273 dec->msg->body.create.width_in_samples = dec->base.width;
1274 dec->msg->body.create.height_in_samples = dec->base.height;
1275 dec->msg->body.create.dpb_size = dpb_size;
1276 send_msg_buf(dec);
1277 flush(dec);
1278 next_buffer(dec);
1279
1280 return &dec->base;
1281
1282 error:
1283 if (dec->cs) dec->ws->cs_destroy(dec->cs);
1284
1285 for (i = 0; i < NUM_BUFFERS; ++i) {
1286 rvid_destroy_buffer(&dec->msg_fb_it_buffers[i]);
1287 rvid_destroy_buffer(&dec->bs_buffers[i]);
1288 }
1289
1290 rvid_destroy_buffer(&dec->dpb);
1291 if (dec->stream_type == RUVD_CODEC_H264_PERF && info.family >= CHIP_POLARIS10)
1292 rvid_destroy_buffer(&dec->ctx);
1293
1294 FREE(dec);
1295
1296 return NULL;
1297 }
1298
1299 /* calculate top/bottom offset */
1300 static unsigned texture_offset(struct radeon_surf *surface, unsigned layer)
1301 {
1302 return surface->level[0].offset +
1303 layer * surface->level[0].slice_size;
1304 }
1305
1306 /* hw encode the aspect of macro tiles */
1307 static unsigned macro_tile_aspect(unsigned macro_tile_aspect)
1308 {
1309 switch (macro_tile_aspect) {
1310 default:
1311 case 1: macro_tile_aspect = 0; break;
1312 case 2: macro_tile_aspect = 1; break;
1313 case 4: macro_tile_aspect = 2; break;
1314 case 8: macro_tile_aspect = 3; break;
1315 }
1316 return macro_tile_aspect;
1317 }
1318
1319 /* hw encode the bank width and height */
1320 static unsigned bank_wh(unsigned bankwh)
1321 {
1322 switch (bankwh) {
1323 default:
1324 case 1: bankwh = 0; break;
1325 case 2: bankwh = 1; break;
1326 case 4: bankwh = 2; break;
1327 case 8: bankwh = 3; break;
1328 }
1329 return bankwh;
1330 }
1331
1332 /**
1333 * fill decoding target field from the luma and chroma surfaces
1334 */
1335 void ruvd_set_dt_surfaces(struct ruvd_msg *msg, struct radeon_surf *luma,
1336 struct radeon_surf *chroma)
1337 {
1338 msg->body.decode.dt_pitch = luma->level[0].pitch_bytes;
1339 switch (luma->level[0].mode) {
1340 case RADEON_SURF_MODE_LINEAR_ALIGNED:
1341 msg->body.decode.dt_tiling_mode = RUVD_TILE_LINEAR;
1342 msg->body.decode.dt_array_mode = RUVD_ARRAY_MODE_LINEAR;
1343 break;
1344 case RADEON_SURF_MODE_1D:
1345 msg->body.decode.dt_tiling_mode = RUVD_TILE_8X8;
1346 msg->body.decode.dt_array_mode = RUVD_ARRAY_MODE_1D_THIN;
1347 break;
1348 case RADEON_SURF_MODE_2D:
1349 msg->body.decode.dt_tiling_mode = RUVD_TILE_8X8;
1350 msg->body.decode.dt_array_mode = RUVD_ARRAY_MODE_2D_THIN;
1351 break;
1352 default:
1353 assert(0);
1354 break;
1355 }
1356
1357 msg->body.decode.dt_luma_top_offset = texture_offset(luma, 0);
1358 msg->body.decode.dt_chroma_top_offset = texture_offset(chroma, 0);
1359 if (msg->body.decode.dt_field_mode) {
1360 msg->body.decode.dt_luma_bottom_offset = texture_offset(luma, 1);
1361 msg->body.decode.dt_chroma_bottom_offset = texture_offset(chroma, 1);
1362 } else {
1363 msg->body.decode.dt_luma_bottom_offset = msg->body.decode.dt_luma_top_offset;
1364 msg->body.decode.dt_chroma_bottom_offset = msg->body.decode.dt_chroma_top_offset;
1365 }
1366
1367 assert(luma->bankw == chroma->bankw);
1368 assert(luma->bankh == chroma->bankh);
1369 assert(luma->mtilea == chroma->mtilea);
1370
1371 msg->body.decode.dt_surf_tile_config |= RUVD_BANK_WIDTH(bank_wh(luma->bankw));
1372 msg->body.decode.dt_surf_tile_config |= RUVD_BANK_HEIGHT(bank_wh(luma->bankh));
1373 msg->body.decode.dt_surf_tile_config |= RUVD_MACRO_TILE_ASPECT_RATIO(macro_tile_aspect(luma->mtilea));
1374 }