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[mesa.git] / src / gallium / drivers / radeon / radeon_uvd.c
1 /**************************************************************************
2 *
3 * Copyright 2011 Advanced Micro Devices, Inc.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28 /*
29 * Authors:
30 * Christian König <christian.koenig@amd.com>
31 *
32 */
33
34 #include <sys/types.h>
35 #include <assert.h>
36 #include <errno.h>
37 #include <unistd.h>
38 #include <stdio.h>
39
40 #include "pipe/p_video_codec.h"
41
42 #include "util/u_memory.h"
43 #include "util/u_video.h"
44
45 #include "vl/vl_defines.h"
46 #include "vl/vl_mpeg12_decoder.h"
47
48 #include "../../winsys/radeon/drm/radeon_winsys.h"
49 #include "r600_pipe_common.h"
50 #include "radeon_uvd.h"
51
52 #define RUVD_ERR(fmt, args...) \
53 fprintf(stderr, "EE %s:%d %s UVD - "fmt, __FILE__, __LINE__, __func__, ##args)
54
55 #define NUM_BUFFERS 4
56
57 #define NUM_MPEG2_REFS 6
58 #define NUM_H264_REFS 17
59 #define NUM_VC1_REFS 5
60
61 /* UVD buffer representation */
62 struct ruvd_buffer
63 {
64 struct pb_buffer* buf;
65 struct radeon_winsys_cs_handle* cs_handle;
66 };
67
68 /* UVD decoder representation */
69 struct ruvd_decoder {
70 struct pipe_video_codec base;
71
72 ruvd_set_dtb set_dtb;
73
74 unsigned stream_handle;
75 unsigned frame_number;
76
77 struct radeon_winsys* ws;
78 struct radeon_winsys_cs* cs;
79
80 unsigned cur_buffer;
81
82 struct ruvd_buffer msg_fb_buffers[NUM_BUFFERS];
83 struct ruvd_msg *msg;
84
85 struct ruvd_buffer bs_buffers[NUM_BUFFERS];
86 void* bs_ptr;
87 unsigned bs_size;
88
89 struct ruvd_buffer dpb;
90 };
91
92 /* generate an UVD stream handle */
93 static unsigned alloc_stream_handle()
94 {
95 static unsigned counter = 0;
96 unsigned stream_handle = 0;
97 unsigned pid = getpid();
98 int i;
99
100 for (i = 0; i < 32; ++i)
101 stream_handle |= ((pid >> i) & 1) << (31 - i);
102
103 stream_handle ^= ++counter;
104 return stream_handle;
105 }
106
107 /* flush IB to the hardware */
108 static void flush(struct ruvd_decoder *dec)
109 {
110 dec->ws->cs_flush(dec->cs, RADEON_FLUSH_ASYNC, 0);
111 }
112
113 /* add a new set register command to the IB */
114 static void set_reg(struct ruvd_decoder *dec, unsigned reg, uint32_t val)
115 {
116 uint32_t *pm4 = dec->cs->buf;
117 pm4[dec->cs->cdw++] = RUVD_PKT0(reg >> 2, 0);
118 pm4[dec->cs->cdw++] = val;
119 }
120
121 /* send a command to the VCPU through the GPCOM registers */
122 static void send_cmd(struct ruvd_decoder *dec, unsigned cmd,
123 struct radeon_winsys_cs_handle* cs_buf, uint32_t off,
124 enum radeon_bo_usage usage, enum radeon_bo_domain domain)
125 {
126 int reloc_idx;
127
128 reloc_idx = dec->ws->cs_add_reloc(dec->cs, cs_buf, usage, domain);
129 set_reg(dec, RUVD_GPCOM_VCPU_DATA0, off);
130 set_reg(dec, RUVD_GPCOM_VCPU_DATA1, reloc_idx * 4);
131 set_reg(dec, RUVD_GPCOM_VCPU_CMD, cmd << 1);
132 }
133
134 /* map the next available message buffer */
135 static void map_msg_buf(struct ruvd_decoder *dec)
136 {
137 struct ruvd_buffer* buf;
138
139 /* grap the current message buffer */
140 buf = &dec->msg_fb_buffers[dec->cur_buffer];
141
142 /* copy the message into it */
143 dec->msg = dec->ws->buffer_map(buf->cs_handle, dec->cs, PIPE_TRANSFER_WRITE);
144 }
145
146 /* unmap and send a message command to the VCPU */
147 static void send_msg_buf(struct ruvd_decoder *dec)
148 {
149 struct ruvd_buffer* buf;
150
151 /* ignore the request if message buffer isn't mapped */
152 if (!dec->msg)
153 return;
154
155 /* grap the current message buffer */
156 buf = &dec->msg_fb_buffers[dec->cur_buffer];
157
158 /* unmap the buffer */
159 dec->ws->buffer_unmap(buf->cs_handle);
160
161 /* and send it to the hardware */
162 send_cmd(dec, RUVD_CMD_MSG_BUFFER, buf->cs_handle, 0,
163 RADEON_USAGE_READ, RADEON_DOMAIN_GTT);
164 }
165
166 /* create a buffer in the winsys */
167 static bool create_buffer(struct ruvd_decoder *dec,
168 struct ruvd_buffer *buffer,
169 unsigned size)
170 {
171 buffer->buf = dec->ws->buffer_create(dec->ws, size, 4096, false,
172 RADEON_DOMAIN_GTT | RADEON_DOMAIN_VRAM);
173 if (!buffer->buf)
174 return false;
175
176 buffer->cs_handle = dec->ws->buffer_get_cs_handle(buffer->buf);
177 if (!buffer->cs_handle)
178 return false;
179
180 return true;
181 }
182
183 /* destroy a buffer */
184 static void destroy_buffer(struct ruvd_buffer *buffer)
185 {
186 pb_reference(&buffer->buf, NULL);
187 buffer->cs_handle = NULL;
188 }
189
190 /* reallocate a buffer, preserving its content */
191 static bool resize_buffer(struct ruvd_decoder *dec,
192 struct ruvd_buffer *new_buf,
193 unsigned new_size)
194 {
195 unsigned bytes = MIN2(new_buf->buf->size, new_size);
196 struct ruvd_buffer old_buf = *new_buf;
197 void *src = NULL, *dst = NULL;
198
199 if (!create_buffer(dec, new_buf, new_size))
200 goto error;
201
202 src = dec->ws->buffer_map(old_buf.cs_handle, dec->cs, PIPE_TRANSFER_READ);
203 if (!src)
204 goto error;
205
206 dst = dec->ws->buffer_map(new_buf->cs_handle, dec->cs, PIPE_TRANSFER_WRITE);
207 if (!dst)
208 goto error;
209
210 memcpy(dst, src, bytes);
211 if (new_size > bytes) {
212 new_size -= bytes;
213 dst += bytes;
214 memset(dst, 0, new_size);
215 }
216 dec->ws->buffer_unmap(new_buf->cs_handle);
217 dec->ws->buffer_unmap(old_buf.cs_handle);
218 destroy_buffer(&old_buf);
219 return true;
220
221 error:
222 if (src) dec->ws->buffer_unmap(old_buf.cs_handle);
223 destroy_buffer(new_buf);
224 *new_buf = old_buf;
225 return false;
226 }
227
228 /* clear the buffer with zeros */
229 static void clear_buffer(struct ruvd_decoder *dec,
230 struct ruvd_buffer* buffer)
231 {
232 //TODO: let the GPU do the job
233 void *ptr = dec->ws->buffer_map(buffer->cs_handle, dec->cs,
234 PIPE_TRANSFER_WRITE);
235 if (!ptr)
236 return;
237
238 memset(ptr, 0, buffer->buf->size);
239 dec->ws->buffer_unmap(buffer->cs_handle);
240 }
241
242 /* cycle to the next set of buffers */
243 static void next_buffer(struct ruvd_decoder *dec)
244 {
245 ++dec->cur_buffer;
246 dec->cur_buffer %= NUM_BUFFERS;
247 }
248
249 /* convert the profile into something UVD understands */
250 static uint32_t profile2stream_type(enum pipe_video_profile profile)
251 {
252 switch (u_reduce_video_profile(profile)) {
253 case PIPE_VIDEO_FORMAT_MPEG4_AVC:
254 return RUVD_CODEC_H264;
255
256 case PIPE_VIDEO_FORMAT_VC1:
257 return RUVD_CODEC_VC1;
258
259 case PIPE_VIDEO_FORMAT_MPEG12:
260 return RUVD_CODEC_MPEG2;
261
262 case PIPE_VIDEO_FORMAT_MPEG4:
263 return RUVD_CODEC_MPEG4;
264
265 default:
266 assert(0);
267 return 0;
268 }
269 }
270
271 /* calculate size of reference picture buffer */
272 static unsigned calc_dpb_size(const struct pipe_video_codec *templ)
273 {
274 unsigned width_in_mb, height_in_mb, image_size, dpb_size;
275
276 // always align them to MB size for dpb calculation
277 unsigned width = align(templ->width, VL_MACROBLOCK_WIDTH);
278 unsigned height = align(templ->height, VL_MACROBLOCK_HEIGHT);
279
280 // always one more for currently decoded picture
281 unsigned max_references = templ->max_references + 1;
282
283 // aligned size of a single frame
284 image_size = width * height;
285 image_size += image_size / 2;
286 image_size = align(image_size, 1024);
287
288 // picture width & height in 16 pixel units
289 width_in_mb = width / VL_MACROBLOCK_WIDTH;
290 height_in_mb = align(height / VL_MACROBLOCK_HEIGHT, 2);
291
292 switch (u_reduce_video_profile(templ->profile)) {
293 case PIPE_VIDEO_FORMAT_MPEG4_AVC:
294 // the firmware seems to allways assume a minimum of ref frames
295 max_references = MAX2(NUM_H264_REFS, max_references);
296
297 // reference picture buffer
298 dpb_size = image_size * max_references;
299
300 // macroblock context buffer
301 dpb_size += width_in_mb * height_in_mb * max_references * 192;
302
303 // IT surface buffer
304 dpb_size += width_in_mb * height_in_mb * 32;
305 break;
306
307 case PIPE_VIDEO_FORMAT_VC1:
308 // the firmware seems to allways assume a minimum of ref frames
309 max_references = MAX2(NUM_VC1_REFS, max_references);
310
311 // reference picture buffer
312 dpb_size = image_size * max_references;
313
314 // CONTEXT_BUFFER
315 dpb_size += width_in_mb * height_in_mb * 128;
316
317 // IT surface buffer
318 dpb_size += width_in_mb * 64;
319
320 // DB surface buffer
321 dpb_size += width_in_mb * 128;
322
323 // BP
324 dpb_size += align(MAX2(width_in_mb, height_in_mb) * 7 * 16, 64);
325 break;
326
327 case PIPE_VIDEO_FORMAT_MPEG12:
328 // reference picture buffer, must be big enough for all frames
329 dpb_size = image_size * NUM_MPEG2_REFS;
330 break;
331
332 case PIPE_VIDEO_FORMAT_MPEG4:
333 // reference picture buffer
334 dpb_size = image_size * max_references;
335
336 // CM
337 dpb_size += width_in_mb * height_in_mb * 64;
338
339 // IT surface buffer
340 dpb_size += align(width_in_mb * height_in_mb * 32, 64);
341 break;
342
343 default:
344 // something is missing here
345 assert(0);
346
347 // at least use a sane default value
348 dpb_size = 32 * 1024 * 1024;
349 break;
350 }
351 return dpb_size;
352 }
353
354 /* get h264 specific message bits */
355 static struct ruvd_h264 get_h264_msg(struct ruvd_decoder *dec, struct pipe_h264_picture_desc *pic)
356 {
357 struct ruvd_h264 result;
358
359 memset(&result, 0, sizeof(result));
360 switch (pic->base.profile) {
361 case PIPE_VIDEO_PROFILE_MPEG4_AVC_BASELINE:
362 result.profile = RUVD_H264_PROFILE_BASELINE;
363 break;
364
365 case PIPE_VIDEO_PROFILE_MPEG4_AVC_MAIN:
366 result.profile = RUVD_H264_PROFILE_MAIN;
367 break;
368
369 case PIPE_VIDEO_PROFILE_MPEG4_AVC_HIGH:
370 result.profile = RUVD_H264_PROFILE_HIGH;
371 break;
372
373 default:
374 assert(0);
375 break;
376 }
377 if (((dec->base.width * dec->base.height) >> 8) <= 1620)
378 result.level = 30;
379 else
380 result.level = 41;
381
382 result.sps_info_flags = 0;
383 result.sps_info_flags |= pic->direct_8x8_inference_flag << 0;
384 result.sps_info_flags |= pic->mb_adaptive_frame_field_flag << 1;
385 result.sps_info_flags |= pic->frame_mbs_only_flag << 2;
386 result.sps_info_flags |= pic->delta_pic_order_always_zero_flag << 3;
387
388 switch (dec->base.chroma_format) {
389 case PIPE_VIDEO_CHROMA_FORMAT_400:
390 result.chroma_format = 0;
391 break;
392 case PIPE_VIDEO_CHROMA_FORMAT_420:
393 result.chroma_format = 1;
394 break;
395 case PIPE_VIDEO_CHROMA_FORMAT_422:
396 result.chroma_format = 2;
397 break;
398 case PIPE_VIDEO_CHROMA_FORMAT_444:
399 result.chroma_format = 3;
400 break;
401 }
402
403 result.pps_info_flags = 0;
404 result.pps_info_flags |= pic->transform_8x8_mode_flag << 0;
405 result.pps_info_flags |= pic->redundant_pic_cnt_present_flag << 1;
406 result.pps_info_flags |= pic->constrained_intra_pred_flag << 2;
407 result.pps_info_flags |= pic->deblocking_filter_control_present_flag << 3;
408 result.pps_info_flags |= pic->weighted_bipred_idc << 4;
409 result.pps_info_flags |= pic->weighted_pred_flag << 6;
410 result.pps_info_flags |= pic->pic_order_present_flag << 7;
411 result.pps_info_flags |= pic->entropy_coding_mode_flag << 8;
412
413 result.bit_depth_luma_minus8 = 0;
414 result.bit_depth_chroma_minus8 = 0;
415
416 result.log2_max_frame_num_minus4 = pic->log2_max_frame_num_minus4;
417 result.pic_order_cnt_type = pic->pic_order_cnt_type;
418 result.log2_max_pic_order_cnt_lsb_minus4 = pic->log2_max_pic_order_cnt_lsb_minus4;
419 result.num_ref_frames = pic->num_ref_frames;
420 result.pic_init_qp_minus26 = pic->pic_init_qp_minus26;
421 result.chroma_qp_index_offset = pic->chroma_qp_index_offset;
422 result.second_chroma_qp_index_offset = pic->second_chroma_qp_index_offset;
423
424 result.num_slice_groups_minus1 = 0;
425 result.slice_group_map_type = 0;
426
427 result.num_ref_idx_l0_active_minus1 = pic->num_ref_idx_l0_active_minus1;
428 result.num_ref_idx_l1_active_minus1 = pic->num_ref_idx_l1_active_minus1;
429
430 result.slice_group_change_rate_minus1 = 0;
431
432 memcpy(result.scaling_list_4x4, pic->scaling_lists_4x4, 6*64);
433 memcpy(result.scaling_list_8x8, pic->scaling_lists_8x8, 2*64);
434
435 result.frame_num = pic->frame_num;
436 memcpy(result.frame_num_list, pic->frame_num_list, 4*16);
437 result.curr_field_order_cnt_list[0] = pic->field_order_cnt[0];
438 result.curr_field_order_cnt_list[1] = pic->field_order_cnt[1];
439 memcpy(result.field_order_cnt_list, pic->field_order_cnt_list, 4*16*2);
440
441 result.decoded_pic_idx = pic->frame_num;
442
443 return result;
444 }
445
446 /* get vc1 specific message bits */
447 static struct ruvd_vc1 get_vc1_msg(struct pipe_vc1_picture_desc *pic)
448 {
449 struct ruvd_vc1 result;
450
451 memset(&result, 0, sizeof(result));
452
453 switch(pic->base.profile) {
454 case PIPE_VIDEO_PROFILE_VC1_SIMPLE:
455 result.profile = RUVD_VC1_PROFILE_SIMPLE;
456 result.level = 1;
457 break;
458
459 case PIPE_VIDEO_PROFILE_VC1_MAIN:
460 result.profile = RUVD_VC1_PROFILE_MAIN;
461 result.level = 2;
462 break;
463
464 case PIPE_VIDEO_PROFILE_VC1_ADVANCED:
465 result.profile = RUVD_VC1_PROFILE_ADVANCED;
466 result.level = 4;
467 break;
468
469 default:
470 assert(0);
471 }
472
473 /* fields common for all profiles */
474 result.sps_info_flags |= pic->postprocflag << 7;
475 result.sps_info_flags |= pic->pulldown << 6;
476 result.sps_info_flags |= pic->interlace << 5;
477 result.sps_info_flags |= pic->tfcntrflag << 4;
478 result.sps_info_flags |= pic->finterpflag << 3;
479 result.sps_info_flags |= pic->psf << 1;
480
481 result.pps_info_flags |= pic->range_mapy_flag << 31;
482 result.pps_info_flags |= pic->range_mapy << 28;
483 result.pps_info_flags |= pic->range_mapuv_flag << 27;
484 result.pps_info_flags |= pic->range_mapuv << 24;
485 result.pps_info_flags |= pic->multires << 21;
486 result.pps_info_flags |= pic->maxbframes << 16;
487 result.pps_info_flags |= pic->overlap << 11;
488 result.pps_info_flags |= pic->quantizer << 9;
489 result.pps_info_flags |= pic->panscan_flag << 7;
490 result.pps_info_flags |= pic->refdist_flag << 6;
491 result.pps_info_flags |= pic->vstransform << 0;
492
493 /* some fields only apply to main/advanced profile */
494 if (pic->base.profile != PIPE_VIDEO_PROFILE_VC1_SIMPLE) {
495 result.pps_info_flags |= pic->syncmarker << 20;
496 result.pps_info_flags |= pic->rangered << 19;
497 result.pps_info_flags |= pic->loopfilter << 5;
498 result.pps_info_flags |= pic->fastuvmc << 4;
499 result.pps_info_flags |= pic->extended_mv << 3;
500 result.pps_info_flags |= pic->extended_dmv << 8;
501 result.pps_info_flags |= pic->dquant << 1;
502 }
503
504 result.chroma_format = 1;
505
506 #if 0
507 //(((unsigned int)(pPicParams->advance.reserved1)) << SPS_INFO_VC1_RESERVED_SHIFT)
508 uint32_t slice_count
509 uint8_t picture_type
510 uint8_t frame_coding_mode
511 uint8_t deblockEnable
512 uint8_t pquant
513 #endif
514
515 return result;
516 }
517
518 /* extract the frame number from a referenced video buffer */
519 static uint32_t get_ref_pic_idx(struct ruvd_decoder *dec, struct pipe_video_buffer *ref)
520 {
521 uint32_t min = MAX2(dec->frame_number, NUM_MPEG2_REFS) - NUM_MPEG2_REFS;
522 uint32_t max = MAX2(dec->frame_number, 1) - 1;
523 uintptr_t frame;
524
525 /* seems to be the most sane fallback */
526 if (!ref)
527 return max;
528
529 /* get the frame number from the associated data */
530 frame = (uintptr_t)vl_video_buffer_get_associated_data(ref, &dec->base);
531
532 /* limit the frame number to a valid range */
533 return MAX2(MIN2(frame, max), min);
534 }
535
536 /* get mpeg2 specific msg bits */
537 static struct ruvd_mpeg2 get_mpeg2_msg(struct ruvd_decoder *dec,
538 struct pipe_mpeg12_picture_desc *pic)
539 {
540 const int *zscan = pic->alternate_scan ? vl_zscan_alternate : vl_zscan_normal;
541 struct ruvd_mpeg2 result;
542 unsigned i;
543
544 memset(&result, 0, sizeof(result));
545 result.decoded_pic_idx = dec->frame_number;
546 for (i = 0; i < 2; ++i)
547 result.ref_pic_idx[i] = get_ref_pic_idx(dec, pic->ref[i]);
548
549 result.load_intra_quantiser_matrix = 1;
550 result.load_nonintra_quantiser_matrix = 1;
551
552 for (i = 0; i < 64; ++i) {
553 result.intra_quantiser_matrix[i] = pic->intra_matrix[zscan[i]];
554 result.nonintra_quantiser_matrix[i] = pic->non_intra_matrix[zscan[i]];
555 }
556
557 result.profile_and_level_indication = 0;
558 result.chroma_format = 0x1;
559
560 result.picture_coding_type = pic->picture_coding_type;
561 result.f_code[0][0] = pic->f_code[0][0] + 1;
562 result.f_code[0][1] = pic->f_code[0][1] + 1;
563 result.f_code[1][0] = pic->f_code[1][0] + 1;
564 result.f_code[1][1] = pic->f_code[1][1] + 1;
565 result.intra_dc_precision = pic->intra_dc_precision;
566 result.pic_structure = pic->picture_structure;
567 result.top_field_first = pic->top_field_first;
568 result.frame_pred_frame_dct = pic->frame_pred_frame_dct;
569 result.concealment_motion_vectors = pic->concealment_motion_vectors;
570 result.q_scale_type = pic->q_scale_type;
571 result.intra_vlc_format = pic->intra_vlc_format;
572 result.alternate_scan = pic->alternate_scan;
573
574 return result;
575 }
576
577 /* get mpeg4 specific msg bits */
578 static struct ruvd_mpeg4 get_mpeg4_msg(struct ruvd_decoder *dec,
579 struct pipe_mpeg4_picture_desc *pic)
580 {
581 struct ruvd_mpeg4 result;
582 unsigned i;
583
584 memset(&result, 0, sizeof(result));
585 result.decoded_pic_idx = dec->frame_number;
586 for (i = 0; i < 2; ++i)
587 result.ref_pic_idx[i] = get_ref_pic_idx(dec, pic->ref[i]);
588
589 result.variant_type = 0;
590 result.profile_and_level_indication = 0xF0; // ASP Level0
591
592 result.video_object_layer_verid = 0x5; // advanced simple
593 result.video_object_layer_shape = 0x0; // rectangular
594
595 result.video_object_layer_width = dec->base.width;
596 result.video_object_layer_height = dec->base.height;
597
598 result.vop_time_increment_resolution = pic->vop_time_increment_resolution;
599
600 result.flags |= pic->short_video_header << 0;
601 //result.flags |= obmc_disable << 1;
602 result.flags |= pic->interlaced << 2;
603 result.flags |= 1 << 3; // load_intra_quant_mat
604 result.flags |= 1 << 4; // load_nonintra_quant_mat
605 result.flags |= pic->quarter_sample << 5;
606 result.flags |= 1 << 6; // complexity_estimation_disable
607 result.flags |= pic->resync_marker_disable << 7;
608 //result.flags |= data_partitioned << 8;
609 //result.flags |= reversible_vlc << 9;
610 result.flags |= 0 << 10; // newpred_enable
611 result.flags |= 0 << 11; // reduced_resolution_vop_enable
612 //result.flags |= scalability << 12;
613 //result.flags |= is_object_layer_identifier << 13;
614 //result.flags |= fixed_vop_rate << 14;
615 //result.flags |= newpred_segment_type << 15;
616
617 result.quant_type = pic->quant_type;
618
619 for (i = 0; i < 64; ++i) {
620 result.intra_quant_mat[i] = pic->intra_matrix[vl_zscan_normal[i]];
621 result.nonintra_quant_mat[i] = pic->non_intra_matrix[vl_zscan_normal[i]];
622 }
623
624 /*
625 int32_t trd [2]
626 int32_t trb [2]
627 uint8_t vop_coding_type
628 uint8_t vop_fcode_forward
629 uint8_t vop_fcode_backward
630 uint8_t rounding_control
631 uint8_t alternate_vertical_scan_flag
632 uint8_t top_field_first
633 */
634
635 return result;
636 }
637
638 /**
639 * destroy this video decoder
640 */
641 static void ruvd_destroy(struct pipe_video_codec *decoder)
642 {
643 struct ruvd_decoder *dec = (struct ruvd_decoder*)decoder;
644 unsigned i;
645
646 assert(decoder);
647
648 map_msg_buf(dec);
649 memset(dec->msg, 0, sizeof(*dec->msg));
650 dec->msg->size = sizeof(*dec->msg);
651 dec->msg->msg_type = RUVD_MSG_DESTROY;
652 dec->msg->stream_handle = dec->stream_handle;
653 send_msg_buf(dec);
654
655 flush(dec);
656
657 dec->ws->cs_destroy(dec->cs);
658
659 for (i = 0; i < NUM_BUFFERS; ++i) {
660 destroy_buffer(&dec->msg_fb_buffers[i]);
661 destroy_buffer(&dec->bs_buffers[i]);
662 }
663
664 destroy_buffer(&dec->dpb);
665
666 FREE(dec);
667 }
668
669 /* free associated data in the video buffer callback */
670 static void ruvd_destroy_associated_data(void *data)
671 {
672 /* NOOP, since we only use an intptr */
673 }
674
675 /**
676 * start decoding of a new frame
677 */
678 static void ruvd_begin_frame(struct pipe_video_codec *decoder,
679 struct pipe_video_buffer *target,
680 struct pipe_picture_desc *picture)
681 {
682 struct ruvd_decoder *dec = (struct ruvd_decoder*)decoder;
683 uintptr_t frame;
684
685 assert(decoder);
686
687 frame = ++dec->frame_number;
688 vl_video_buffer_set_associated_data(target, decoder, (void *)frame,
689 &ruvd_destroy_associated_data);
690
691 dec->bs_size = 0;
692 dec->bs_ptr = dec->ws->buffer_map(
693 dec->bs_buffers[dec->cur_buffer].cs_handle,
694 dec->cs, PIPE_TRANSFER_WRITE);
695 }
696
697 /**
698 * decode a macroblock
699 */
700 static void ruvd_decode_macroblock(struct pipe_video_codec *decoder,
701 struct pipe_video_buffer *target,
702 struct pipe_picture_desc *picture,
703 const struct pipe_macroblock *macroblocks,
704 unsigned num_macroblocks)
705 {
706 /* not supported (yet) */
707 assert(0);
708 }
709
710 /**
711 * decode a bitstream
712 */
713 static void ruvd_decode_bitstream(struct pipe_video_codec *decoder,
714 struct pipe_video_buffer *target,
715 struct pipe_picture_desc *picture,
716 unsigned num_buffers,
717 const void * const *buffers,
718 const unsigned *sizes)
719 {
720 struct ruvd_decoder *dec = (struct ruvd_decoder*)decoder;
721 unsigned i;
722
723 assert(decoder);
724
725 if (!dec->bs_ptr)
726 return;
727
728 for (i = 0; i < num_buffers; ++i) {
729 struct ruvd_buffer *buf = &dec->bs_buffers[dec->cur_buffer];
730 unsigned new_size = dec->bs_size + sizes[i];
731
732 if (new_size > buf->buf->size) {
733 dec->ws->buffer_unmap(buf->cs_handle);
734 if (!resize_buffer(dec, buf, new_size)) {
735 RUVD_ERR("Can't resize bitstream buffer!");
736 return;
737 }
738
739 dec->bs_ptr = dec->ws->buffer_map(buf->cs_handle, dec->cs,
740 PIPE_TRANSFER_WRITE);
741 if (!dec->bs_ptr)
742 return;
743
744 dec->bs_ptr += dec->bs_size;
745 }
746
747 memcpy(dec->bs_ptr, buffers[i], sizes[i]);
748 dec->bs_size += sizes[i];
749 dec->bs_ptr += sizes[i];
750 }
751 }
752
753 /**
754 * end decoding of the current frame
755 */
756 static void ruvd_end_frame(struct pipe_video_codec *decoder,
757 struct pipe_video_buffer *target,
758 struct pipe_picture_desc *picture)
759 {
760 struct ruvd_decoder *dec = (struct ruvd_decoder*)decoder;
761 struct radeon_winsys_cs_handle *dt;
762 struct ruvd_buffer *msg_fb_buf, *bs_buf;
763 unsigned bs_size;
764
765 assert(decoder);
766
767 if (!dec->bs_ptr)
768 return;
769
770 msg_fb_buf = &dec->msg_fb_buffers[dec->cur_buffer];
771 bs_buf = &dec->bs_buffers[dec->cur_buffer];
772
773 bs_size = align(dec->bs_size, 128);
774 memset(dec->bs_ptr, 0, bs_size - dec->bs_size);
775 dec->ws->buffer_unmap(bs_buf->cs_handle);
776
777 map_msg_buf(dec);
778 dec->msg->size = sizeof(*dec->msg);
779 dec->msg->msg_type = RUVD_MSG_DECODE;
780 dec->msg->stream_handle = dec->stream_handle;
781 dec->msg->status_report_feedback_number = dec->frame_number;
782
783 dec->msg->body.decode.stream_type = profile2stream_type(dec->base.profile);
784 dec->msg->body.decode.decode_flags = 0x1;
785 dec->msg->body.decode.width_in_samples = dec->base.width;
786 dec->msg->body.decode.height_in_samples = dec->base.height;
787
788 dec->msg->body.decode.dpb_size = dec->dpb.buf->size;
789 dec->msg->body.decode.bsd_size = bs_size;
790
791 dt = dec->set_dtb(dec->msg, (struct vl_video_buffer *)target);
792
793 switch (u_reduce_video_profile(picture->profile)) {
794 case PIPE_VIDEO_FORMAT_MPEG4_AVC:
795 dec->msg->body.decode.codec.h264 = get_h264_msg(dec, (struct pipe_h264_picture_desc*)picture);
796 break;
797
798 case PIPE_VIDEO_FORMAT_VC1:
799 dec->msg->body.decode.codec.vc1 = get_vc1_msg((struct pipe_vc1_picture_desc*)picture);
800 break;
801
802 case PIPE_VIDEO_FORMAT_MPEG12:
803 dec->msg->body.decode.codec.mpeg2 = get_mpeg2_msg(dec, (struct pipe_mpeg12_picture_desc*)picture);
804 break;
805
806 case PIPE_VIDEO_FORMAT_MPEG4:
807 dec->msg->body.decode.codec.mpeg4 = get_mpeg4_msg(dec, (struct pipe_mpeg4_picture_desc*)picture);
808 break;
809
810 default:
811 assert(0);
812 return;
813 }
814
815 dec->msg->body.decode.db_surf_tile_config = dec->msg->body.decode.dt_surf_tile_config;
816 dec->msg->body.decode.extension_support = 0x1;
817 send_msg_buf(dec);
818
819 send_cmd(dec, RUVD_CMD_DPB_BUFFER, dec->dpb.cs_handle, 0,
820 RADEON_USAGE_READWRITE, RADEON_DOMAIN_VRAM);
821 send_cmd(dec, RUVD_CMD_BITSTREAM_BUFFER, bs_buf->cs_handle,
822 0, RADEON_USAGE_READ, RADEON_DOMAIN_GTT);
823 send_cmd(dec, RUVD_CMD_DECODING_TARGET_BUFFER, dt, 0,
824 RADEON_USAGE_WRITE, RADEON_DOMAIN_VRAM);
825 send_cmd(dec, RUVD_CMD_FEEDBACK_BUFFER, msg_fb_buf->cs_handle,
826 0x1000, RADEON_USAGE_WRITE, RADEON_DOMAIN_GTT);
827 set_reg(dec, RUVD_ENGINE_CNTL, 1);
828
829 flush(dec);
830 next_buffer(dec);
831 }
832
833 /**
834 * flush any outstanding command buffers to the hardware
835 */
836 static void ruvd_flush(struct pipe_video_codec *decoder)
837 {
838 }
839
840 /**
841 * create and UVD decoder
842 */
843 struct pipe_video_codec *ruvd_create_decoder(struct pipe_context *context,
844 const struct pipe_video_codec *templ,
845 ruvd_set_dtb set_dtb)
846 {
847 struct radeon_winsys* ws = ((struct r600_common_context *)context)->ws;
848 unsigned dpb_size = calc_dpb_size(templ);
849 unsigned width = templ->width, height = templ->height;
850 unsigned bs_buf_size;
851 struct radeon_info info;
852 struct ruvd_decoder *dec;
853 int i;
854
855 ws->query_info(ws, &info);
856
857 switch(u_reduce_video_profile(templ->profile)) {
858 case PIPE_VIDEO_FORMAT_MPEG12:
859 if (templ->entrypoint > PIPE_VIDEO_ENTRYPOINT_BITSTREAM || info.family < CHIP_PALM)
860 return vl_create_mpeg12_decoder(context, templ);
861
862 /* fall through */
863 case PIPE_VIDEO_FORMAT_MPEG4:
864 case PIPE_VIDEO_FORMAT_MPEG4_AVC:
865 width = align(width, VL_MACROBLOCK_WIDTH);
866 height = align(height, VL_MACROBLOCK_HEIGHT);
867 break;
868
869 default:
870 break;
871 }
872
873
874 dec = CALLOC_STRUCT(ruvd_decoder);
875
876 if (!dec)
877 return NULL;
878
879 dec->base = *templ;
880 dec->base.context = context;
881 dec->base.width = width;
882 dec->base.height = height;
883
884 dec->base.destroy = ruvd_destroy;
885 dec->base.begin_frame = ruvd_begin_frame;
886 dec->base.decode_macroblock = ruvd_decode_macroblock;
887 dec->base.decode_bitstream = ruvd_decode_bitstream;
888 dec->base.end_frame = ruvd_end_frame;
889 dec->base.flush = ruvd_flush;
890
891 dec->set_dtb = set_dtb;
892 dec->stream_handle = alloc_stream_handle();
893 dec->ws = ws;
894 dec->cs = ws->cs_create(ws, RING_UVD, NULL);
895 if (!dec->cs) {
896 RUVD_ERR("Can't get command submission context.\n");
897 goto error;
898 }
899
900 bs_buf_size = width * height * 512 / (16 * 16);
901 for (i = 0; i < NUM_BUFFERS; ++i) {
902 unsigned msg_fb_size = align(sizeof(struct ruvd_msg), 0x1000) + 0x1000;
903 if (!create_buffer(dec, &dec->msg_fb_buffers[i], msg_fb_size)) {
904 RUVD_ERR("Can't allocated message buffers.\n");
905 goto error;
906 }
907
908 if (!create_buffer(dec, &dec->bs_buffers[i], bs_buf_size)) {
909 RUVD_ERR("Can't allocated bitstream buffers.\n");
910 goto error;
911 }
912
913 clear_buffer(dec, &dec->msg_fb_buffers[i]);
914 clear_buffer(dec, &dec->bs_buffers[i]);
915 }
916
917 if (!create_buffer(dec, &dec->dpb, dpb_size)) {
918 RUVD_ERR("Can't allocated dpb.\n");
919 goto error;
920 }
921
922 clear_buffer(dec, &dec->dpb);
923
924 map_msg_buf(dec);
925 dec->msg->size = sizeof(*dec->msg);
926 dec->msg->msg_type = RUVD_MSG_CREATE;
927 dec->msg->stream_handle = dec->stream_handle;
928 dec->msg->body.create.stream_type = profile2stream_type(dec->base.profile);
929 dec->msg->body.create.width_in_samples = dec->base.width;
930 dec->msg->body.create.height_in_samples = dec->base.height;
931 dec->msg->body.create.dpb_size = dec->dpb.buf->size;
932 send_msg_buf(dec);
933 flush(dec);
934 next_buffer(dec);
935
936 return &dec->base;
937
938 error:
939 if (dec->cs) dec->ws->cs_destroy(dec->cs);
940
941 for (i = 0; i < NUM_BUFFERS; ++i) {
942 destroy_buffer(&dec->msg_fb_buffers[i]);
943 destroy_buffer(&dec->bs_buffers[i]);
944 }
945
946 destroy_buffer(&dec->dpb);
947
948 FREE(dec);
949
950 return NULL;
951 }
952
953 /**
954 * join surfaces into the same buffer with identical tiling params
955 * sumup their sizes and replace the backend buffers with a single bo
956 */
957 void ruvd_join_surfaces(struct radeon_winsys* ws, unsigned bind,
958 struct pb_buffer** buffers[VL_NUM_COMPONENTS],
959 struct radeon_surface *surfaces[VL_NUM_COMPONENTS])
960 {
961 unsigned best_tiling, best_wh, off;
962 unsigned size, alignment;
963 struct pb_buffer *pb;
964 unsigned i, j;
965
966 for (i = 0, best_tiling = 0, best_wh = ~0; i < VL_NUM_COMPONENTS; ++i) {
967 unsigned wh;
968
969 if (!surfaces[i])
970 continue;
971
972 /* choose the smallest bank w/h for now */
973 wh = surfaces[i]->bankw * surfaces[i]->bankh;
974 if (wh < best_wh) {
975 best_wh = wh;
976 best_tiling = i;
977 }
978 }
979
980 for (i = 0, off = 0; i < VL_NUM_COMPONENTS; ++i) {
981 if (!surfaces[i])
982 continue;
983
984 /* copy the tiling parameters */
985 surfaces[i]->bankw = surfaces[best_tiling]->bankw;
986 surfaces[i]->bankh = surfaces[best_tiling]->bankh;
987 surfaces[i]->mtilea = surfaces[best_tiling]->mtilea;
988 surfaces[i]->tile_split = surfaces[best_tiling]->tile_split;
989
990 /* adjust the texture layer offsets */
991 off = align(off, surfaces[i]->bo_alignment);
992 for (j = 0; j < Elements(surfaces[i]->level); ++j)
993 surfaces[i]->level[j].offset += off;
994 off += surfaces[i]->bo_size;
995 }
996
997 for (i = 0, size = 0, alignment = 0; i < VL_NUM_COMPONENTS; ++i) {
998 if (!buffers[i] || !*buffers[i])
999 continue;
1000
1001 size = align(size, (*buffers[i])->alignment);
1002 size += (*buffers[i])->size;
1003 alignment = MAX2(alignment, (*buffers[i])->alignment * 1);
1004 }
1005
1006 if (!size)
1007 return;
1008
1009 /* TODO: 2D tiling workaround */
1010 alignment *= 2;
1011
1012 pb = ws->buffer_create(ws, size, alignment, bind, RADEON_DOMAIN_VRAM);
1013 if (!pb)
1014 return;
1015
1016 for (i = 0; i < VL_NUM_COMPONENTS; ++i) {
1017 if (!buffers[i] || !*buffers[i])
1018 continue;
1019
1020 pb_reference(buffers[i], pb);
1021 }
1022
1023 pb_reference(&pb, NULL);
1024 }
1025
1026 /* calculate top/bottom offset */
1027 static unsigned texture_offset(struct radeon_surface *surface, unsigned layer)
1028 {
1029 return surface->level[0].offset +
1030 layer * surface->level[0].slice_size;
1031 }
1032
1033 /* hw encode the aspect of macro tiles */
1034 static unsigned macro_tile_aspect(unsigned macro_tile_aspect)
1035 {
1036 switch (macro_tile_aspect) {
1037 default:
1038 case 1: macro_tile_aspect = 0; break;
1039 case 2: macro_tile_aspect = 1; break;
1040 case 4: macro_tile_aspect = 2; break;
1041 case 8: macro_tile_aspect = 3; break;
1042 }
1043 return macro_tile_aspect;
1044 }
1045
1046 /* hw encode the bank width and height */
1047 static unsigned bank_wh(unsigned bankwh)
1048 {
1049 switch (bankwh) {
1050 default:
1051 case 1: bankwh = 0; break;
1052 case 2: bankwh = 1; break;
1053 case 4: bankwh = 2; break;
1054 case 8: bankwh = 3; break;
1055 }
1056 return bankwh;
1057 }
1058
1059 /**
1060 * fill decoding target field from the luma and chroma surfaces
1061 */
1062 void ruvd_set_dt_surfaces(struct ruvd_msg *msg, struct radeon_surface *luma,
1063 struct radeon_surface *chroma)
1064 {
1065 msg->body.decode.dt_pitch = luma->level[0].pitch_bytes;
1066 switch (luma->level[0].mode) {
1067 case RADEON_SURF_MODE_LINEAR_ALIGNED:
1068 msg->body.decode.dt_tiling_mode = RUVD_TILE_LINEAR;
1069 msg->body.decode.dt_array_mode = RUVD_ARRAY_MODE_LINEAR;
1070 break;
1071 case RADEON_SURF_MODE_1D:
1072 msg->body.decode.dt_tiling_mode = RUVD_TILE_8X8;
1073 msg->body.decode.dt_array_mode = RUVD_ARRAY_MODE_1D_THIN;
1074 break;
1075 case RADEON_SURF_MODE_2D:
1076 msg->body.decode.dt_tiling_mode = RUVD_TILE_8X8;
1077 msg->body.decode.dt_array_mode = RUVD_ARRAY_MODE_2D_THIN;
1078 break;
1079 default:
1080 assert(0);
1081 break;
1082 }
1083
1084 msg->body.decode.dt_luma_top_offset = texture_offset(luma, 0);
1085 msg->body.decode.dt_chroma_top_offset = texture_offset(chroma, 0);
1086 if (msg->body.decode.dt_field_mode) {
1087 msg->body.decode.dt_luma_bottom_offset = texture_offset(luma, 1);
1088 msg->body.decode.dt_chroma_bottom_offset = texture_offset(chroma, 1);
1089 } else {
1090 msg->body.decode.dt_luma_bottom_offset = msg->body.decode.dt_luma_top_offset;
1091 msg->body.decode.dt_chroma_bottom_offset = msg->body.decode.dt_chroma_top_offset;
1092 }
1093
1094 assert(luma->bankw == chroma->bankw);
1095 assert(luma->bankh == chroma->bankh);
1096 assert(luma->mtilea == chroma->mtilea);
1097
1098 msg->body.decode.dt_surf_tile_config |= RUVD_BANK_WIDTH(bank_wh(luma->bankw));
1099 msg->body.decode.dt_surf_tile_config |= RUVD_BANK_HEIGHT(bank_wh(luma->bankh));
1100 msg->body.decode.dt_surf_tile_config |= RUVD_MACRO_TILE_ASPECT_RATIO(macro_tile_aspect(luma->mtilea));
1101 }
1102
1103 int ruvd_get_video_param(struct pipe_screen *screen,
1104 enum pipe_video_profile profile,
1105 enum pipe_video_entrypoint entrypoint,
1106 enum pipe_video_cap param)
1107 {
1108 struct r600_common_screen *rscreen = (struct r600_common_screen *)screen;
1109
1110 /* UVD 2.x limits */
1111 if (rscreen->family < CHIP_PALM) {
1112 enum pipe_video_format codec = u_reduce_video_profile(profile);
1113 switch (param) {
1114 case PIPE_VIDEO_CAP_SUPPORTED:
1115 /* no support for MPEG4 */
1116 return codec != PIPE_VIDEO_FORMAT_MPEG4;
1117 case PIPE_VIDEO_CAP_PREFERS_INTERLACED:
1118 case PIPE_VIDEO_CAP_SUPPORTS_INTERLACED:
1119 /* and MPEG2 only with shaders */
1120 return codec != PIPE_VIDEO_FORMAT_MPEG12;
1121 default:
1122 break;
1123 }
1124 }
1125
1126 switch (param) {
1127 case PIPE_VIDEO_CAP_SUPPORTED:
1128 switch (u_reduce_video_profile(profile)) {
1129 case PIPE_VIDEO_FORMAT_MPEG12:
1130 case PIPE_VIDEO_FORMAT_MPEG4:
1131 case PIPE_VIDEO_FORMAT_MPEG4_AVC:
1132 return true;
1133 case PIPE_VIDEO_FORMAT_VC1:
1134 /* FIXME: VC-1 simple/main profile is broken */
1135 return profile == PIPE_VIDEO_PROFILE_VC1_ADVANCED;
1136 default:
1137 return false;
1138 }
1139 case PIPE_VIDEO_CAP_NPOT_TEXTURES:
1140 return 1;
1141 case PIPE_VIDEO_CAP_MAX_WIDTH:
1142 return 2048;
1143 case PIPE_VIDEO_CAP_MAX_HEIGHT:
1144 return 1152;
1145 case PIPE_VIDEO_CAP_PREFERED_FORMAT:
1146 return PIPE_FORMAT_NV12;
1147 case PIPE_VIDEO_CAP_PREFERS_INTERLACED:
1148 return true;
1149 case PIPE_VIDEO_CAP_SUPPORTS_INTERLACED:
1150 return true;
1151 case PIPE_VIDEO_CAP_SUPPORTS_PROGRESSIVE:
1152 return true;
1153 case PIPE_VIDEO_CAP_MAX_LEVEL:
1154 switch (profile) {
1155 case PIPE_VIDEO_PROFILE_MPEG1:
1156 return 0;
1157 case PIPE_VIDEO_PROFILE_MPEG2_SIMPLE:
1158 case PIPE_VIDEO_PROFILE_MPEG2_MAIN:
1159 return 3;
1160 case PIPE_VIDEO_PROFILE_MPEG4_SIMPLE:
1161 return 3;
1162 case PIPE_VIDEO_PROFILE_MPEG4_ADVANCED_SIMPLE:
1163 return 5;
1164 case PIPE_VIDEO_PROFILE_VC1_SIMPLE:
1165 return 1;
1166 case PIPE_VIDEO_PROFILE_VC1_MAIN:
1167 return 2;
1168 case PIPE_VIDEO_PROFILE_VC1_ADVANCED:
1169 return 4;
1170 case PIPE_VIDEO_PROFILE_MPEG4_AVC_BASELINE:
1171 case PIPE_VIDEO_PROFILE_MPEG4_AVC_MAIN:
1172 case PIPE_VIDEO_PROFILE_MPEG4_AVC_HIGH:
1173 return 41;
1174 default:
1175 return 0;
1176 }
1177 default:
1178 return 0;
1179 }
1180 }
1181
1182 boolean ruvd_is_format_supported(struct pipe_screen *screen,
1183 enum pipe_format format,
1184 enum pipe_video_profile profile,
1185 enum pipe_video_entrypoint entrypoint)
1186 {
1187 /* we can only handle this one with UVD */
1188 if (profile != PIPE_VIDEO_PROFILE_UNKNOWN)
1189 return format == PIPE_FORMAT_NV12;
1190
1191 return vl_video_buffer_is_format_supported(screen, format, profile, entrypoint);
1192 }