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gallium/radeon: don't re-set BO metadata after CMASK deallocation
[mesa.git] / src / gallium / drivers / radeon / radeon_uvd.c
1 /**************************************************************************
2 *
3 * Copyright 2011 Advanced Micro Devices, Inc.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28 /*
29 * Authors:
30 * Christian König <christian.koenig@amd.com>
31 *
32 */
33
34 #include <sys/types.h>
35 #include <assert.h>
36 #include <errno.h>
37 #include <unistd.h>
38 #include <stdio.h>
39
40 #include "pipe/p_video_codec.h"
41
42 #include "util/u_memory.h"
43 #include "util/u_video.h"
44
45 #include "vl/vl_defines.h"
46 #include "vl/vl_mpeg12_decoder.h"
47
48 #include "r600_pipe_common.h"
49 #include "radeon_video.h"
50 #include "radeon_uvd.h"
51
52 #define NUM_BUFFERS 4
53
54 #define NUM_MPEG2_REFS 6
55 #define NUM_H264_REFS 17
56 #define NUM_VC1_REFS 5
57
58 #define FB_BUFFER_OFFSET 0x1000
59 #define FB_BUFFER_SIZE 2048
60 #define FB_BUFFER_SIZE_TONGA (2048 * 64)
61 #define IT_SCALING_TABLE_SIZE 992
62
63 /* UVD decoder representation */
64 struct ruvd_decoder {
65 struct pipe_video_codec base;
66
67 ruvd_set_dtb set_dtb;
68
69 unsigned stream_handle;
70 unsigned stream_type;
71 unsigned frame_number;
72
73 struct pipe_screen *screen;
74 struct radeon_winsys* ws;
75 struct radeon_winsys_cs* cs;
76
77 unsigned cur_buffer;
78
79 struct rvid_buffer msg_fb_it_buffers[NUM_BUFFERS];
80 struct ruvd_msg *msg;
81 uint32_t *fb;
82 unsigned fb_size;
83 uint8_t *it;
84
85 struct rvid_buffer bs_buffers[NUM_BUFFERS];
86 void* bs_ptr;
87 unsigned bs_size;
88
89 struct rvid_buffer dpb;
90 bool use_legacy;
91 struct rvid_buffer ctx;
92 };
93
94 /* flush IB to the hardware */
95 static void flush(struct ruvd_decoder *dec)
96 {
97 dec->ws->cs_flush(dec->cs, RADEON_FLUSH_ASYNC, NULL);
98 }
99
100 /* add a new set register command to the IB */
101 static void set_reg(struct ruvd_decoder *dec, unsigned reg, uint32_t val)
102 {
103 radeon_emit(dec->cs, RUVD_PKT0(reg >> 2, 0));
104 radeon_emit(dec->cs, val);
105 }
106
107 /* send a command to the VCPU through the GPCOM registers */
108 static void send_cmd(struct ruvd_decoder *dec, unsigned cmd,
109 struct pb_buffer* buf, uint32_t off,
110 enum radeon_bo_usage usage, enum radeon_bo_domain domain)
111 {
112 int reloc_idx;
113
114 reloc_idx = dec->ws->cs_add_buffer(dec->cs, buf, usage, domain,
115 RADEON_PRIO_UVD);
116 if (!dec->use_legacy) {
117 uint64_t addr;
118 addr = dec->ws->buffer_get_virtual_address(buf);
119 addr = addr + off;
120 set_reg(dec, RUVD_GPCOM_VCPU_DATA0, addr);
121 set_reg(dec, RUVD_GPCOM_VCPU_DATA1, addr >> 32);
122 } else {
123 set_reg(dec, RUVD_GPCOM_VCPU_DATA0, off);
124 set_reg(dec, RUVD_GPCOM_VCPU_DATA1, reloc_idx * 4);
125 }
126 set_reg(dec, RUVD_GPCOM_VCPU_CMD, cmd << 1);
127 }
128
129 /* do the codec needs an IT buffer ?*/
130 static bool have_it(struct ruvd_decoder *dec)
131 {
132 return dec->stream_type == RUVD_CODEC_H264_PERF ||
133 dec->stream_type == RUVD_CODEC_H265;
134 }
135
136 /* map the next available message/feedback/itscaling buffer */
137 static void map_msg_fb_it_buf(struct ruvd_decoder *dec)
138 {
139 struct rvid_buffer* buf;
140 uint8_t *ptr;
141
142 /* grab the current message/feedback buffer */
143 buf = &dec->msg_fb_it_buffers[dec->cur_buffer];
144
145 /* and map it for CPU access */
146 ptr = dec->ws->buffer_map(buf->res->buf, dec->cs, PIPE_TRANSFER_WRITE);
147
148 /* calc buffer offsets */
149 dec->msg = (struct ruvd_msg *)ptr;
150 dec->fb = (uint32_t *)(ptr + FB_BUFFER_OFFSET);
151 if (have_it(dec))
152 dec->it = (uint8_t *)(ptr + FB_BUFFER_OFFSET + dec->fb_size);
153 }
154
155 /* unmap and send a message command to the VCPU */
156 static void send_msg_buf(struct ruvd_decoder *dec)
157 {
158 struct rvid_buffer* buf;
159
160 /* ignore the request if message/feedback buffer isn't mapped */
161 if (!dec->msg || !dec->fb)
162 return;
163
164 /* grab the current message buffer */
165 buf = &dec->msg_fb_it_buffers[dec->cur_buffer];
166
167 /* unmap the buffer */
168 dec->ws->buffer_unmap(buf->res->buf);
169 dec->msg = NULL;
170 dec->fb = NULL;
171 dec->it = NULL;
172
173 /* and send it to the hardware */
174 send_cmd(dec, RUVD_CMD_MSG_BUFFER, buf->res->buf, 0,
175 RADEON_USAGE_READ, RADEON_DOMAIN_GTT);
176 }
177
178 /* cycle to the next set of buffers */
179 static void next_buffer(struct ruvd_decoder *dec)
180 {
181 ++dec->cur_buffer;
182 dec->cur_buffer %= NUM_BUFFERS;
183 }
184
185 /* convert the profile into something UVD understands */
186 static uint32_t profile2stream_type(struct ruvd_decoder *dec, unsigned family)
187 {
188 switch (u_reduce_video_profile(dec->base.profile)) {
189 case PIPE_VIDEO_FORMAT_MPEG4_AVC:
190 return (family >= CHIP_TONGA) ?
191 RUVD_CODEC_H264_PERF : RUVD_CODEC_H264;
192
193 case PIPE_VIDEO_FORMAT_VC1:
194 return RUVD_CODEC_VC1;
195
196 case PIPE_VIDEO_FORMAT_MPEG12:
197 return RUVD_CODEC_MPEG2;
198
199 case PIPE_VIDEO_FORMAT_MPEG4:
200 return RUVD_CODEC_MPEG4;
201
202 case PIPE_VIDEO_FORMAT_HEVC:
203 return RUVD_CODEC_H265;
204
205 default:
206 assert(0);
207 return 0;
208 }
209 }
210
211 static unsigned calc_ctx_size_h265_main(struct ruvd_decoder *dec)
212 {
213 unsigned width = align(dec->base.width, VL_MACROBLOCK_WIDTH);
214 unsigned height = align(dec->base.height, VL_MACROBLOCK_HEIGHT);
215
216 unsigned max_references = dec->base.max_references + 1;
217
218 if (dec->base.width * dec->base.height >= 4096*2000)
219 max_references = MAX2(max_references, 8);
220 else
221 max_references = MAX2(max_references, 17);
222
223 width = align (width, 16);
224 height = align (height, 16);
225 return ((width + 255) / 16) * ((height + 255) / 16) * 16 * max_references + 52 * 1024;
226 }
227
228 static unsigned calc_ctx_size_h265_main10(struct ruvd_decoder *dec, struct pipe_h265_picture_desc *pic)
229 {
230 unsigned block_size, log2_ctb_size, width_in_ctb, height_in_ctb, num_16x16_block_per_ctb;
231 unsigned context_buffer_size_per_ctb_row, cm_buffer_size, max_mb_address, db_left_tile_pxl_size;
232 unsigned db_left_tile_ctx_size = 4096 / 16 * (32 + 16 * 4);
233
234 unsigned width = align(dec->base.width, VL_MACROBLOCK_WIDTH);
235 unsigned height = align(dec->base.height, VL_MACROBLOCK_HEIGHT);
236 unsigned coeff_10bit = (pic->pps->sps->bit_depth_luma_minus8 || pic->pps->sps->bit_depth_chroma_minus8) ? 2 : 1;
237
238 unsigned max_references = dec->base.max_references + 1;
239
240 if (dec->base.width * dec->base.height >= 4096*2000)
241 max_references = MAX2(max_references, 8);
242 else
243 max_references = MAX2(max_references, 17);
244
245 block_size = (1 << (pic->pps->sps->log2_min_luma_coding_block_size_minus3 + 3));
246 log2_ctb_size = block_size + pic->pps->sps->log2_diff_max_min_luma_coding_block_size;
247
248 width_in_ctb = (width + ((1 << log2_ctb_size) - 1)) >> log2_ctb_size;
249 height_in_ctb = (height + ((1 << log2_ctb_size) - 1)) >> log2_ctb_size;
250
251 num_16x16_block_per_ctb = ((1 << log2_ctb_size) >> 4) * ((1 << log2_ctb_size) >> 4);
252 context_buffer_size_per_ctb_row = align(width_in_ctb * num_16x16_block_per_ctb * 16, 256);
253 max_mb_address = (unsigned) ceil(height * 8 / 2048.0);
254
255 cm_buffer_size = max_references * context_buffer_size_per_ctb_row * height_in_ctb;
256 db_left_tile_pxl_size = coeff_10bit * (max_mb_address * 2 * 2048 + 1024);
257
258 return cm_buffer_size + db_left_tile_ctx_size + db_left_tile_pxl_size;
259 }
260
261 /* calculate size of reference picture buffer */
262 static unsigned calc_dpb_size(struct ruvd_decoder *dec)
263 {
264 unsigned width_in_mb, height_in_mb, image_size, dpb_size;
265
266 // always align them to MB size for dpb calculation
267 unsigned width = align(dec->base.width, VL_MACROBLOCK_WIDTH);
268 unsigned height = align(dec->base.height, VL_MACROBLOCK_HEIGHT);
269
270 // always one more for currently decoded picture
271 unsigned max_references = dec->base.max_references + 1;
272
273 // aligned size of a single frame
274 image_size = width * height;
275 image_size += image_size / 2;
276 image_size = align(image_size, 1024);
277
278 // picture width & height in 16 pixel units
279 width_in_mb = width / VL_MACROBLOCK_WIDTH;
280 height_in_mb = align(height / VL_MACROBLOCK_HEIGHT, 2);
281
282 switch (u_reduce_video_profile(dec->base.profile)) {
283 case PIPE_VIDEO_FORMAT_MPEG4_AVC: {
284 if (!dec->use_legacy) {
285 unsigned fs_in_mb = width_in_mb * height_in_mb;
286 unsigned alignment = 64, num_dpb_buffer;
287
288 if (dec->stream_type == RUVD_CODEC_H264_PERF)
289 alignment = 256;
290 switch(dec->base.level) {
291 case 30:
292 num_dpb_buffer = 8100 / fs_in_mb;
293 break;
294 case 31:
295 num_dpb_buffer = 18000 / fs_in_mb;
296 break;
297 case 32:
298 num_dpb_buffer = 20480 / fs_in_mb;
299 break;
300 case 41:
301 num_dpb_buffer = 32768 / fs_in_mb;
302 break;
303 case 42:
304 num_dpb_buffer = 34816 / fs_in_mb;
305 break;
306 case 50:
307 num_dpb_buffer = 110400 / fs_in_mb;
308 break;
309 case 51:
310 num_dpb_buffer = 184320 / fs_in_mb;
311 break;
312 default:
313 num_dpb_buffer = 184320 / fs_in_mb;
314 break;
315 }
316 num_dpb_buffer++;
317 max_references = MAX2(MIN2(NUM_H264_REFS, num_dpb_buffer), max_references);
318 dpb_size = image_size * max_references;
319 dpb_size += max_references * align(width_in_mb * height_in_mb * 192, alignment);
320 dpb_size += align(width_in_mb * height_in_mb * 32, alignment);
321 } else {
322 // the firmware seems to allways assume a minimum of ref frames
323 max_references = MAX2(NUM_H264_REFS, max_references);
324 // reference picture buffer
325 dpb_size = image_size * max_references;
326 // macroblock context buffer
327 dpb_size += width_in_mb * height_in_mb * max_references * 192;
328 // IT surface buffer
329 dpb_size += width_in_mb * height_in_mb * 32;
330 }
331 break;
332 }
333
334 case PIPE_VIDEO_FORMAT_HEVC:
335 if (dec->base.width * dec->base.height >= 4096*2000)
336 max_references = MAX2(max_references, 8);
337 else
338 max_references = MAX2(max_references, 17);
339
340 width = align (width, 16);
341 height = align (height, 16);
342 if (dec->base.profile == PIPE_VIDEO_PROFILE_HEVC_MAIN_10)
343 dpb_size = align((width * height * 9) / 4, 256) * max_references;
344 else
345 dpb_size = align((width * height * 3) / 2, 256) * max_references;
346 break;
347
348 case PIPE_VIDEO_FORMAT_VC1:
349 // the firmware seems to allways assume a minimum of ref frames
350 max_references = MAX2(NUM_VC1_REFS, max_references);
351
352 // reference picture buffer
353 dpb_size = image_size * max_references;
354
355 // CONTEXT_BUFFER
356 dpb_size += width_in_mb * height_in_mb * 128;
357
358 // IT surface buffer
359 dpb_size += width_in_mb * 64;
360
361 // DB surface buffer
362 dpb_size += width_in_mb * 128;
363
364 // BP
365 dpb_size += align(MAX2(width_in_mb, height_in_mb) * 7 * 16, 64);
366 break;
367
368 case PIPE_VIDEO_FORMAT_MPEG12:
369 // reference picture buffer, must be big enough for all frames
370 dpb_size = image_size * NUM_MPEG2_REFS;
371 break;
372
373 case PIPE_VIDEO_FORMAT_MPEG4:
374 // reference picture buffer
375 dpb_size = image_size * max_references;
376
377 // CM
378 dpb_size += width_in_mb * height_in_mb * 64;
379
380 // IT surface buffer
381 dpb_size += align(width_in_mb * height_in_mb * 32, 64);
382
383 dpb_size = MAX2(dpb_size, 30 * 1024 * 1024);
384 break;
385
386 default:
387 // something is missing here
388 assert(0);
389
390 // at least use a sane default value
391 dpb_size = 32 * 1024 * 1024;
392 break;
393 }
394 return dpb_size;
395 }
396
397 /* free associated data in the video buffer callback */
398 static void ruvd_destroy_associated_data(void *data)
399 {
400 /* NOOP, since we only use an intptr */
401 }
402
403 /* get h264 specific message bits */
404 static struct ruvd_h264 get_h264_msg(struct ruvd_decoder *dec, struct pipe_h264_picture_desc *pic)
405 {
406 struct ruvd_h264 result;
407
408 memset(&result, 0, sizeof(result));
409 switch (pic->base.profile) {
410 case PIPE_VIDEO_PROFILE_MPEG4_AVC_BASELINE:
411 result.profile = RUVD_H264_PROFILE_BASELINE;
412 break;
413
414 case PIPE_VIDEO_PROFILE_MPEG4_AVC_MAIN:
415 result.profile = RUVD_H264_PROFILE_MAIN;
416 break;
417
418 case PIPE_VIDEO_PROFILE_MPEG4_AVC_HIGH:
419 result.profile = RUVD_H264_PROFILE_HIGH;
420 break;
421
422 default:
423 assert(0);
424 break;
425 }
426
427 result.level = dec->base.level;
428
429 result.sps_info_flags = 0;
430 result.sps_info_flags |= pic->pps->sps->direct_8x8_inference_flag << 0;
431 result.sps_info_flags |= pic->pps->sps->mb_adaptive_frame_field_flag << 1;
432 result.sps_info_flags |= pic->pps->sps->frame_mbs_only_flag << 2;
433 result.sps_info_flags |= pic->pps->sps->delta_pic_order_always_zero_flag << 3;
434
435 result.bit_depth_luma_minus8 = pic->pps->sps->bit_depth_luma_minus8;
436 result.bit_depth_chroma_minus8 = pic->pps->sps->bit_depth_chroma_minus8;
437 result.log2_max_frame_num_minus4 = pic->pps->sps->log2_max_frame_num_minus4;
438 result.pic_order_cnt_type = pic->pps->sps->pic_order_cnt_type;
439 result.log2_max_pic_order_cnt_lsb_minus4 = pic->pps->sps->log2_max_pic_order_cnt_lsb_minus4;
440
441 switch (dec->base.chroma_format) {
442 case PIPE_VIDEO_CHROMA_FORMAT_NONE:
443 /* TODO: assert? */
444 break;
445 case PIPE_VIDEO_CHROMA_FORMAT_400:
446 result.chroma_format = 0;
447 break;
448 case PIPE_VIDEO_CHROMA_FORMAT_420:
449 result.chroma_format = 1;
450 break;
451 case PIPE_VIDEO_CHROMA_FORMAT_422:
452 result.chroma_format = 2;
453 break;
454 case PIPE_VIDEO_CHROMA_FORMAT_444:
455 result.chroma_format = 3;
456 break;
457 }
458
459 result.pps_info_flags = 0;
460 result.pps_info_flags |= pic->pps->transform_8x8_mode_flag << 0;
461 result.pps_info_flags |= pic->pps->redundant_pic_cnt_present_flag << 1;
462 result.pps_info_flags |= pic->pps->constrained_intra_pred_flag << 2;
463 result.pps_info_flags |= pic->pps->deblocking_filter_control_present_flag << 3;
464 result.pps_info_flags |= pic->pps->weighted_bipred_idc << 4;
465 result.pps_info_flags |= pic->pps->weighted_pred_flag << 6;
466 result.pps_info_flags |= pic->pps->bottom_field_pic_order_in_frame_present_flag << 7;
467 result.pps_info_flags |= pic->pps->entropy_coding_mode_flag << 8;
468
469 result.num_slice_groups_minus1 = pic->pps->num_slice_groups_minus1;
470 result.slice_group_map_type = pic->pps->slice_group_map_type;
471 result.slice_group_change_rate_minus1 = pic->pps->slice_group_change_rate_minus1;
472 result.pic_init_qp_minus26 = pic->pps->pic_init_qp_minus26;
473 result.chroma_qp_index_offset = pic->pps->chroma_qp_index_offset;
474 result.second_chroma_qp_index_offset = pic->pps->second_chroma_qp_index_offset;
475
476 memcpy(result.scaling_list_4x4, pic->pps->ScalingList4x4, 6*16);
477 memcpy(result.scaling_list_8x8, pic->pps->ScalingList8x8, 2*64);
478
479 if (dec->stream_type == RUVD_CODEC_H264_PERF) {
480 memcpy(dec->it, result.scaling_list_4x4, 6*16);
481 memcpy((dec->it + 96), result.scaling_list_8x8, 2*64);
482 }
483
484 result.num_ref_frames = pic->num_ref_frames;
485
486 result.num_ref_idx_l0_active_minus1 = pic->num_ref_idx_l0_active_minus1;
487 result.num_ref_idx_l1_active_minus1 = pic->num_ref_idx_l1_active_minus1;
488
489 result.frame_num = pic->frame_num;
490 memcpy(result.frame_num_list, pic->frame_num_list, 4*16);
491 result.curr_field_order_cnt_list[0] = pic->field_order_cnt[0];
492 result.curr_field_order_cnt_list[1] = pic->field_order_cnt[1];
493 memcpy(result.field_order_cnt_list, pic->field_order_cnt_list, 4*16*2);
494
495 result.decoded_pic_idx = pic->frame_num;
496
497 return result;
498 }
499
500 /* get h265 specific message bits */
501 static struct ruvd_h265 get_h265_msg(struct ruvd_decoder *dec, struct pipe_video_buffer *target,
502 struct pipe_h265_picture_desc *pic)
503 {
504 struct ruvd_h265 result;
505 unsigned i;
506
507 memset(&result, 0, sizeof(result));
508
509 result.sps_info_flags = 0;
510 result.sps_info_flags |= pic->pps->sps->scaling_list_enabled_flag << 0;
511 result.sps_info_flags |= pic->pps->sps->amp_enabled_flag << 1;
512 result.sps_info_flags |= pic->pps->sps->sample_adaptive_offset_enabled_flag << 2;
513 result.sps_info_flags |= pic->pps->sps->pcm_enabled_flag << 3;
514 result.sps_info_flags |= pic->pps->sps->pcm_loop_filter_disabled_flag << 4;
515 result.sps_info_flags |= pic->pps->sps->long_term_ref_pics_present_flag << 5;
516 result.sps_info_flags |= pic->pps->sps->sps_temporal_mvp_enabled_flag << 6;
517 result.sps_info_flags |= pic->pps->sps->strong_intra_smoothing_enabled_flag << 7;
518 result.sps_info_flags |= pic->pps->sps->separate_colour_plane_flag << 8;
519 if (((struct r600_common_screen*)dec->screen)->family == CHIP_CARRIZO)
520 result.sps_info_flags |= 1 << 9;
521 if (pic->UseRefPicList == true)
522 result.sps_info_flags |= 1 << 10;
523
524 result.chroma_format = pic->pps->sps->chroma_format_idc;
525 result.bit_depth_luma_minus8 = pic->pps->sps->bit_depth_luma_minus8;
526 result.bit_depth_chroma_minus8 = pic->pps->sps->bit_depth_chroma_minus8;
527 result.log2_max_pic_order_cnt_lsb_minus4 = pic->pps->sps->log2_max_pic_order_cnt_lsb_minus4;
528 result.sps_max_dec_pic_buffering_minus1 = pic->pps->sps->sps_max_dec_pic_buffering_minus1;
529 result.log2_min_luma_coding_block_size_minus3 = pic->pps->sps->log2_min_luma_coding_block_size_minus3;
530 result.log2_diff_max_min_luma_coding_block_size = pic->pps->sps->log2_diff_max_min_luma_coding_block_size;
531 result.log2_min_transform_block_size_minus2 = pic->pps->sps->log2_min_transform_block_size_minus2;
532 result.log2_diff_max_min_transform_block_size = pic->pps->sps->log2_diff_max_min_transform_block_size;
533 result.max_transform_hierarchy_depth_inter = pic->pps->sps->max_transform_hierarchy_depth_inter;
534 result.max_transform_hierarchy_depth_intra = pic->pps->sps->max_transform_hierarchy_depth_intra;
535 result.pcm_sample_bit_depth_luma_minus1 = pic->pps->sps->pcm_sample_bit_depth_luma_minus1;
536 result.pcm_sample_bit_depth_chroma_minus1 = pic->pps->sps->pcm_sample_bit_depth_chroma_minus1;
537 result.log2_min_pcm_luma_coding_block_size_minus3 = pic->pps->sps->log2_min_pcm_luma_coding_block_size_minus3;
538 result.log2_diff_max_min_pcm_luma_coding_block_size = pic->pps->sps->log2_diff_max_min_pcm_luma_coding_block_size;
539 result.num_short_term_ref_pic_sets = pic->pps->sps->num_short_term_ref_pic_sets;
540
541 result.pps_info_flags = 0;
542 result.pps_info_flags |= pic->pps->dependent_slice_segments_enabled_flag << 0;
543 result.pps_info_flags |= pic->pps->output_flag_present_flag << 1;
544 result.pps_info_flags |= pic->pps->sign_data_hiding_enabled_flag << 2;
545 result.pps_info_flags |= pic->pps->cabac_init_present_flag << 3;
546 result.pps_info_flags |= pic->pps->constrained_intra_pred_flag << 4;
547 result.pps_info_flags |= pic->pps->transform_skip_enabled_flag << 5;
548 result.pps_info_flags |= pic->pps->cu_qp_delta_enabled_flag << 6;
549 result.pps_info_flags |= pic->pps->pps_slice_chroma_qp_offsets_present_flag << 7;
550 result.pps_info_flags |= pic->pps->weighted_pred_flag << 8;
551 result.pps_info_flags |= pic->pps->weighted_bipred_flag << 9;
552 result.pps_info_flags |= pic->pps->transquant_bypass_enabled_flag << 10;
553 result.pps_info_flags |= pic->pps->tiles_enabled_flag << 11;
554 result.pps_info_flags |= pic->pps->entropy_coding_sync_enabled_flag << 12;
555 result.pps_info_flags |= pic->pps->uniform_spacing_flag << 13;
556 result.pps_info_flags |= pic->pps->loop_filter_across_tiles_enabled_flag << 14;
557 result.pps_info_flags |= pic->pps->pps_loop_filter_across_slices_enabled_flag << 15;
558 result.pps_info_flags |= pic->pps->deblocking_filter_override_enabled_flag << 16;
559 result.pps_info_flags |= pic->pps->pps_deblocking_filter_disabled_flag << 17;
560 result.pps_info_flags |= pic->pps->lists_modification_present_flag << 18;
561 result.pps_info_flags |= pic->pps->slice_segment_header_extension_present_flag << 19;
562 //result.pps_info_flags |= pic->pps->deblocking_filter_control_present_flag; ???
563
564 result.num_extra_slice_header_bits = pic->pps->num_extra_slice_header_bits;
565 result.num_long_term_ref_pic_sps = pic->pps->sps->num_long_term_ref_pics_sps;
566 result.num_ref_idx_l0_default_active_minus1 = pic->pps->num_ref_idx_l0_default_active_minus1;
567 result.num_ref_idx_l1_default_active_minus1 = pic->pps->num_ref_idx_l1_default_active_minus1;
568 result.pps_cb_qp_offset = pic->pps->pps_cb_qp_offset;
569 result.pps_cr_qp_offset = pic->pps->pps_cr_qp_offset;
570 result.pps_beta_offset_div2 = pic->pps->pps_beta_offset_div2;
571 result.pps_tc_offset_div2 = pic->pps->pps_tc_offset_div2;
572 result.diff_cu_qp_delta_depth = pic->pps->diff_cu_qp_delta_depth;
573 result.num_tile_columns_minus1 = pic->pps->num_tile_columns_minus1;
574 result.num_tile_rows_minus1 = pic->pps->num_tile_rows_minus1;
575 result.log2_parallel_merge_level_minus2 = pic->pps->log2_parallel_merge_level_minus2;
576 result.init_qp_minus26 = pic->pps->init_qp_minus26;
577
578 for (i = 0; i < 19; ++i)
579 result.column_width_minus1[i] = pic->pps->column_width_minus1[i];
580
581 for (i = 0; i < 21; ++i)
582 result.row_height_minus1[i] = pic->pps->row_height_minus1[i];
583
584 result.num_delta_pocs_ref_rps_idx = pic->NumDeltaPocsOfRefRpsIdx;
585 result.curr_idx = pic->CurrPicOrderCntVal;
586 result.curr_poc = pic->CurrPicOrderCntVal;
587
588 vl_video_buffer_set_associated_data(target, &dec->base,
589 (void *)(uintptr_t)pic->CurrPicOrderCntVal,
590 &ruvd_destroy_associated_data);
591
592 for (i = 0; i < 16; ++i) {
593 struct pipe_video_buffer *ref = pic->ref[i];
594 uintptr_t ref_pic = 0;
595
596 result.poc_list[i] = pic->PicOrderCntVal[i];
597
598 if (ref)
599 ref_pic = (uintptr_t)vl_video_buffer_get_associated_data(ref, &dec->base);
600 else
601 ref_pic = 0x7F;
602 result.ref_pic_list[i] = ref_pic;
603 }
604
605 for (i = 0; i < 8; ++i) {
606 result.ref_pic_set_st_curr_before[i] = 0xFF;
607 result.ref_pic_set_st_curr_after[i] = 0xFF;
608 result.ref_pic_set_lt_curr[i] = 0xFF;
609 }
610
611 for (i = 0; i < pic->NumPocStCurrBefore; ++i)
612 result.ref_pic_set_st_curr_before[i] = pic->RefPicSetStCurrBefore[i];
613
614 for (i = 0; i < pic->NumPocStCurrAfter; ++i)
615 result.ref_pic_set_st_curr_after[i] = pic->RefPicSetStCurrAfter[i];
616
617 for (i = 0; i < pic->NumPocLtCurr; ++i)
618 result.ref_pic_set_lt_curr[i] = pic->RefPicSetLtCurr[i];
619
620 for (i = 0; i < 6; ++i)
621 result.ucScalingListDCCoefSizeID2[i] = pic->pps->sps->ScalingListDCCoeff16x16[i];
622
623 for (i = 0; i < 2; ++i)
624 result.ucScalingListDCCoefSizeID3[i] = pic->pps->sps->ScalingListDCCoeff32x32[i];
625
626 memcpy(dec->it, pic->pps->sps->ScalingList4x4, 6 * 16);
627 memcpy(dec->it + 96, pic->pps->sps->ScalingList8x8, 6 * 64);
628 memcpy(dec->it + 480, pic->pps->sps->ScalingList16x16, 6 * 64);
629 memcpy(dec->it + 864, pic->pps->sps->ScalingList32x32, 2 * 64);
630
631 for (i = 0 ; i < 2 ; i++) {
632 for (int j = 0 ; j < 15 ; j++)
633 result.direct_reflist[i][j] = pic->RefPicList[i][j];
634 }
635
636 if ((pic->base.profile == PIPE_VIDEO_PROFILE_HEVC_MAIN_10) &&
637 (target->buffer_format == PIPE_FORMAT_NV12)) {
638 result.p010_mode = 0;
639 result.luma_10to8 = 5;
640 result.chroma_10to8 = 5;
641 result.sclr_luma10to8 = 4;
642 result.sclr_chroma10to8 = 4;
643 }
644
645 /* TODO
646 result.highestTid;
647 result.isNonRef;
648
649 IDRPicFlag;
650 RAPPicFlag;
651 NumPocTotalCurr;
652 NumShortTermPictureSliceHeaderBits;
653 NumLongTermPictureSliceHeaderBits;
654
655 IsLongTerm[16];
656 */
657
658 return result;
659 }
660
661 /* get vc1 specific message bits */
662 static struct ruvd_vc1 get_vc1_msg(struct pipe_vc1_picture_desc *pic)
663 {
664 struct ruvd_vc1 result;
665
666 memset(&result, 0, sizeof(result));
667
668 switch(pic->base.profile) {
669 case PIPE_VIDEO_PROFILE_VC1_SIMPLE:
670 result.profile = RUVD_VC1_PROFILE_SIMPLE;
671 result.level = 1;
672 break;
673
674 case PIPE_VIDEO_PROFILE_VC1_MAIN:
675 result.profile = RUVD_VC1_PROFILE_MAIN;
676 result.level = 2;
677 break;
678
679 case PIPE_VIDEO_PROFILE_VC1_ADVANCED:
680 result.profile = RUVD_VC1_PROFILE_ADVANCED;
681 result.level = 4;
682 break;
683
684 default:
685 assert(0);
686 }
687
688 /* fields common for all profiles */
689 result.sps_info_flags |= pic->postprocflag << 7;
690 result.sps_info_flags |= pic->pulldown << 6;
691 result.sps_info_flags |= pic->interlace << 5;
692 result.sps_info_flags |= pic->tfcntrflag << 4;
693 result.sps_info_flags |= pic->finterpflag << 3;
694 result.sps_info_flags |= pic->psf << 1;
695
696 result.pps_info_flags |= pic->range_mapy_flag << 31;
697 result.pps_info_flags |= pic->range_mapy << 28;
698 result.pps_info_flags |= pic->range_mapuv_flag << 27;
699 result.pps_info_flags |= pic->range_mapuv << 24;
700 result.pps_info_flags |= pic->multires << 21;
701 result.pps_info_flags |= pic->maxbframes << 16;
702 result.pps_info_flags |= pic->overlap << 11;
703 result.pps_info_flags |= pic->quantizer << 9;
704 result.pps_info_flags |= pic->panscan_flag << 7;
705 result.pps_info_flags |= pic->refdist_flag << 6;
706 result.pps_info_flags |= pic->vstransform << 0;
707
708 /* some fields only apply to main/advanced profile */
709 if (pic->base.profile != PIPE_VIDEO_PROFILE_VC1_SIMPLE) {
710 result.pps_info_flags |= pic->syncmarker << 20;
711 result.pps_info_flags |= pic->rangered << 19;
712 result.pps_info_flags |= pic->loopfilter << 5;
713 result.pps_info_flags |= pic->fastuvmc << 4;
714 result.pps_info_flags |= pic->extended_mv << 3;
715 result.pps_info_flags |= pic->extended_dmv << 8;
716 result.pps_info_flags |= pic->dquant << 1;
717 }
718
719 result.chroma_format = 1;
720
721 #if 0
722 //(((unsigned int)(pPicParams->advance.reserved1)) << SPS_INFO_VC1_RESERVED_SHIFT)
723 uint32_t slice_count
724 uint8_t picture_type
725 uint8_t frame_coding_mode
726 uint8_t deblockEnable
727 uint8_t pquant
728 #endif
729
730 return result;
731 }
732
733 /* extract the frame number from a referenced video buffer */
734 static uint32_t get_ref_pic_idx(struct ruvd_decoder *dec, struct pipe_video_buffer *ref)
735 {
736 uint32_t min = MAX2(dec->frame_number, NUM_MPEG2_REFS) - NUM_MPEG2_REFS;
737 uint32_t max = MAX2(dec->frame_number, 1) - 1;
738 uintptr_t frame;
739
740 /* seems to be the most sane fallback */
741 if (!ref)
742 return max;
743
744 /* get the frame number from the associated data */
745 frame = (uintptr_t)vl_video_buffer_get_associated_data(ref, &dec->base);
746
747 /* limit the frame number to a valid range */
748 return MAX2(MIN2(frame, max), min);
749 }
750
751 /* get mpeg2 specific msg bits */
752 static struct ruvd_mpeg2 get_mpeg2_msg(struct ruvd_decoder *dec,
753 struct pipe_mpeg12_picture_desc *pic)
754 {
755 const int *zscan = pic->alternate_scan ? vl_zscan_alternate : vl_zscan_normal;
756 struct ruvd_mpeg2 result;
757 unsigned i;
758
759 memset(&result, 0, sizeof(result));
760 result.decoded_pic_idx = dec->frame_number;
761 for (i = 0; i < 2; ++i)
762 result.ref_pic_idx[i] = get_ref_pic_idx(dec, pic->ref[i]);
763
764 result.load_intra_quantiser_matrix = 1;
765 result.load_nonintra_quantiser_matrix = 1;
766
767 for (i = 0; i < 64; ++i) {
768 result.intra_quantiser_matrix[i] = pic->intra_matrix[zscan[i]];
769 result.nonintra_quantiser_matrix[i] = pic->non_intra_matrix[zscan[i]];
770 }
771
772 result.profile_and_level_indication = 0;
773 result.chroma_format = 0x1;
774
775 result.picture_coding_type = pic->picture_coding_type;
776 result.f_code[0][0] = pic->f_code[0][0] + 1;
777 result.f_code[0][1] = pic->f_code[0][1] + 1;
778 result.f_code[1][0] = pic->f_code[1][0] + 1;
779 result.f_code[1][1] = pic->f_code[1][1] + 1;
780 result.intra_dc_precision = pic->intra_dc_precision;
781 result.pic_structure = pic->picture_structure;
782 result.top_field_first = pic->top_field_first;
783 result.frame_pred_frame_dct = pic->frame_pred_frame_dct;
784 result.concealment_motion_vectors = pic->concealment_motion_vectors;
785 result.q_scale_type = pic->q_scale_type;
786 result.intra_vlc_format = pic->intra_vlc_format;
787 result.alternate_scan = pic->alternate_scan;
788
789 return result;
790 }
791
792 /* get mpeg4 specific msg bits */
793 static struct ruvd_mpeg4 get_mpeg4_msg(struct ruvd_decoder *dec,
794 struct pipe_mpeg4_picture_desc *pic)
795 {
796 struct ruvd_mpeg4 result;
797 unsigned i;
798
799 memset(&result, 0, sizeof(result));
800 result.decoded_pic_idx = dec->frame_number;
801 for (i = 0; i < 2; ++i)
802 result.ref_pic_idx[i] = get_ref_pic_idx(dec, pic->ref[i]);
803
804 result.variant_type = 0;
805 result.profile_and_level_indication = 0xF0; // ASP Level0
806
807 result.video_object_layer_verid = 0x5; // advanced simple
808 result.video_object_layer_shape = 0x0; // rectangular
809
810 result.video_object_layer_width = dec->base.width;
811 result.video_object_layer_height = dec->base.height;
812
813 result.vop_time_increment_resolution = pic->vop_time_increment_resolution;
814
815 result.flags |= pic->short_video_header << 0;
816 //result.flags |= obmc_disable << 1;
817 result.flags |= pic->interlaced << 2;
818 result.flags |= 1 << 3; // load_intra_quant_mat
819 result.flags |= 1 << 4; // load_nonintra_quant_mat
820 result.flags |= pic->quarter_sample << 5;
821 result.flags |= 1 << 6; // complexity_estimation_disable
822 result.flags |= pic->resync_marker_disable << 7;
823 //result.flags |= data_partitioned << 8;
824 //result.flags |= reversible_vlc << 9;
825 result.flags |= 0 << 10; // newpred_enable
826 result.flags |= 0 << 11; // reduced_resolution_vop_enable
827 //result.flags |= scalability << 12;
828 //result.flags |= is_object_layer_identifier << 13;
829 //result.flags |= fixed_vop_rate << 14;
830 //result.flags |= newpred_segment_type << 15;
831
832 result.quant_type = pic->quant_type;
833
834 for (i = 0; i < 64; ++i) {
835 result.intra_quant_mat[i] = pic->intra_matrix[vl_zscan_normal[i]];
836 result.nonintra_quant_mat[i] = pic->non_intra_matrix[vl_zscan_normal[i]];
837 }
838
839 /*
840 int32_t trd [2]
841 int32_t trb [2]
842 uint8_t vop_coding_type
843 uint8_t vop_fcode_forward
844 uint8_t vop_fcode_backward
845 uint8_t rounding_control
846 uint8_t alternate_vertical_scan_flag
847 uint8_t top_field_first
848 */
849
850 return result;
851 }
852
853 /**
854 * destroy this video decoder
855 */
856 static void ruvd_destroy(struct pipe_video_codec *decoder)
857 {
858 struct ruvd_decoder *dec = (struct ruvd_decoder*)decoder;
859 unsigned i;
860
861 assert(decoder);
862
863 map_msg_fb_it_buf(dec);
864 memset(dec->msg, 0, sizeof(*dec->msg));
865 dec->msg->size = sizeof(*dec->msg);
866 dec->msg->msg_type = RUVD_MSG_DESTROY;
867 dec->msg->stream_handle = dec->stream_handle;
868 send_msg_buf(dec);
869
870 flush(dec);
871
872 dec->ws->cs_destroy(dec->cs);
873
874 for (i = 0; i < NUM_BUFFERS; ++i) {
875 rvid_destroy_buffer(&dec->msg_fb_it_buffers[i]);
876 rvid_destroy_buffer(&dec->bs_buffers[i]);
877 }
878
879 rvid_destroy_buffer(&dec->dpb);
880 if (u_reduce_video_profile(dec->base.profile) == PIPE_VIDEO_FORMAT_HEVC)
881 rvid_destroy_buffer(&dec->ctx);
882
883 FREE(dec);
884 }
885
886 /**
887 * start decoding of a new frame
888 */
889 static void ruvd_begin_frame(struct pipe_video_codec *decoder,
890 struct pipe_video_buffer *target,
891 struct pipe_picture_desc *picture)
892 {
893 struct ruvd_decoder *dec = (struct ruvd_decoder*)decoder;
894 uintptr_t frame;
895
896 assert(decoder);
897
898 frame = ++dec->frame_number;
899 vl_video_buffer_set_associated_data(target, decoder, (void *)frame,
900 &ruvd_destroy_associated_data);
901
902 dec->bs_size = 0;
903 dec->bs_ptr = dec->ws->buffer_map(
904 dec->bs_buffers[dec->cur_buffer].res->buf,
905 dec->cs, PIPE_TRANSFER_WRITE);
906 }
907
908 /**
909 * decode a macroblock
910 */
911 static void ruvd_decode_macroblock(struct pipe_video_codec *decoder,
912 struct pipe_video_buffer *target,
913 struct pipe_picture_desc *picture,
914 const struct pipe_macroblock *macroblocks,
915 unsigned num_macroblocks)
916 {
917 /* not supported (yet) */
918 assert(0);
919 }
920
921 /**
922 * decode a bitstream
923 */
924 static void ruvd_decode_bitstream(struct pipe_video_codec *decoder,
925 struct pipe_video_buffer *target,
926 struct pipe_picture_desc *picture,
927 unsigned num_buffers,
928 const void * const *buffers,
929 const unsigned *sizes)
930 {
931 struct ruvd_decoder *dec = (struct ruvd_decoder*)decoder;
932 unsigned i;
933
934 assert(decoder);
935
936 if (!dec->bs_ptr)
937 return;
938
939 for (i = 0; i < num_buffers; ++i) {
940 struct rvid_buffer *buf = &dec->bs_buffers[dec->cur_buffer];
941 unsigned new_size = dec->bs_size + sizes[i];
942
943 if (new_size > buf->res->buf->size) {
944 dec->ws->buffer_unmap(buf->res->buf);
945 if (!rvid_resize_buffer(dec->screen, dec->cs, buf, new_size)) {
946 RVID_ERR("Can't resize bitstream buffer!");
947 return;
948 }
949
950 dec->bs_ptr = dec->ws->buffer_map(buf->res->buf, dec->cs,
951 PIPE_TRANSFER_WRITE);
952 if (!dec->bs_ptr)
953 return;
954
955 dec->bs_ptr += dec->bs_size;
956 }
957
958 memcpy(dec->bs_ptr, buffers[i], sizes[i]);
959 dec->bs_size += sizes[i];
960 dec->bs_ptr += sizes[i];
961 }
962 }
963
964 /**
965 * end decoding of the current frame
966 */
967 static void ruvd_end_frame(struct pipe_video_codec *decoder,
968 struct pipe_video_buffer *target,
969 struct pipe_picture_desc *picture)
970 {
971 struct ruvd_decoder *dec = (struct ruvd_decoder*)decoder;
972 struct pb_buffer *dt;
973 struct rvid_buffer *msg_fb_it_buf, *bs_buf;
974 unsigned bs_size;
975
976 assert(decoder);
977
978 if (!dec->bs_ptr)
979 return;
980
981 msg_fb_it_buf = &dec->msg_fb_it_buffers[dec->cur_buffer];
982 bs_buf = &dec->bs_buffers[dec->cur_buffer];
983
984 bs_size = align(dec->bs_size, 128);
985 memset(dec->bs_ptr, 0, bs_size - dec->bs_size);
986 dec->ws->buffer_unmap(bs_buf->res->buf);
987
988 map_msg_fb_it_buf(dec);
989 dec->msg->size = sizeof(*dec->msg);
990 dec->msg->msg_type = RUVD_MSG_DECODE;
991 dec->msg->stream_handle = dec->stream_handle;
992 dec->msg->status_report_feedback_number = dec->frame_number;
993
994 dec->msg->body.decode.stream_type = dec->stream_type;
995 dec->msg->body.decode.decode_flags = 0x1;
996 dec->msg->body.decode.width_in_samples = dec->base.width;
997 dec->msg->body.decode.height_in_samples = dec->base.height;
998
999 if ((picture->profile == PIPE_VIDEO_PROFILE_VC1_SIMPLE) ||
1000 (picture->profile == PIPE_VIDEO_PROFILE_VC1_MAIN)) {
1001 dec->msg->body.decode.width_in_samples = align(dec->msg->body.decode.width_in_samples, 16) / 16;
1002 dec->msg->body.decode.height_in_samples = align(dec->msg->body.decode.height_in_samples, 16) / 16;
1003 }
1004
1005 dec->msg->body.decode.dpb_size = dec->dpb.res->buf->size;
1006 dec->msg->body.decode.bsd_size = bs_size;
1007 dec->msg->body.decode.db_pitch = align(dec->base.width, 16);
1008
1009 dt = dec->set_dtb(dec->msg, (struct vl_video_buffer *)target);
1010 if (((struct r600_common_screen*)dec->screen)->family >= CHIP_STONEY)
1011 dec->msg->body.decode.dt_wa_chroma_top_offset = dec->msg->body.decode.dt_pitch / 2;
1012
1013 switch (u_reduce_video_profile(picture->profile)) {
1014 case PIPE_VIDEO_FORMAT_MPEG4_AVC:
1015 dec->msg->body.decode.codec.h264 = get_h264_msg(dec, (struct pipe_h264_picture_desc*)picture);
1016 break;
1017
1018 case PIPE_VIDEO_FORMAT_HEVC:
1019 dec->msg->body.decode.codec.h265 = get_h265_msg(dec, target, (struct pipe_h265_picture_desc*)picture);
1020 if (dec->ctx.res == NULL) {
1021 unsigned ctx_size;
1022 if (dec->base.profile == PIPE_VIDEO_PROFILE_HEVC_MAIN_10)
1023 ctx_size = calc_ctx_size_h265_main10(dec, (struct pipe_h265_picture_desc*)picture);
1024 else
1025 ctx_size = calc_ctx_size_h265_main(dec);
1026 if (!rvid_create_buffer(dec->screen, &dec->ctx, ctx_size, PIPE_USAGE_DEFAULT)) {
1027 RVID_ERR("Can't allocated context buffer.\n");
1028 }
1029 rvid_clear_buffer(decoder->context, &dec->ctx);
1030 }
1031 break;
1032
1033 case PIPE_VIDEO_FORMAT_VC1:
1034 dec->msg->body.decode.codec.vc1 = get_vc1_msg((struct pipe_vc1_picture_desc*)picture);
1035 break;
1036
1037 case PIPE_VIDEO_FORMAT_MPEG12:
1038 dec->msg->body.decode.codec.mpeg2 = get_mpeg2_msg(dec, (struct pipe_mpeg12_picture_desc*)picture);
1039 break;
1040
1041 case PIPE_VIDEO_FORMAT_MPEG4:
1042 dec->msg->body.decode.codec.mpeg4 = get_mpeg4_msg(dec, (struct pipe_mpeg4_picture_desc*)picture);
1043 break;
1044
1045 default:
1046 assert(0);
1047 return;
1048 }
1049
1050 dec->msg->body.decode.db_surf_tile_config = dec->msg->body.decode.dt_surf_tile_config;
1051 dec->msg->body.decode.extension_support = 0x1;
1052
1053 /* set at least the feedback buffer size */
1054 dec->fb[0] = dec->fb_size;
1055
1056 send_msg_buf(dec);
1057
1058 send_cmd(dec, RUVD_CMD_DPB_BUFFER, dec->dpb.res->buf, 0,
1059 RADEON_USAGE_READWRITE, RADEON_DOMAIN_VRAM);
1060 if (u_reduce_video_profile(picture->profile) == PIPE_VIDEO_FORMAT_HEVC) {
1061 send_cmd(dec, RUVD_CMD_CONTEXT_BUFFER, dec->ctx.res->buf, 0,
1062 RADEON_USAGE_READWRITE, RADEON_DOMAIN_VRAM);
1063 }
1064 send_cmd(dec, RUVD_CMD_BITSTREAM_BUFFER, bs_buf->res->buf,
1065 0, RADEON_USAGE_READ, RADEON_DOMAIN_GTT);
1066 send_cmd(dec, RUVD_CMD_DECODING_TARGET_BUFFER, dt, 0,
1067 RADEON_USAGE_WRITE, RADEON_DOMAIN_VRAM);
1068 send_cmd(dec, RUVD_CMD_FEEDBACK_BUFFER, msg_fb_it_buf->res->buf,
1069 FB_BUFFER_OFFSET, RADEON_USAGE_WRITE, RADEON_DOMAIN_GTT);
1070 if (have_it(dec))
1071 send_cmd(dec, RUVD_CMD_ITSCALING_TABLE_BUFFER, msg_fb_it_buf->res->buf,
1072 FB_BUFFER_OFFSET + dec->fb_size, RADEON_USAGE_READ, RADEON_DOMAIN_GTT);
1073 set_reg(dec, RUVD_ENGINE_CNTL, 1);
1074
1075 flush(dec);
1076 next_buffer(dec);
1077 }
1078
1079 /**
1080 * flush any outstanding command buffers to the hardware
1081 */
1082 static void ruvd_flush(struct pipe_video_codec *decoder)
1083 {
1084 }
1085
1086 /**
1087 * create and UVD decoder
1088 */
1089 struct pipe_video_codec *ruvd_create_decoder(struct pipe_context *context,
1090 const struct pipe_video_codec *templ,
1091 ruvd_set_dtb set_dtb)
1092 {
1093 struct radeon_winsys* ws = ((struct r600_common_context *)context)->ws;
1094 struct r600_common_context *rctx = (struct r600_common_context*)context;
1095 unsigned dpb_size;
1096 unsigned width = templ->width, height = templ->height;
1097 unsigned bs_buf_size;
1098 struct radeon_info info;
1099 struct ruvd_decoder *dec;
1100 int i;
1101
1102 ws->query_info(ws, &info);
1103
1104 switch(u_reduce_video_profile(templ->profile)) {
1105 case PIPE_VIDEO_FORMAT_MPEG12:
1106 if (templ->entrypoint > PIPE_VIDEO_ENTRYPOINT_BITSTREAM || info.family < CHIP_PALM)
1107 return vl_create_mpeg12_decoder(context, templ);
1108
1109 /* fall through */
1110 case PIPE_VIDEO_FORMAT_MPEG4:
1111 case PIPE_VIDEO_FORMAT_MPEG4_AVC:
1112 width = align(width, VL_MACROBLOCK_WIDTH);
1113 height = align(height, VL_MACROBLOCK_HEIGHT);
1114 break;
1115
1116 default:
1117 break;
1118 }
1119
1120
1121 dec = CALLOC_STRUCT(ruvd_decoder);
1122
1123 if (!dec)
1124 return NULL;
1125
1126 if (info.drm_major < 3)
1127 dec->use_legacy = TRUE;
1128
1129 dec->base = *templ;
1130 dec->base.context = context;
1131 dec->base.width = width;
1132 dec->base.height = height;
1133
1134 dec->base.destroy = ruvd_destroy;
1135 dec->base.begin_frame = ruvd_begin_frame;
1136 dec->base.decode_macroblock = ruvd_decode_macroblock;
1137 dec->base.decode_bitstream = ruvd_decode_bitstream;
1138 dec->base.end_frame = ruvd_end_frame;
1139 dec->base.flush = ruvd_flush;
1140
1141 dec->stream_type = profile2stream_type(dec, info.family);
1142 dec->set_dtb = set_dtb;
1143 dec->stream_handle = rvid_alloc_stream_handle();
1144 dec->screen = context->screen;
1145 dec->ws = ws;
1146 dec->cs = ws->cs_create(rctx->ctx, RING_UVD, NULL, NULL);
1147 if (!dec->cs) {
1148 RVID_ERR("Can't get command submission context.\n");
1149 goto error;
1150 }
1151
1152 dec->fb_size = (info.family == CHIP_TONGA) ? FB_BUFFER_SIZE_TONGA :
1153 FB_BUFFER_SIZE;
1154 bs_buf_size = width * height * 512 / (16 * 16);
1155 for (i = 0; i < NUM_BUFFERS; ++i) {
1156 unsigned msg_fb_it_size = FB_BUFFER_OFFSET + dec->fb_size;
1157 STATIC_ASSERT(sizeof(struct ruvd_msg) <= FB_BUFFER_OFFSET);
1158 if (have_it(dec))
1159 msg_fb_it_size += IT_SCALING_TABLE_SIZE;
1160 if (!rvid_create_buffer(dec->screen, &dec->msg_fb_it_buffers[i],
1161 msg_fb_it_size, PIPE_USAGE_STAGING)) {
1162 RVID_ERR("Can't allocated message buffers.\n");
1163 goto error;
1164 }
1165
1166 if (!rvid_create_buffer(dec->screen, &dec->bs_buffers[i],
1167 bs_buf_size, PIPE_USAGE_STAGING)) {
1168 RVID_ERR("Can't allocated bitstream buffers.\n");
1169 goto error;
1170 }
1171
1172 rvid_clear_buffer(context, &dec->msg_fb_it_buffers[i]);
1173 rvid_clear_buffer(context, &dec->bs_buffers[i]);
1174 }
1175
1176 dpb_size = calc_dpb_size(dec);
1177
1178 if (!rvid_create_buffer(dec->screen, &dec->dpb, dpb_size, PIPE_USAGE_DEFAULT)) {
1179 RVID_ERR("Can't allocated dpb.\n");
1180 goto error;
1181 }
1182
1183 rvid_clear_buffer(context, &dec->dpb);
1184
1185 map_msg_fb_it_buf(dec);
1186 dec->msg->size = sizeof(*dec->msg);
1187 dec->msg->msg_type = RUVD_MSG_CREATE;
1188 dec->msg->stream_handle = dec->stream_handle;
1189 dec->msg->body.create.stream_type = dec->stream_type;
1190 dec->msg->body.create.width_in_samples = dec->base.width;
1191 dec->msg->body.create.height_in_samples = dec->base.height;
1192 dec->msg->body.create.dpb_size = dpb_size;
1193 send_msg_buf(dec);
1194 flush(dec);
1195 next_buffer(dec);
1196
1197 return &dec->base;
1198
1199 error:
1200 if (dec->cs) dec->ws->cs_destroy(dec->cs);
1201
1202 for (i = 0; i < NUM_BUFFERS; ++i) {
1203 rvid_destroy_buffer(&dec->msg_fb_it_buffers[i]);
1204 rvid_destroy_buffer(&dec->bs_buffers[i]);
1205 }
1206
1207 rvid_destroy_buffer(&dec->dpb);
1208 if (u_reduce_video_profile(dec->base.profile) == PIPE_VIDEO_FORMAT_HEVC)
1209 rvid_destroy_buffer(&dec->ctx);
1210
1211 FREE(dec);
1212
1213 return NULL;
1214 }
1215
1216 /* calculate top/bottom offset */
1217 static unsigned texture_offset(struct radeon_surf *surface, unsigned layer)
1218 {
1219 return surface->level[0].offset +
1220 layer * surface->level[0].slice_size;
1221 }
1222
1223 /* hw encode the aspect of macro tiles */
1224 static unsigned macro_tile_aspect(unsigned macro_tile_aspect)
1225 {
1226 switch (macro_tile_aspect) {
1227 default:
1228 case 1: macro_tile_aspect = 0; break;
1229 case 2: macro_tile_aspect = 1; break;
1230 case 4: macro_tile_aspect = 2; break;
1231 case 8: macro_tile_aspect = 3; break;
1232 }
1233 return macro_tile_aspect;
1234 }
1235
1236 /* hw encode the bank width and height */
1237 static unsigned bank_wh(unsigned bankwh)
1238 {
1239 switch (bankwh) {
1240 default:
1241 case 1: bankwh = 0; break;
1242 case 2: bankwh = 1; break;
1243 case 4: bankwh = 2; break;
1244 case 8: bankwh = 3; break;
1245 }
1246 return bankwh;
1247 }
1248
1249 /**
1250 * fill decoding target field from the luma and chroma surfaces
1251 */
1252 void ruvd_set_dt_surfaces(struct ruvd_msg *msg, struct radeon_surf *luma,
1253 struct radeon_surf *chroma)
1254 {
1255 msg->body.decode.dt_pitch = luma->level[0].pitch_bytes;
1256 switch (luma->level[0].mode) {
1257 case RADEON_SURF_MODE_LINEAR_ALIGNED:
1258 msg->body.decode.dt_tiling_mode = RUVD_TILE_LINEAR;
1259 msg->body.decode.dt_array_mode = RUVD_ARRAY_MODE_LINEAR;
1260 break;
1261 case RADEON_SURF_MODE_1D:
1262 msg->body.decode.dt_tiling_mode = RUVD_TILE_8X8;
1263 msg->body.decode.dt_array_mode = RUVD_ARRAY_MODE_1D_THIN;
1264 break;
1265 case RADEON_SURF_MODE_2D:
1266 msg->body.decode.dt_tiling_mode = RUVD_TILE_8X8;
1267 msg->body.decode.dt_array_mode = RUVD_ARRAY_MODE_2D_THIN;
1268 break;
1269 default:
1270 assert(0);
1271 break;
1272 }
1273
1274 msg->body.decode.dt_luma_top_offset = texture_offset(luma, 0);
1275 msg->body.decode.dt_chroma_top_offset = texture_offset(chroma, 0);
1276 if (msg->body.decode.dt_field_mode) {
1277 msg->body.decode.dt_luma_bottom_offset = texture_offset(luma, 1);
1278 msg->body.decode.dt_chroma_bottom_offset = texture_offset(chroma, 1);
1279 } else {
1280 msg->body.decode.dt_luma_bottom_offset = msg->body.decode.dt_luma_top_offset;
1281 msg->body.decode.dt_chroma_bottom_offset = msg->body.decode.dt_chroma_top_offset;
1282 }
1283
1284 assert(luma->bankw == chroma->bankw);
1285 assert(luma->bankh == chroma->bankh);
1286 assert(luma->mtilea == chroma->mtilea);
1287
1288 msg->body.decode.dt_surf_tile_config |= RUVD_BANK_WIDTH(bank_wh(luma->bankw));
1289 msg->body.decode.dt_surf_tile_config |= RUVD_BANK_HEIGHT(bank_wh(luma->bankh));
1290 msg->body.decode.dt_surf_tile_config |= RUVD_MACRO_TILE_ASPECT_RATIO(macro_tile_aspect(luma->mtilea));
1291 }