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Merge remote-tracking branch 'public/master' into vulkan
[mesa.git] / src / gallium / drivers / radeon / radeon_uvd.c
1 /**************************************************************************
2 *
3 * Copyright 2011 Advanced Micro Devices, Inc.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28 /*
29 * Authors:
30 * Christian König <christian.koenig@amd.com>
31 *
32 */
33
34 #include <sys/types.h>
35 #include <assert.h>
36 #include <errno.h>
37 #include <unistd.h>
38 #include <stdio.h>
39
40 #include "pipe/p_video_codec.h"
41
42 #include "util/u_memory.h"
43 #include "util/u_video.h"
44
45 #include "vl/vl_defines.h"
46 #include "vl/vl_mpeg12_decoder.h"
47
48 #include "r600_pipe_common.h"
49 #include "radeon_video.h"
50 #include "radeon_uvd.h"
51
52 #define NUM_BUFFERS 4
53
54 #define NUM_MPEG2_REFS 6
55 #define NUM_H264_REFS 17
56 #define NUM_VC1_REFS 5
57
58 #define FB_BUFFER_OFFSET 0x1000
59 #define FB_BUFFER_SIZE 2048
60 #define IT_SCALING_TABLE_SIZE 992
61
62 /* UVD decoder representation */
63 struct ruvd_decoder {
64 struct pipe_video_codec base;
65
66 ruvd_set_dtb set_dtb;
67
68 unsigned stream_handle;
69 unsigned stream_type;
70 unsigned frame_number;
71
72 struct pipe_screen *screen;
73 struct radeon_winsys* ws;
74 struct radeon_winsys_cs* cs;
75
76 unsigned cur_buffer;
77
78 struct rvid_buffer msg_fb_it_buffers[NUM_BUFFERS];
79 struct ruvd_msg *msg;
80 uint32_t *fb;
81 uint8_t *it;
82
83 struct rvid_buffer bs_buffers[NUM_BUFFERS];
84 void* bs_ptr;
85 unsigned bs_size;
86
87 struct rvid_buffer dpb;
88 bool use_legacy;
89 struct rvid_buffer ctx;
90 };
91
92 /* flush IB to the hardware */
93 static void flush(struct ruvd_decoder *dec)
94 {
95 dec->ws->cs_flush(dec->cs, RADEON_FLUSH_ASYNC, NULL, 0);
96 }
97
98 /* add a new set register command to the IB */
99 static void set_reg(struct ruvd_decoder *dec, unsigned reg, uint32_t val)
100 {
101 uint32_t *pm4 = dec->cs->buf;
102 pm4[dec->cs->cdw++] = RUVD_PKT0(reg >> 2, 0);
103 pm4[dec->cs->cdw++] = val;
104 }
105
106 /* send a command to the VCPU through the GPCOM registers */
107 static void send_cmd(struct ruvd_decoder *dec, unsigned cmd,
108 struct pb_buffer* buf, uint32_t off,
109 enum radeon_bo_usage usage, enum radeon_bo_domain domain)
110 {
111 int reloc_idx;
112
113 reloc_idx = dec->ws->cs_add_buffer(dec->cs, buf, usage, domain,
114 RADEON_PRIO_UVD);
115 if (!dec->use_legacy) {
116 uint64_t addr;
117 addr = dec->ws->buffer_get_virtual_address(buf);
118 addr = addr + off;
119 set_reg(dec, RUVD_GPCOM_VCPU_DATA0, addr);
120 set_reg(dec, RUVD_GPCOM_VCPU_DATA1, addr >> 32);
121 } else {
122 set_reg(dec, RUVD_GPCOM_VCPU_DATA0, off);
123 set_reg(dec, RUVD_GPCOM_VCPU_DATA1, reloc_idx * 4);
124 }
125 set_reg(dec, RUVD_GPCOM_VCPU_CMD, cmd << 1);
126 }
127
128 /* do the codec needs an IT buffer ?*/
129 static bool have_it(struct ruvd_decoder *dec)
130 {
131 return dec->stream_type == RUVD_CODEC_H264_PERF ||
132 dec->stream_type == RUVD_CODEC_H265;
133 }
134
135 /* map the next available message/feedback/itscaling buffer */
136 static void map_msg_fb_it_buf(struct ruvd_decoder *dec)
137 {
138 struct rvid_buffer* buf;
139 uint8_t *ptr;
140
141 /* grab the current message/feedback buffer */
142 buf = &dec->msg_fb_it_buffers[dec->cur_buffer];
143
144 /* and map it for CPU access */
145 ptr = dec->ws->buffer_map(buf->res->buf, dec->cs, PIPE_TRANSFER_WRITE);
146
147 /* calc buffer offsets */
148 dec->msg = (struct ruvd_msg *)ptr;
149 dec->fb = (uint32_t *)(ptr + FB_BUFFER_OFFSET);
150 if (have_it(dec))
151 dec->it = (uint8_t *)(ptr + FB_BUFFER_OFFSET + FB_BUFFER_SIZE);
152 }
153
154 /* unmap and send a message command to the VCPU */
155 static void send_msg_buf(struct ruvd_decoder *dec)
156 {
157 struct rvid_buffer* buf;
158
159 /* ignore the request if message/feedback buffer isn't mapped */
160 if (!dec->msg || !dec->fb)
161 return;
162
163 /* grab the current message buffer */
164 buf = &dec->msg_fb_it_buffers[dec->cur_buffer];
165
166 /* unmap the buffer */
167 dec->ws->buffer_unmap(buf->res->buf);
168 dec->msg = NULL;
169 dec->fb = NULL;
170 dec->it = NULL;
171
172 /* and send it to the hardware */
173 send_cmd(dec, RUVD_CMD_MSG_BUFFER, buf->res->buf, 0,
174 RADEON_USAGE_READ, RADEON_DOMAIN_GTT);
175 }
176
177 /* cycle to the next set of buffers */
178 static void next_buffer(struct ruvd_decoder *dec)
179 {
180 ++dec->cur_buffer;
181 dec->cur_buffer %= NUM_BUFFERS;
182 }
183
184 /* convert the profile into something UVD understands */
185 static uint32_t profile2stream_type(struct ruvd_decoder *dec, unsigned family)
186 {
187 switch (u_reduce_video_profile(dec->base.profile)) {
188 case PIPE_VIDEO_FORMAT_MPEG4_AVC:
189 return (family >= CHIP_TONGA) ?
190 RUVD_CODEC_H264_PERF : RUVD_CODEC_H264;
191
192 case PIPE_VIDEO_FORMAT_VC1:
193 return RUVD_CODEC_VC1;
194
195 case PIPE_VIDEO_FORMAT_MPEG12:
196 return RUVD_CODEC_MPEG2;
197
198 case PIPE_VIDEO_FORMAT_MPEG4:
199 return RUVD_CODEC_MPEG4;
200
201 case PIPE_VIDEO_FORMAT_HEVC:
202 return RUVD_CODEC_H265;
203
204 default:
205 assert(0);
206 return 0;
207 }
208 }
209
210 static unsigned calc_ctx_size_h265_main(struct ruvd_decoder *dec)
211 {
212 unsigned width = align(dec->base.width, VL_MACROBLOCK_WIDTH);
213 unsigned height = align(dec->base.height, VL_MACROBLOCK_HEIGHT);
214
215 unsigned max_references = dec->base.max_references + 1;
216
217 if (dec->base.width * dec->base.height >= 4096*2000)
218 max_references = MAX2(max_references, 8);
219 else
220 max_references = MAX2(max_references, 17);
221
222 width = align (width, 16);
223 height = align (height, 16);
224 return ((width + 255) / 16) * ((height + 255) / 16) * 16 * max_references + 52 * 1024;
225 }
226
227 static unsigned calc_ctx_size_h265_main10(struct ruvd_decoder *dec, struct pipe_h265_picture_desc *pic)
228 {
229 unsigned block_size, log2_ctb_size, width_in_ctb, height_in_ctb, num_16x16_block_per_ctb;
230 unsigned context_buffer_size_per_ctb_row, cm_buffer_size, max_mb_address, db_left_tile_pxl_size;
231 unsigned db_left_tile_ctx_size = 4096 / 16 * (32 + 16 * 4);
232
233 unsigned width = align(dec->base.width, VL_MACROBLOCK_WIDTH);
234 unsigned height = align(dec->base.height, VL_MACROBLOCK_HEIGHT);
235 unsigned coeff_10bit = (pic->pps->sps->bit_depth_luma_minus8 || pic->pps->sps->bit_depth_chroma_minus8) ? 2 : 1;
236
237 unsigned max_references = dec->base.max_references + 1;
238
239 if (dec->base.width * dec->base.height >= 4096*2000)
240 max_references = MAX2(max_references, 8);
241 else
242 max_references = MAX2(max_references, 17);
243
244 block_size = (1 << (pic->pps->sps->log2_min_luma_coding_block_size_minus3 + 3));
245 log2_ctb_size = block_size + pic->pps->sps->log2_diff_max_min_luma_coding_block_size;
246
247 width_in_ctb = (width + ((1 << log2_ctb_size) - 1)) >> log2_ctb_size;
248 height_in_ctb = (height + ((1 << log2_ctb_size) - 1)) >> log2_ctb_size;
249
250 num_16x16_block_per_ctb = ((1 << log2_ctb_size) >> 4) * ((1 << log2_ctb_size) >> 4);
251 context_buffer_size_per_ctb_row = align(width_in_ctb * num_16x16_block_per_ctb * 16, 256);
252 max_mb_address = (unsigned) ceil(height * 8 / 2048.0);
253
254 cm_buffer_size = max_references * context_buffer_size_per_ctb_row * height_in_ctb;
255 db_left_tile_pxl_size = coeff_10bit * (max_mb_address * 2 * 2048 + 1024);
256
257 return cm_buffer_size + db_left_tile_ctx_size + db_left_tile_pxl_size;
258 }
259
260 /* calculate size of reference picture buffer */
261 static unsigned calc_dpb_size(struct ruvd_decoder *dec)
262 {
263 unsigned width_in_mb, height_in_mb, image_size, dpb_size;
264
265 // always align them to MB size for dpb calculation
266 unsigned width = align(dec->base.width, VL_MACROBLOCK_WIDTH);
267 unsigned height = align(dec->base.height, VL_MACROBLOCK_HEIGHT);
268
269 // always one more for currently decoded picture
270 unsigned max_references = dec->base.max_references + 1;
271
272 // aligned size of a single frame
273 image_size = width * height;
274 image_size += image_size / 2;
275 image_size = align(image_size, 1024);
276
277 // picture width & height in 16 pixel units
278 width_in_mb = width / VL_MACROBLOCK_WIDTH;
279 height_in_mb = align(height / VL_MACROBLOCK_HEIGHT, 2);
280
281 switch (u_reduce_video_profile(dec->base.profile)) {
282 case PIPE_VIDEO_FORMAT_MPEG4_AVC: {
283 if (!dec->use_legacy) {
284 unsigned fs_in_mb = width_in_mb * height_in_mb;
285 unsigned alignment = 64, num_dpb_buffer;
286
287 if (dec->stream_type == RUVD_CODEC_H264_PERF)
288 alignment = 256;
289 switch(dec->base.level) {
290 case 30:
291 num_dpb_buffer = 8100 / fs_in_mb;
292 break;
293 case 31:
294 num_dpb_buffer = 18000 / fs_in_mb;
295 break;
296 case 32:
297 num_dpb_buffer = 20480 / fs_in_mb;
298 break;
299 case 41:
300 num_dpb_buffer = 32768 / fs_in_mb;
301 break;
302 case 42:
303 num_dpb_buffer = 34816 / fs_in_mb;
304 break;
305 case 50:
306 num_dpb_buffer = 110400 / fs_in_mb;
307 break;
308 case 51:
309 num_dpb_buffer = 184320 / fs_in_mb;
310 break;
311 default:
312 num_dpb_buffer = 184320 / fs_in_mb;
313 break;
314 }
315 num_dpb_buffer++;
316 max_references = MAX2(MIN2(NUM_H264_REFS, num_dpb_buffer), max_references);
317 dpb_size = image_size * max_references;
318 dpb_size += max_references * align(width_in_mb * height_in_mb * 192, alignment);
319 dpb_size += align(width_in_mb * height_in_mb * 32, alignment);
320 } else {
321 // the firmware seems to allways assume a minimum of ref frames
322 max_references = MAX2(NUM_H264_REFS, max_references);
323 // reference picture buffer
324 dpb_size = image_size * max_references;
325 // macroblock context buffer
326 dpb_size += width_in_mb * height_in_mb * max_references * 192;
327 // IT surface buffer
328 dpb_size += width_in_mb * height_in_mb * 32;
329 }
330 break;
331 }
332
333 case PIPE_VIDEO_FORMAT_HEVC:
334 if (dec->base.width * dec->base.height >= 4096*2000)
335 max_references = MAX2(max_references, 8);
336 else
337 max_references = MAX2(max_references, 17);
338
339 width = align (width, 16);
340 height = align (height, 16);
341 if (dec->base.profile == PIPE_VIDEO_PROFILE_HEVC_MAIN_10)
342 dpb_size = align((width * height * 9) / 4, 256) * max_references;
343 else
344 dpb_size = align((width * height * 3) / 2, 256) * max_references;
345 break;
346
347 case PIPE_VIDEO_FORMAT_VC1:
348 // the firmware seems to allways assume a minimum of ref frames
349 max_references = MAX2(NUM_VC1_REFS, max_references);
350
351 // reference picture buffer
352 dpb_size = image_size * max_references;
353
354 // CONTEXT_BUFFER
355 dpb_size += width_in_mb * height_in_mb * 128;
356
357 // IT surface buffer
358 dpb_size += width_in_mb * 64;
359
360 // DB surface buffer
361 dpb_size += width_in_mb * 128;
362
363 // BP
364 dpb_size += align(MAX2(width_in_mb, height_in_mb) * 7 * 16, 64);
365 break;
366
367 case PIPE_VIDEO_FORMAT_MPEG12:
368 // reference picture buffer, must be big enough for all frames
369 dpb_size = image_size * NUM_MPEG2_REFS;
370 break;
371
372 case PIPE_VIDEO_FORMAT_MPEG4:
373 // reference picture buffer
374 dpb_size = image_size * max_references;
375
376 // CM
377 dpb_size += width_in_mb * height_in_mb * 64;
378
379 // IT surface buffer
380 dpb_size += align(width_in_mb * height_in_mb * 32, 64);
381
382 dpb_size = MAX2(dpb_size, 30 * 1024 * 1024);
383 break;
384
385 default:
386 // something is missing here
387 assert(0);
388
389 // at least use a sane default value
390 dpb_size = 32 * 1024 * 1024;
391 break;
392 }
393 return dpb_size;
394 }
395
396 /* free associated data in the video buffer callback */
397 static void ruvd_destroy_associated_data(void *data)
398 {
399 /* NOOP, since we only use an intptr */
400 }
401
402 /* get h264 specific message bits */
403 static struct ruvd_h264 get_h264_msg(struct ruvd_decoder *dec, struct pipe_h264_picture_desc *pic)
404 {
405 struct ruvd_h264 result;
406
407 memset(&result, 0, sizeof(result));
408 switch (pic->base.profile) {
409 case PIPE_VIDEO_PROFILE_MPEG4_AVC_BASELINE:
410 result.profile = RUVD_H264_PROFILE_BASELINE;
411 break;
412
413 case PIPE_VIDEO_PROFILE_MPEG4_AVC_MAIN:
414 result.profile = RUVD_H264_PROFILE_MAIN;
415 break;
416
417 case PIPE_VIDEO_PROFILE_MPEG4_AVC_HIGH:
418 result.profile = RUVD_H264_PROFILE_HIGH;
419 break;
420
421 default:
422 assert(0);
423 break;
424 }
425
426 result.level = dec->base.level;
427
428 result.sps_info_flags = 0;
429 result.sps_info_flags |= pic->pps->sps->direct_8x8_inference_flag << 0;
430 result.sps_info_flags |= pic->pps->sps->mb_adaptive_frame_field_flag << 1;
431 result.sps_info_flags |= pic->pps->sps->frame_mbs_only_flag << 2;
432 result.sps_info_flags |= pic->pps->sps->delta_pic_order_always_zero_flag << 3;
433
434 result.bit_depth_luma_minus8 = pic->pps->sps->bit_depth_luma_minus8;
435 result.bit_depth_chroma_minus8 = pic->pps->sps->bit_depth_chroma_minus8;
436 result.log2_max_frame_num_minus4 = pic->pps->sps->log2_max_frame_num_minus4;
437 result.pic_order_cnt_type = pic->pps->sps->pic_order_cnt_type;
438 result.log2_max_pic_order_cnt_lsb_minus4 = pic->pps->sps->log2_max_pic_order_cnt_lsb_minus4;
439
440 switch (dec->base.chroma_format) {
441 case PIPE_VIDEO_CHROMA_FORMAT_NONE:
442 /* TODO: assert? */
443 break;
444 case PIPE_VIDEO_CHROMA_FORMAT_400:
445 result.chroma_format = 0;
446 break;
447 case PIPE_VIDEO_CHROMA_FORMAT_420:
448 result.chroma_format = 1;
449 break;
450 case PIPE_VIDEO_CHROMA_FORMAT_422:
451 result.chroma_format = 2;
452 break;
453 case PIPE_VIDEO_CHROMA_FORMAT_444:
454 result.chroma_format = 3;
455 break;
456 }
457
458 result.pps_info_flags = 0;
459 result.pps_info_flags |= pic->pps->transform_8x8_mode_flag << 0;
460 result.pps_info_flags |= pic->pps->redundant_pic_cnt_present_flag << 1;
461 result.pps_info_flags |= pic->pps->constrained_intra_pred_flag << 2;
462 result.pps_info_flags |= pic->pps->deblocking_filter_control_present_flag << 3;
463 result.pps_info_flags |= pic->pps->weighted_bipred_idc << 4;
464 result.pps_info_flags |= pic->pps->weighted_pred_flag << 6;
465 result.pps_info_flags |= pic->pps->bottom_field_pic_order_in_frame_present_flag << 7;
466 result.pps_info_flags |= pic->pps->entropy_coding_mode_flag << 8;
467
468 result.num_slice_groups_minus1 = pic->pps->num_slice_groups_minus1;
469 result.slice_group_map_type = pic->pps->slice_group_map_type;
470 result.slice_group_change_rate_minus1 = pic->pps->slice_group_change_rate_minus1;
471 result.pic_init_qp_minus26 = pic->pps->pic_init_qp_minus26;
472 result.chroma_qp_index_offset = pic->pps->chroma_qp_index_offset;
473 result.second_chroma_qp_index_offset = pic->pps->second_chroma_qp_index_offset;
474
475 memcpy(result.scaling_list_4x4, pic->pps->ScalingList4x4, 6*16);
476 memcpy(result.scaling_list_8x8, pic->pps->ScalingList8x8, 2*64);
477
478 if (dec->stream_type == RUVD_CODEC_H264_PERF) {
479 memcpy(dec->it, result.scaling_list_4x4, 6*16);
480 memcpy((dec->it + 96), result.scaling_list_8x8, 2*64);
481 }
482
483 result.num_ref_frames = pic->num_ref_frames;
484
485 result.num_ref_idx_l0_active_minus1 = pic->num_ref_idx_l0_active_minus1;
486 result.num_ref_idx_l1_active_minus1 = pic->num_ref_idx_l1_active_minus1;
487
488 result.frame_num = pic->frame_num;
489 memcpy(result.frame_num_list, pic->frame_num_list, 4*16);
490 result.curr_field_order_cnt_list[0] = pic->field_order_cnt[0];
491 result.curr_field_order_cnt_list[1] = pic->field_order_cnt[1];
492 memcpy(result.field_order_cnt_list, pic->field_order_cnt_list, 4*16*2);
493
494 result.decoded_pic_idx = pic->frame_num;
495
496 return result;
497 }
498
499 /* get h265 specific message bits */
500 static struct ruvd_h265 get_h265_msg(struct ruvd_decoder *dec, struct pipe_video_buffer *target,
501 struct pipe_h265_picture_desc *pic)
502 {
503 struct ruvd_h265 result;
504 unsigned i;
505
506 memset(&result, 0, sizeof(result));
507
508 result.sps_info_flags = 0;
509 result.sps_info_flags |= pic->pps->sps->scaling_list_enabled_flag << 0;
510 result.sps_info_flags |= pic->pps->sps->amp_enabled_flag << 1;
511 result.sps_info_flags |= pic->pps->sps->sample_adaptive_offset_enabled_flag << 2;
512 result.sps_info_flags |= pic->pps->sps->pcm_enabled_flag << 3;
513 result.sps_info_flags |= pic->pps->sps->pcm_loop_filter_disabled_flag << 4;
514 result.sps_info_flags |= pic->pps->sps->long_term_ref_pics_present_flag << 5;
515 result.sps_info_flags |= pic->pps->sps->sps_temporal_mvp_enabled_flag << 6;
516 result.sps_info_flags |= pic->pps->sps->strong_intra_smoothing_enabled_flag << 7;
517 result.sps_info_flags |= pic->pps->sps->separate_colour_plane_flag << 8;
518 if (((struct r600_common_screen*)dec->screen)->family == CHIP_CARRIZO)
519 result.sps_info_flags |= 1 << 9;
520 if (pic->UseRefPicList == true)
521 result.sps_info_flags |= 1 << 10;
522
523 result.chroma_format = pic->pps->sps->chroma_format_idc;
524 result.bit_depth_luma_minus8 = pic->pps->sps->bit_depth_luma_minus8;
525 result.bit_depth_chroma_minus8 = pic->pps->sps->bit_depth_chroma_minus8;
526 result.log2_max_pic_order_cnt_lsb_minus4 = pic->pps->sps->log2_max_pic_order_cnt_lsb_minus4;
527 result.sps_max_dec_pic_buffering_minus1 = pic->pps->sps->sps_max_dec_pic_buffering_minus1;
528 result.log2_min_luma_coding_block_size_minus3 = pic->pps->sps->log2_min_luma_coding_block_size_minus3;
529 result.log2_diff_max_min_luma_coding_block_size = pic->pps->sps->log2_diff_max_min_luma_coding_block_size;
530 result.log2_min_transform_block_size_minus2 = pic->pps->sps->log2_min_transform_block_size_minus2;
531 result.log2_diff_max_min_transform_block_size = pic->pps->sps->log2_diff_max_min_transform_block_size;
532 result.max_transform_hierarchy_depth_inter = pic->pps->sps->max_transform_hierarchy_depth_inter;
533 result.max_transform_hierarchy_depth_intra = pic->pps->sps->max_transform_hierarchy_depth_intra;
534 result.pcm_sample_bit_depth_luma_minus1 = pic->pps->sps->pcm_sample_bit_depth_luma_minus1;
535 result.pcm_sample_bit_depth_chroma_minus1 = pic->pps->sps->pcm_sample_bit_depth_chroma_minus1;
536 result.log2_min_pcm_luma_coding_block_size_minus3 = pic->pps->sps->log2_min_pcm_luma_coding_block_size_minus3;
537 result.log2_diff_max_min_pcm_luma_coding_block_size = pic->pps->sps->log2_diff_max_min_pcm_luma_coding_block_size;
538 result.num_short_term_ref_pic_sets = pic->pps->sps->num_short_term_ref_pic_sets;
539
540 result.pps_info_flags = 0;
541 result.pps_info_flags |= pic->pps->dependent_slice_segments_enabled_flag << 0;
542 result.pps_info_flags |= pic->pps->output_flag_present_flag << 1;
543 result.pps_info_flags |= pic->pps->sign_data_hiding_enabled_flag << 2;
544 result.pps_info_flags |= pic->pps->cabac_init_present_flag << 3;
545 result.pps_info_flags |= pic->pps->constrained_intra_pred_flag << 4;
546 result.pps_info_flags |= pic->pps->transform_skip_enabled_flag << 5;
547 result.pps_info_flags |= pic->pps->cu_qp_delta_enabled_flag << 6;
548 result.pps_info_flags |= pic->pps->pps_slice_chroma_qp_offsets_present_flag << 7;
549 result.pps_info_flags |= pic->pps->weighted_pred_flag << 8;
550 result.pps_info_flags |= pic->pps->weighted_bipred_flag << 9;
551 result.pps_info_flags |= pic->pps->transquant_bypass_enabled_flag << 10;
552 result.pps_info_flags |= pic->pps->tiles_enabled_flag << 11;
553 result.pps_info_flags |= pic->pps->entropy_coding_sync_enabled_flag << 12;
554 result.pps_info_flags |= pic->pps->uniform_spacing_flag << 13;
555 result.pps_info_flags |= pic->pps->loop_filter_across_tiles_enabled_flag << 14;
556 result.pps_info_flags |= pic->pps->pps_loop_filter_across_slices_enabled_flag << 15;
557 result.pps_info_flags |= pic->pps->deblocking_filter_override_enabled_flag << 16;
558 result.pps_info_flags |= pic->pps->pps_deblocking_filter_disabled_flag << 17;
559 result.pps_info_flags |= pic->pps->lists_modification_present_flag << 18;
560 result.pps_info_flags |= pic->pps->slice_segment_header_extension_present_flag << 19;
561 //result.pps_info_flags |= pic->pps->deblocking_filter_control_present_flag; ???
562
563 result.num_extra_slice_header_bits = pic->pps->num_extra_slice_header_bits;
564 result.num_long_term_ref_pic_sps = pic->pps->sps->num_long_term_ref_pics_sps;
565 result.num_ref_idx_l0_default_active_minus1 = pic->pps->num_ref_idx_l0_default_active_minus1;
566 result.num_ref_idx_l1_default_active_minus1 = pic->pps->num_ref_idx_l1_default_active_minus1;
567 result.pps_cb_qp_offset = pic->pps->pps_cb_qp_offset;
568 result.pps_cr_qp_offset = pic->pps->pps_cr_qp_offset;
569 result.pps_beta_offset_div2 = pic->pps->pps_beta_offset_div2;
570 result.pps_tc_offset_div2 = pic->pps->pps_tc_offset_div2;
571 result.diff_cu_qp_delta_depth = pic->pps->diff_cu_qp_delta_depth;
572 result.num_tile_columns_minus1 = pic->pps->num_tile_columns_minus1;
573 result.num_tile_rows_minus1 = pic->pps->num_tile_rows_minus1;
574 result.log2_parallel_merge_level_minus2 = pic->pps->log2_parallel_merge_level_minus2;
575 result.init_qp_minus26 = pic->pps->init_qp_minus26;
576
577 for (i = 0; i < 19; ++i)
578 result.column_width_minus1[i] = pic->pps->column_width_minus1[i];
579
580 for (i = 0; i < 21; ++i)
581 result.row_height_minus1[i] = pic->pps->row_height_minus1[i];
582
583 result.num_delta_pocs_ref_rps_idx = pic->NumDeltaPocsOfRefRpsIdx;
584 result.curr_idx = pic->CurrPicOrderCntVal;
585 result.curr_poc = pic->CurrPicOrderCntVal;
586
587 vl_video_buffer_set_associated_data(target, &dec->base,
588 (void *)(uintptr_t)pic->CurrPicOrderCntVal,
589 &ruvd_destroy_associated_data);
590
591 for (i = 0; i < 16; ++i) {
592 struct pipe_video_buffer *ref = pic->ref[i];
593 uintptr_t ref_pic = 0;
594
595 result.poc_list[i] = pic->PicOrderCntVal[i];
596
597 if (ref)
598 ref_pic = (uintptr_t)vl_video_buffer_get_associated_data(ref, &dec->base);
599 else
600 ref_pic = 0x7F;
601 result.ref_pic_list[i] = ref_pic;
602 }
603
604 for (i = 0; i < 8; ++i) {
605 result.ref_pic_set_st_curr_before[i] = 0xFF;
606 result.ref_pic_set_st_curr_after[i] = 0xFF;
607 result.ref_pic_set_lt_curr[i] = 0xFF;
608 }
609
610 for (i = 0; i < pic->NumPocStCurrBefore; ++i)
611 result.ref_pic_set_st_curr_before[i] = pic->RefPicSetStCurrBefore[i];
612
613 for (i = 0; i < pic->NumPocStCurrAfter; ++i)
614 result.ref_pic_set_st_curr_after[i] = pic->RefPicSetStCurrAfter[i];
615
616 for (i = 0; i < pic->NumPocLtCurr; ++i)
617 result.ref_pic_set_lt_curr[i] = pic->RefPicSetLtCurr[i];
618
619 for (i = 0; i < 6; ++i)
620 result.ucScalingListDCCoefSizeID2[i] = pic->pps->sps->ScalingListDCCoeff16x16[i];
621
622 for (i = 0; i < 2; ++i)
623 result.ucScalingListDCCoefSizeID3[i] = pic->pps->sps->ScalingListDCCoeff32x32[i];
624
625 memcpy(dec->it, pic->pps->sps->ScalingList4x4, 6 * 16);
626 memcpy(dec->it + 96, pic->pps->sps->ScalingList8x8, 6 * 64);
627 memcpy(dec->it + 480, pic->pps->sps->ScalingList16x16, 6 * 64);
628 memcpy(dec->it + 864, pic->pps->sps->ScalingList32x32, 2 * 64);
629
630 for (i = 0 ; i < 2 ; i++) {
631 for (int j = 0 ; j < 15 ; j++)
632 result.direct_reflist[i][j] = pic->RefPicList[i][j];
633 }
634
635 if ((pic->base.profile == PIPE_VIDEO_PROFILE_HEVC_MAIN_10) &&
636 (target->buffer_format == PIPE_FORMAT_NV12)) {
637 result.p010_mode = 0;
638 result.luma_10to8 = 5;
639 result.chroma_10to8 = 5;
640 result.sclr_luma10to8 = 4;
641 result.sclr_chroma10to8 = 4;
642 }
643
644 /* TODO
645 result.highestTid;
646 result.isNonRef;
647
648 IDRPicFlag;
649 RAPPicFlag;
650 NumPocTotalCurr;
651 NumShortTermPictureSliceHeaderBits;
652 NumLongTermPictureSliceHeaderBits;
653
654 IsLongTerm[16];
655 */
656
657 return result;
658 }
659
660 /* get vc1 specific message bits */
661 static struct ruvd_vc1 get_vc1_msg(struct pipe_vc1_picture_desc *pic)
662 {
663 struct ruvd_vc1 result;
664
665 memset(&result, 0, sizeof(result));
666
667 switch(pic->base.profile) {
668 case PIPE_VIDEO_PROFILE_VC1_SIMPLE:
669 result.profile = RUVD_VC1_PROFILE_SIMPLE;
670 result.level = 1;
671 break;
672
673 case PIPE_VIDEO_PROFILE_VC1_MAIN:
674 result.profile = RUVD_VC1_PROFILE_MAIN;
675 result.level = 2;
676 break;
677
678 case PIPE_VIDEO_PROFILE_VC1_ADVANCED:
679 result.profile = RUVD_VC1_PROFILE_ADVANCED;
680 result.level = 4;
681 break;
682
683 default:
684 assert(0);
685 }
686
687 /* fields common for all profiles */
688 result.sps_info_flags |= pic->postprocflag << 7;
689 result.sps_info_flags |= pic->pulldown << 6;
690 result.sps_info_flags |= pic->interlace << 5;
691 result.sps_info_flags |= pic->tfcntrflag << 4;
692 result.sps_info_flags |= pic->finterpflag << 3;
693 result.sps_info_flags |= pic->psf << 1;
694
695 result.pps_info_flags |= pic->range_mapy_flag << 31;
696 result.pps_info_flags |= pic->range_mapy << 28;
697 result.pps_info_flags |= pic->range_mapuv_flag << 27;
698 result.pps_info_flags |= pic->range_mapuv << 24;
699 result.pps_info_flags |= pic->multires << 21;
700 result.pps_info_flags |= pic->maxbframes << 16;
701 result.pps_info_flags |= pic->overlap << 11;
702 result.pps_info_flags |= pic->quantizer << 9;
703 result.pps_info_flags |= pic->panscan_flag << 7;
704 result.pps_info_flags |= pic->refdist_flag << 6;
705 result.pps_info_flags |= pic->vstransform << 0;
706
707 /* some fields only apply to main/advanced profile */
708 if (pic->base.profile != PIPE_VIDEO_PROFILE_VC1_SIMPLE) {
709 result.pps_info_flags |= pic->syncmarker << 20;
710 result.pps_info_flags |= pic->rangered << 19;
711 result.pps_info_flags |= pic->loopfilter << 5;
712 result.pps_info_flags |= pic->fastuvmc << 4;
713 result.pps_info_flags |= pic->extended_mv << 3;
714 result.pps_info_flags |= pic->extended_dmv << 8;
715 result.pps_info_flags |= pic->dquant << 1;
716 }
717
718 result.chroma_format = 1;
719
720 #if 0
721 //(((unsigned int)(pPicParams->advance.reserved1)) << SPS_INFO_VC1_RESERVED_SHIFT)
722 uint32_t slice_count
723 uint8_t picture_type
724 uint8_t frame_coding_mode
725 uint8_t deblockEnable
726 uint8_t pquant
727 #endif
728
729 return result;
730 }
731
732 /* extract the frame number from a referenced video buffer */
733 static uint32_t get_ref_pic_idx(struct ruvd_decoder *dec, struct pipe_video_buffer *ref)
734 {
735 uint32_t min = MAX2(dec->frame_number, NUM_MPEG2_REFS) - NUM_MPEG2_REFS;
736 uint32_t max = MAX2(dec->frame_number, 1) - 1;
737 uintptr_t frame;
738
739 /* seems to be the most sane fallback */
740 if (!ref)
741 return max;
742
743 /* get the frame number from the associated data */
744 frame = (uintptr_t)vl_video_buffer_get_associated_data(ref, &dec->base);
745
746 /* limit the frame number to a valid range */
747 return MAX2(MIN2(frame, max), min);
748 }
749
750 /* get mpeg2 specific msg bits */
751 static struct ruvd_mpeg2 get_mpeg2_msg(struct ruvd_decoder *dec,
752 struct pipe_mpeg12_picture_desc *pic)
753 {
754 const int *zscan = pic->alternate_scan ? vl_zscan_alternate : vl_zscan_normal;
755 struct ruvd_mpeg2 result;
756 unsigned i;
757
758 memset(&result, 0, sizeof(result));
759 result.decoded_pic_idx = dec->frame_number;
760 for (i = 0; i < 2; ++i)
761 result.ref_pic_idx[i] = get_ref_pic_idx(dec, pic->ref[i]);
762
763 result.load_intra_quantiser_matrix = 1;
764 result.load_nonintra_quantiser_matrix = 1;
765
766 for (i = 0; i < 64; ++i) {
767 result.intra_quantiser_matrix[i] = pic->intra_matrix[zscan[i]];
768 result.nonintra_quantiser_matrix[i] = pic->non_intra_matrix[zscan[i]];
769 }
770
771 result.profile_and_level_indication = 0;
772 result.chroma_format = 0x1;
773
774 result.picture_coding_type = pic->picture_coding_type;
775 result.f_code[0][0] = pic->f_code[0][0] + 1;
776 result.f_code[0][1] = pic->f_code[0][1] + 1;
777 result.f_code[1][0] = pic->f_code[1][0] + 1;
778 result.f_code[1][1] = pic->f_code[1][1] + 1;
779 result.intra_dc_precision = pic->intra_dc_precision;
780 result.pic_structure = pic->picture_structure;
781 result.top_field_first = pic->top_field_first;
782 result.frame_pred_frame_dct = pic->frame_pred_frame_dct;
783 result.concealment_motion_vectors = pic->concealment_motion_vectors;
784 result.q_scale_type = pic->q_scale_type;
785 result.intra_vlc_format = pic->intra_vlc_format;
786 result.alternate_scan = pic->alternate_scan;
787
788 return result;
789 }
790
791 /* get mpeg4 specific msg bits */
792 static struct ruvd_mpeg4 get_mpeg4_msg(struct ruvd_decoder *dec,
793 struct pipe_mpeg4_picture_desc *pic)
794 {
795 struct ruvd_mpeg4 result;
796 unsigned i;
797
798 memset(&result, 0, sizeof(result));
799 result.decoded_pic_idx = dec->frame_number;
800 for (i = 0; i < 2; ++i)
801 result.ref_pic_idx[i] = get_ref_pic_idx(dec, pic->ref[i]);
802
803 result.variant_type = 0;
804 result.profile_and_level_indication = 0xF0; // ASP Level0
805
806 result.video_object_layer_verid = 0x5; // advanced simple
807 result.video_object_layer_shape = 0x0; // rectangular
808
809 result.video_object_layer_width = dec->base.width;
810 result.video_object_layer_height = dec->base.height;
811
812 result.vop_time_increment_resolution = pic->vop_time_increment_resolution;
813
814 result.flags |= pic->short_video_header << 0;
815 //result.flags |= obmc_disable << 1;
816 result.flags |= pic->interlaced << 2;
817 result.flags |= 1 << 3; // load_intra_quant_mat
818 result.flags |= 1 << 4; // load_nonintra_quant_mat
819 result.flags |= pic->quarter_sample << 5;
820 result.flags |= 1 << 6; // complexity_estimation_disable
821 result.flags |= pic->resync_marker_disable << 7;
822 //result.flags |= data_partitioned << 8;
823 //result.flags |= reversible_vlc << 9;
824 result.flags |= 0 << 10; // newpred_enable
825 result.flags |= 0 << 11; // reduced_resolution_vop_enable
826 //result.flags |= scalability << 12;
827 //result.flags |= is_object_layer_identifier << 13;
828 //result.flags |= fixed_vop_rate << 14;
829 //result.flags |= newpred_segment_type << 15;
830
831 result.quant_type = pic->quant_type;
832
833 for (i = 0; i < 64; ++i) {
834 result.intra_quant_mat[i] = pic->intra_matrix[vl_zscan_normal[i]];
835 result.nonintra_quant_mat[i] = pic->non_intra_matrix[vl_zscan_normal[i]];
836 }
837
838 /*
839 int32_t trd [2]
840 int32_t trb [2]
841 uint8_t vop_coding_type
842 uint8_t vop_fcode_forward
843 uint8_t vop_fcode_backward
844 uint8_t rounding_control
845 uint8_t alternate_vertical_scan_flag
846 uint8_t top_field_first
847 */
848
849 return result;
850 }
851
852 /**
853 * destroy this video decoder
854 */
855 static void ruvd_destroy(struct pipe_video_codec *decoder)
856 {
857 struct ruvd_decoder *dec = (struct ruvd_decoder*)decoder;
858 unsigned i;
859
860 assert(decoder);
861
862 map_msg_fb_it_buf(dec);
863 memset(dec->msg, 0, sizeof(*dec->msg));
864 dec->msg->size = sizeof(*dec->msg);
865 dec->msg->msg_type = RUVD_MSG_DESTROY;
866 dec->msg->stream_handle = dec->stream_handle;
867 send_msg_buf(dec);
868
869 flush(dec);
870
871 dec->ws->cs_destroy(dec->cs);
872
873 for (i = 0; i < NUM_BUFFERS; ++i) {
874 rvid_destroy_buffer(&dec->msg_fb_it_buffers[i]);
875 rvid_destroy_buffer(&dec->bs_buffers[i]);
876 }
877
878 rvid_destroy_buffer(&dec->dpb);
879 if (u_reduce_video_profile(dec->base.profile) == PIPE_VIDEO_FORMAT_HEVC)
880 rvid_destroy_buffer(&dec->ctx);
881
882 FREE(dec);
883 }
884
885 /**
886 * start decoding of a new frame
887 */
888 static void ruvd_begin_frame(struct pipe_video_codec *decoder,
889 struct pipe_video_buffer *target,
890 struct pipe_picture_desc *picture)
891 {
892 struct ruvd_decoder *dec = (struct ruvd_decoder*)decoder;
893 uintptr_t frame;
894
895 assert(decoder);
896
897 frame = ++dec->frame_number;
898 vl_video_buffer_set_associated_data(target, decoder, (void *)frame,
899 &ruvd_destroy_associated_data);
900
901 dec->bs_size = 0;
902 dec->bs_ptr = dec->ws->buffer_map(
903 dec->bs_buffers[dec->cur_buffer].res->buf,
904 dec->cs, PIPE_TRANSFER_WRITE);
905 }
906
907 /**
908 * decode a macroblock
909 */
910 static void ruvd_decode_macroblock(struct pipe_video_codec *decoder,
911 struct pipe_video_buffer *target,
912 struct pipe_picture_desc *picture,
913 const struct pipe_macroblock *macroblocks,
914 unsigned num_macroblocks)
915 {
916 /* not supported (yet) */
917 assert(0);
918 }
919
920 /**
921 * decode a bitstream
922 */
923 static void ruvd_decode_bitstream(struct pipe_video_codec *decoder,
924 struct pipe_video_buffer *target,
925 struct pipe_picture_desc *picture,
926 unsigned num_buffers,
927 const void * const *buffers,
928 const unsigned *sizes)
929 {
930 struct ruvd_decoder *dec = (struct ruvd_decoder*)decoder;
931 unsigned i;
932
933 assert(decoder);
934
935 if (!dec->bs_ptr)
936 return;
937
938 for (i = 0; i < num_buffers; ++i) {
939 struct rvid_buffer *buf = &dec->bs_buffers[dec->cur_buffer];
940 unsigned new_size = dec->bs_size + sizes[i];
941
942 if (new_size > buf->res->buf->size) {
943 dec->ws->buffer_unmap(buf->res->buf);
944 if (!rvid_resize_buffer(dec->screen, dec->cs, buf, new_size)) {
945 RVID_ERR("Can't resize bitstream buffer!");
946 return;
947 }
948
949 dec->bs_ptr = dec->ws->buffer_map(buf->res->buf, dec->cs,
950 PIPE_TRANSFER_WRITE);
951 if (!dec->bs_ptr)
952 return;
953
954 dec->bs_ptr += dec->bs_size;
955 }
956
957 memcpy(dec->bs_ptr, buffers[i], sizes[i]);
958 dec->bs_size += sizes[i];
959 dec->bs_ptr += sizes[i];
960 }
961 }
962
963 /**
964 * end decoding of the current frame
965 */
966 static void ruvd_end_frame(struct pipe_video_codec *decoder,
967 struct pipe_video_buffer *target,
968 struct pipe_picture_desc *picture)
969 {
970 struct ruvd_decoder *dec = (struct ruvd_decoder*)decoder;
971 struct pb_buffer *dt;
972 struct rvid_buffer *msg_fb_it_buf, *bs_buf;
973 unsigned bs_size;
974
975 assert(decoder);
976
977 if (!dec->bs_ptr)
978 return;
979
980 msg_fb_it_buf = &dec->msg_fb_it_buffers[dec->cur_buffer];
981 bs_buf = &dec->bs_buffers[dec->cur_buffer];
982
983 bs_size = align(dec->bs_size, 128);
984 memset(dec->bs_ptr, 0, bs_size - dec->bs_size);
985 dec->ws->buffer_unmap(bs_buf->res->buf);
986
987 map_msg_fb_it_buf(dec);
988 dec->msg->size = sizeof(*dec->msg);
989 dec->msg->msg_type = RUVD_MSG_DECODE;
990 dec->msg->stream_handle = dec->stream_handle;
991 dec->msg->status_report_feedback_number = dec->frame_number;
992
993 dec->msg->body.decode.stream_type = dec->stream_type;
994 dec->msg->body.decode.decode_flags = 0x1;
995 dec->msg->body.decode.width_in_samples = dec->base.width;
996 dec->msg->body.decode.height_in_samples = dec->base.height;
997
998 if ((picture->profile == PIPE_VIDEO_PROFILE_VC1_SIMPLE) ||
999 (picture->profile == PIPE_VIDEO_PROFILE_VC1_MAIN)) {
1000 dec->msg->body.decode.width_in_samples = align(dec->msg->body.decode.width_in_samples, 16) / 16;
1001 dec->msg->body.decode.height_in_samples = align(dec->msg->body.decode.height_in_samples, 16) / 16;
1002 }
1003
1004 dec->msg->body.decode.dpb_size = dec->dpb.res->buf->size;
1005 dec->msg->body.decode.bsd_size = bs_size;
1006 dec->msg->body.decode.db_pitch = dec->base.width;
1007
1008 dt = dec->set_dtb(dec->msg, (struct vl_video_buffer *)target);
1009 if (((struct r600_common_screen*)dec->screen)->family >= CHIP_STONEY)
1010 dec->msg->body.decode.dt_wa_chroma_top_offset = dec->msg->body.decode.dt_pitch / 2;
1011
1012 switch (u_reduce_video_profile(picture->profile)) {
1013 case PIPE_VIDEO_FORMAT_MPEG4_AVC:
1014 dec->msg->body.decode.codec.h264 = get_h264_msg(dec, (struct pipe_h264_picture_desc*)picture);
1015 break;
1016
1017 case PIPE_VIDEO_FORMAT_HEVC:
1018 dec->msg->body.decode.codec.h265 = get_h265_msg(dec, target, (struct pipe_h265_picture_desc*)picture);
1019 if (dec->ctx.res == NULL) {
1020 unsigned ctx_size;
1021 if (dec->base.profile == PIPE_VIDEO_PROFILE_HEVC_MAIN_10)
1022 ctx_size = calc_ctx_size_h265_main10(dec, (struct pipe_h265_picture_desc*)picture);
1023 else
1024 ctx_size = calc_ctx_size_h265_main(dec);
1025 if (!rvid_create_buffer(dec->screen, &dec->ctx, ctx_size, PIPE_USAGE_DEFAULT)) {
1026 RVID_ERR("Can't allocated context buffer.\n");
1027 }
1028 rvid_clear_buffer(decoder->context, &dec->ctx);
1029 }
1030 break;
1031
1032 case PIPE_VIDEO_FORMAT_VC1:
1033 dec->msg->body.decode.codec.vc1 = get_vc1_msg((struct pipe_vc1_picture_desc*)picture);
1034 break;
1035
1036 case PIPE_VIDEO_FORMAT_MPEG12:
1037 dec->msg->body.decode.codec.mpeg2 = get_mpeg2_msg(dec, (struct pipe_mpeg12_picture_desc*)picture);
1038 break;
1039
1040 case PIPE_VIDEO_FORMAT_MPEG4:
1041 dec->msg->body.decode.codec.mpeg4 = get_mpeg4_msg(dec, (struct pipe_mpeg4_picture_desc*)picture);
1042 break;
1043
1044 default:
1045 assert(0);
1046 return;
1047 }
1048
1049 dec->msg->body.decode.db_surf_tile_config = dec->msg->body.decode.dt_surf_tile_config;
1050 dec->msg->body.decode.extension_support = 0x1;
1051
1052 /* set at least the feedback buffer size */
1053 dec->fb[0] = FB_BUFFER_SIZE;
1054
1055 send_msg_buf(dec);
1056
1057 send_cmd(dec, RUVD_CMD_DPB_BUFFER, dec->dpb.res->buf, 0,
1058 RADEON_USAGE_READWRITE, RADEON_DOMAIN_VRAM);
1059 if (u_reduce_video_profile(picture->profile) == PIPE_VIDEO_FORMAT_HEVC) {
1060 send_cmd(dec, RUVD_CMD_CONTEXT_BUFFER, dec->ctx.res->buf, 0,
1061 RADEON_USAGE_READWRITE, RADEON_DOMAIN_VRAM);
1062 }
1063 send_cmd(dec, RUVD_CMD_BITSTREAM_BUFFER, bs_buf->res->buf,
1064 0, RADEON_USAGE_READ, RADEON_DOMAIN_GTT);
1065 send_cmd(dec, RUVD_CMD_DECODING_TARGET_BUFFER, dt, 0,
1066 RADEON_USAGE_WRITE, RADEON_DOMAIN_VRAM);
1067 send_cmd(dec, RUVD_CMD_FEEDBACK_BUFFER, msg_fb_it_buf->res->buf,
1068 FB_BUFFER_OFFSET, RADEON_USAGE_WRITE, RADEON_DOMAIN_GTT);
1069 if (have_it(dec))
1070 send_cmd(dec, RUVD_CMD_ITSCALING_TABLE_BUFFER, msg_fb_it_buf->res->buf,
1071 FB_BUFFER_OFFSET + FB_BUFFER_SIZE, RADEON_USAGE_READ, RADEON_DOMAIN_GTT);
1072 set_reg(dec, RUVD_ENGINE_CNTL, 1);
1073
1074 flush(dec);
1075 next_buffer(dec);
1076 }
1077
1078 /**
1079 * flush any outstanding command buffers to the hardware
1080 */
1081 static void ruvd_flush(struct pipe_video_codec *decoder)
1082 {
1083 }
1084
1085 /**
1086 * create and UVD decoder
1087 */
1088 struct pipe_video_codec *ruvd_create_decoder(struct pipe_context *context,
1089 const struct pipe_video_codec *templ,
1090 ruvd_set_dtb set_dtb)
1091 {
1092 struct radeon_winsys* ws = ((struct r600_common_context *)context)->ws;
1093 struct r600_common_context *rctx = (struct r600_common_context*)context;
1094 unsigned dpb_size;
1095 unsigned width = templ->width, height = templ->height;
1096 unsigned bs_buf_size;
1097 struct radeon_info info;
1098 struct ruvd_decoder *dec;
1099 int i;
1100
1101 ws->query_info(ws, &info);
1102
1103 switch(u_reduce_video_profile(templ->profile)) {
1104 case PIPE_VIDEO_FORMAT_MPEG12:
1105 if (templ->entrypoint > PIPE_VIDEO_ENTRYPOINT_BITSTREAM || info.family < CHIP_PALM)
1106 return vl_create_mpeg12_decoder(context, templ);
1107
1108 /* fall through */
1109 case PIPE_VIDEO_FORMAT_MPEG4:
1110 case PIPE_VIDEO_FORMAT_MPEG4_AVC:
1111 width = align(width, VL_MACROBLOCK_WIDTH);
1112 height = align(height, VL_MACROBLOCK_HEIGHT);
1113 break;
1114
1115 default:
1116 break;
1117 }
1118
1119
1120 dec = CALLOC_STRUCT(ruvd_decoder);
1121
1122 if (!dec)
1123 return NULL;
1124
1125 if (info.drm_major < 3)
1126 dec->use_legacy = TRUE;
1127
1128 dec->base = *templ;
1129 dec->base.context = context;
1130 dec->base.width = width;
1131 dec->base.height = height;
1132
1133 dec->base.destroy = ruvd_destroy;
1134 dec->base.begin_frame = ruvd_begin_frame;
1135 dec->base.decode_macroblock = ruvd_decode_macroblock;
1136 dec->base.decode_bitstream = ruvd_decode_bitstream;
1137 dec->base.end_frame = ruvd_end_frame;
1138 dec->base.flush = ruvd_flush;
1139
1140 dec->stream_type = profile2stream_type(dec, info.family);
1141 dec->set_dtb = set_dtb;
1142 dec->stream_handle = rvid_alloc_stream_handle();
1143 dec->screen = context->screen;
1144 dec->ws = ws;
1145 dec->cs = ws->cs_create(rctx->ctx, RING_UVD, NULL, NULL, NULL);
1146 if (!dec->cs) {
1147 RVID_ERR("Can't get command submission context.\n");
1148 goto error;
1149 }
1150
1151 bs_buf_size = width * height * 512 / (16 * 16);
1152 for (i = 0; i < NUM_BUFFERS; ++i) {
1153 unsigned msg_fb_it_size = FB_BUFFER_OFFSET + FB_BUFFER_SIZE;
1154 STATIC_ASSERT(sizeof(struct ruvd_msg) <= FB_BUFFER_OFFSET);
1155 if (have_it(dec))
1156 msg_fb_it_size += IT_SCALING_TABLE_SIZE;
1157 if (!rvid_create_buffer(dec->screen, &dec->msg_fb_it_buffers[i],
1158 msg_fb_it_size, PIPE_USAGE_STAGING)) {
1159 RVID_ERR("Can't allocated message buffers.\n");
1160 goto error;
1161 }
1162
1163 if (!rvid_create_buffer(dec->screen, &dec->bs_buffers[i],
1164 bs_buf_size, PIPE_USAGE_STAGING)) {
1165 RVID_ERR("Can't allocated bitstream buffers.\n");
1166 goto error;
1167 }
1168
1169 rvid_clear_buffer(context, &dec->msg_fb_it_buffers[i]);
1170 rvid_clear_buffer(context, &dec->bs_buffers[i]);
1171 }
1172
1173 dpb_size = calc_dpb_size(dec);
1174
1175 if (!rvid_create_buffer(dec->screen, &dec->dpb, dpb_size, PIPE_USAGE_DEFAULT)) {
1176 RVID_ERR("Can't allocated dpb.\n");
1177 goto error;
1178 }
1179
1180 rvid_clear_buffer(context, &dec->dpb);
1181
1182 map_msg_fb_it_buf(dec);
1183 dec->msg->size = sizeof(*dec->msg);
1184 dec->msg->msg_type = RUVD_MSG_CREATE;
1185 dec->msg->stream_handle = dec->stream_handle;
1186 dec->msg->body.create.stream_type = dec->stream_type;
1187 dec->msg->body.create.width_in_samples = dec->base.width;
1188 dec->msg->body.create.height_in_samples = dec->base.height;
1189 dec->msg->body.create.dpb_size = dpb_size;
1190 send_msg_buf(dec);
1191 flush(dec);
1192 next_buffer(dec);
1193
1194 return &dec->base;
1195
1196 error:
1197 if (dec->cs) dec->ws->cs_destroy(dec->cs);
1198
1199 for (i = 0; i < NUM_BUFFERS; ++i) {
1200 rvid_destroy_buffer(&dec->msg_fb_it_buffers[i]);
1201 rvid_destroy_buffer(&dec->bs_buffers[i]);
1202 }
1203
1204 rvid_destroy_buffer(&dec->dpb);
1205 if (u_reduce_video_profile(dec->base.profile) == PIPE_VIDEO_FORMAT_HEVC)
1206 rvid_destroy_buffer(&dec->ctx);
1207
1208 FREE(dec);
1209
1210 return NULL;
1211 }
1212
1213 /* calculate top/bottom offset */
1214 static unsigned texture_offset(struct radeon_surf *surface, unsigned layer)
1215 {
1216 return surface->level[0].offset +
1217 layer * surface->level[0].slice_size;
1218 }
1219
1220 /* hw encode the aspect of macro tiles */
1221 static unsigned macro_tile_aspect(unsigned macro_tile_aspect)
1222 {
1223 switch (macro_tile_aspect) {
1224 default:
1225 case 1: macro_tile_aspect = 0; break;
1226 case 2: macro_tile_aspect = 1; break;
1227 case 4: macro_tile_aspect = 2; break;
1228 case 8: macro_tile_aspect = 3; break;
1229 }
1230 return macro_tile_aspect;
1231 }
1232
1233 /* hw encode the bank width and height */
1234 static unsigned bank_wh(unsigned bankwh)
1235 {
1236 switch (bankwh) {
1237 default:
1238 case 1: bankwh = 0; break;
1239 case 2: bankwh = 1; break;
1240 case 4: bankwh = 2; break;
1241 case 8: bankwh = 3; break;
1242 }
1243 return bankwh;
1244 }
1245
1246 /**
1247 * fill decoding target field from the luma and chroma surfaces
1248 */
1249 void ruvd_set_dt_surfaces(struct ruvd_msg *msg, struct radeon_surf *luma,
1250 struct radeon_surf *chroma)
1251 {
1252 msg->body.decode.dt_pitch = luma->level[0].pitch_bytes;
1253 switch (luma->level[0].mode) {
1254 case RADEON_SURF_MODE_LINEAR_ALIGNED:
1255 msg->body.decode.dt_tiling_mode = RUVD_TILE_LINEAR;
1256 msg->body.decode.dt_array_mode = RUVD_ARRAY_MODE_LINEAR;
1257 break;
1258 case RADEON_SURF_MODE_1D:
1259 msg->body.decode.dt_tiling_mode = RUVD_TILE_8X8;
1260 msg->body.decode.dt_array_mode = RUVD_ARRAY_MODE_1D_THIN;
1261 break;
1262 case RADEON_SURF_MODE_2D:
1263 msg->body.decode.dt_tiling_mode = RUVD_TILE_8X8;
1264 msg->body.decode.dt_array_mode = RUVD_ARRAY_MODE_2D_THIN;
1265 break;
1266 default:
1267 assert(0);
1268 break;
1269 }
1270
1271 msg->body.decode.dt_luma_top_offset = texture_offset(luma, 0);
1272 msg->body.decode.dt_chroma_top_offset = texture_offset(chroma, 0);
1273 if (msg->body.decode.dt_field_mode) {
1274 msg->body.decode.dt_luma_bottom_offset = texture_offset(luma, 1);
1275 msg->body.decode.dt_chroma_bottom_offset = texture_offset(chroma, 1);
1276 } else {
1277 msg->body.decode.dt_luma_bottom_offset = msg->body.decode.dt_luma_top_offset;
1278 msg->body.decode.dt_chroma_bottom_offset = msg->body.decode.dt_chroma_top_offset;
1279 }
1280
1281 assert(luma->bankw == chroma->bankw);
1282 assert(luma->bankh == chroma->bankh);
1283 assert(luma->mtilea == chroma->mtilea);
1284
1285 msg->body.decode.dt_surf_tile_config |= RUVD_BANK_WIDTH(bank_wh(luma->bankw));
1286 msg->body.decode.dt_surf_tile_config |= RUVD_BANK_HEIGHT(bank_wh(luma->bankh));
1287 msg->body.decode.dt_surf_tile_config |= RUVD_MACRO_TILE_ASPECT_RATIO(macro_tile_aspect(luma->mtilea));
1288 }