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radeon/uvd: implement HEVC support
[mesa.git] / src / gallium / drivers / radeon / radeon_uvd.c
1 /**************************************************************************
2 *
3 * Copyright 2011 Advanced Micro Devices, Inc.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28 /*
29 * Authors:
30 * Christian König <christian.koenig@amd.com>
31 *
32 */
33
34 #include <sys/types.h>
35 #include <assert.h>
36 #include <errno.h>
37 #include <unistd.h>
38 #include <stdio.h>
39
40 #include "pipe/p_video_codec.h"
41
42 #include "util/u_memory.h"
43 #include "util/u_video.h"
44
45 #include "vl/vl_defines.h"
46 #include "vl/vl_mpeg12_decoder.h"
47
48 #include "r600_pipe_common.h"
49 #include "radeon_video.h"
50 #include "radeon_uvd.h"
51
52 #define NUM_BUFFERS 4
53
54 #define NUM_MPEG2_REFS 6
55 #define NUM_H264_REFS 17
56 #define NUM_VC1_REFS 5
57
58 #define FB_BUFFER_OFFSET 0x1000
59 #define FB_BUFFER_SIZE 2048
60 #define IT_SCALING_TABLE_SIZE 992
61
62 /* UVD decoder representation */
63 struct ruvd_decoder {
64 struct pipe_video_codec base;
65
66 ruvd_set_dtb set_dtb;
67
68 unsigned stream_handle;
69 unsigned stream_type;
70 unsigned frame_number;
71
72 struct pipe_screen *screen;
73 struct radeon_winsys* ws;
74 struct radeon_winsys_cs* cs;
75
76 unsigned cur_buffer;
77
78 struct rvid_buffer msg_fb_it_buffers[NUM_BUFFERS];
79 struct ruvd_msg *msg;
80 uint32_t *fb;
81 uint8_t *it;
82
83 struct rvid_buffer bs_buffers[NUM_BUFFERS];
84 void* bs_ptr;
85 unsigned bs_size;
86
87 struct rvid_buffer dpb;
88 bool use_legacy;
89 struct rvid_buffer ctx;
90 };
91
92 /* flush IB to the hardware */
93 static void flush(struct ruvd_decoder *dec)
94 {
95 dec->ws->cs_flush(dec->cs, RADEON_FLUSH_ASYNC, NULL, 0);
96 }
97
98 /* add a new set register command to the IB */
99 static void set_reg(struct ruvd_decoder *dec, unsigned reg, uint32_t val)
100 {
101 uint32_t *pm4 = dec->cs->buf;
102 pm4[dec->cs->cdw++] = RUVD_PKT0(reg >> 2, 0);
103 pm4[dec->cs->cdw++] = val;
104 }
105
106 /* send a command to the VCPU through the GPCOM registers */
107 static void send_cmd(struct ruvd_decoder *dec, unsigned cmd,
108 struct radeon_winsys_cs_handle* cs_buf, uint32_t off,
109 enum radeon_bo_usage usage, enum radeon_bo_domain domain)
110 {
111 int reloc_idx;
112
113 reloc_idx = dec->ws->cs_add_reloc(dec->cs, cs_buf, usage, domain,
114 RADEON_PRIO_MIN);
115 if (!dec->use_legacy) {
116 uint64_t addr;
117 addr = dec->ws->buffer_get_virtual_address(cs_buf);
118 addr = addr + off;
119 set_reg(dec, RUVD_GPCOM_VCPU_DATA0, addr);
120 set_reg(dec, RUVD_GPCOM_VCPU_DATA1, addr >> 32);
121 } else {
122 set_reg(dec, RUVD_GPCOM_VCPU_DATA0, off);
123 set_reg(dec, RUVD_GPCOM_VCPU_DATA1, reloc_idx * 4);
124 }
125 set_reg(dec, RUVD_GPCOM_VCPU_CMD, cmd << 1);
126 }
127
128 /* do the codec needs an IT buffer ?*/
129 static bool have_it(struct ruvd_decoder *dec)
130 {
131 return dec->stream_type == RUVD_CODEC_H264_PERF ||
132 dec->stream_type == RUVD_CODEC_H265;
133 }
134
135 /* map the next available message/feedback/itscaling buffer */
136 static void map_msg_fb_it_buf(struct ruvd_decoder *dec)
137 {
138 struct rvid_buffer* buf;
139 uint8_t *ptr;
140
141 /* grab the current message/feedback buffer */
142 buf = &dec->msg_fb_it_buffers[dec->cur_buffer];
143
144 /* and map it for CPU access */
145 ptr = dec->ws->buffer_map(buf->res->cs_buf, dec->cs, PIPE_TRANSFER_WRITE);
146
147 /* calc buffer offsets */
148 dec->msg = (struct ruvd_msg *)ptr;
149 dec->fb = (uint32_t *)(ptr + FB_BUFFER_OFFSET);
150 if (have_it(dec))
151 dec->it = (uint8_t *)(ptr + FB_BUFFER_OFFSET + FB_BUFFER_SIZE);
152 }
153
154 /* unmap and send a message command to the VCPU */
155 static void send_msg_buf(struct ruvd_decoder *dec)
156 {
157 struct rvid_buffer* buf;
158
159 /* ignore the request if message/feedback buffer isn't mapped */
160 if (!dec->msg || !dec->fb)
161 return;
162
163 /* grab the current message buffer */
164 buf = &dec->msg_fb_it_buffers[dec->cur_buffer];
165
166 /* unmap the buffer */
167 dec->ws->buffer_unmap(buf->res->cs_buf);
168 dec->msg = NULL;
169 dec->fb = NULL;
170 dec->it = NULL;
171
172 /* and send it to the hardware */
173 send_cmd(dec, RUVD_CMD_MSG_BUFFER, buf->res->cs_buf, 0,
174 RADEON_USAGE_READ, RADEON_DOMAIN_GTT);
175 }
176
177 /* cycle to the next set of buffers */
178 static void next_buffer(struct ruvd_decoder *dec)
179 {
180 ++dec->cur_buffer;
181 dec->cur_buffer %= NUM_BUFFERS;
182 }
183
184 /* convert the profile into something UVD understands */
185 static uint32_t profile2stream_type(struct ruvd_decoder *dec, unsigned family)
186 {
187 switch (u_reduce_video_profile(dec->base.profile)) {
188 case PIPE_VIDEO_FORMAT_MPEG4_AVC:
189 return (family >= CHIP_TONGA) ?
190 RUVD_CODEC_H264_PERF : RUVD_CODEC_H264;
191
192 case PIPE_VIDEO_FORMAT_VC1:
193 return RUVD_CODEC_VC1;
194
195 case PIPE_VIDEO_FORMAT_MPEG12:
196 return RUVD_CODEC_MPEG2;
197
198 case PIPE_VIDEO_FORMAT_MPEG4:
199 return RUVD_CODEC_MPEG4;
200
201 case PIPE_VIDEO_FORMAT_HEVC:
202 return RUVD_CODEC_H265;
203
204 default:
205 assert(0);
206 return 0;
207 }
208 }
209
210 static unsigned calc_ctx_size(struct ruvd_decoder *dec)
211 {
212 unsigned width_in_mb, height_in_mb, ctx_size;
213
214 unsigned width = align(dec->base.width, VL_MACROBLOCK_WIDTH);
215 unsigned height = align(dec->base.height, VL_MACROBLOCK_HEIGHT);
216
217 unsigned max_references = dec->base.max_references + 1;
218
219 if (dec->base.width * dec->base.height >= 4096*2000)
220 max_references = MAX2(max_references, 8);
221 else
222 max_references = MAX2(max_references, 17);
223
224 width = align (width, 16);
225 height = align (height, 16);
226 ctx_size = ((width + 255) / 16)*((height + 255) / 16) * 16 * max_references + 52 * 1024;
227 return ctx_size;
228 }
229
230 /* calculate size of reference picture buffer */
231 static unsigned calc_dpb_size(struct ruvd_decoder *dec)
232 {
233 unsigned width_in_mb, height_in_mb, image_size, dpb_size;
234
235 // always align them to MB size for dpb calculation
236 unsigned width = align(dec->base.width, VL_MACROBLOCK_WIDTH);
237 unsigned height = align(dec->base.height, VL_MACROBLOCK_HEIGHT);
238
239 // always one more for currently decoded picture
240 unsigned max_references = dec->base.max_references + 1;
241
242 // aligned size of a single frame
243 image_size = width * height;
244 image_size += image_size / 2;
245 image_size = align(image_size, 1024);
246
247 // picture width & height in 16 pixel units
248 width_in_mb = width / VL_MACROBLOCK_WIDTH;
249 height_in_mb = align(height / VL_MACROBLOCK_HEIGHT, 2);
250
251 switch (u_reduce_video_profile(dec->base.profile)) {
252 case PIPE_VIDEO_FORMAT_MPEG4_AVC: {
253 if (!dec->use_legacy) {
254 unsigned fs_in_mb = width_in_mb * height_in_mb;
255 unsigned alignment = 64, num_dpb_buffer;
256
257 if (dec->stream_type == RUVD_CODEC_H264_PERF)
258 alignment = 256;
259 switch(dec->base.level) {
260 case 30:
261 num_dpb_buffer = 8100 / fs_in_mb;
262 break;
263 case 31:
264 num_dpb_buffer = 18000 / fs_in_mb;
265 break;
266 case 32:
267 num_dpb_buffer = 20480 / fs_in_mb;
268 break;
269 case 41:
270 num_dpb_buffer = 32768 / fs_in_mb;
271 break;
272 case 42:
273 num_dpb_buffer = 34816 / fs_in_mb;
274 break;
275 case 50:
276 num_dpb_buffer = 110400 / fs_in_mb;
277 break;
278 case 51:
279 num_dpb_buffer = 184320 / fs_in_mb;
280 break;
281 default:
282 num_dpb_buffer = 184320 / fs_in_mb;
283 break;
284 }
285 num_dpb_buffer++;
286 max_references = MAX2(MIN2(NUM_H264_REFS, num_dpb_buffer), max_references);
287 dpb_size = image_size * max_references;
288 dpb_size += max_references * align(width_in_mb * height_in_mb * 192, alignment);
289 dpb_size += align(width_in_mb * height_in_mb * 32, alignment);
290 } else {
291 // the firmware seems to allways assume a minimum of ref frames
292 max_references = MAX2(NUM_H264_REFS, max_references);
293 // reference picture buffer
294 dpb_size = image_size * max_references;
295 // macroblock context buffer
296 dpb_size += width_in_mb * height_in_mb * max_references * 192;
297 // IT surface buffer
298 dpb_size += width_in_mb * height_in_mb * 32;
299 }
300 break;
301 }
302
303 case PIPE_VIDEO_FORMAT_HEVC:
304 if (dec->base.width * dec->base.height >= 4096*2000)
305 max_references = MAX2(max_references, 8);
306 else
307 max_references = MAX2(max_references, 17);
308
309 width = align (width, 16);
310 height = align (height, 16);
311 dpb_size = align((width * height * 3) / 2, 256) * max_references;
312 break;
313
314 case PIPE_VIDEO_FORMAT_VC1:
315 // the firmware seems to allways assume a minimum of ref frames
316 max_references = MAX2(NUM_VC1_REFS, max_references);
317
318 // reference picture buffer
319 dpb_size = image_size * max_references;
320
321 // CONTEXT_BUFFER
322 dpb_size += width_in_mb * height_in_mb * 128;
323
324 // IT surface buffer
325 dpb_size += width_in_mb * 64;
326
327 // DB surface buffer
328 dpb_size += width_in_mb * 128;
329
330 // BP
331 dpb_size += align(MAX2(width_in_mb, height_in_mb) * 7 * 16, 64);
332 break;
333
334 case PIPE_VIDEO_FORMAT_MPEG12:
335 // reference picture buffer, must be big enough for all frames
336 dpb_size = image_size * NUM_MPEG2_REFS;
337 break;
338
339 case PIPE_VIDEO_FORMAT_MPEG4:
340 // reference picture buffer
341 dpb_size = image_size * max_references;
342
343 // CM
344 dpb_size += width_in_mb * height_in_mb * 64;
345
346 // IT surface buffer
347 dpb_size += align(width_in_mb * height_in_mb * 32, 64);
348
349 dpb_size = MAX2(dpb_size, 30 * 1024 * 1024);
350 break;
351
352 default:
353 // something is missing here
354 assert(0);
355
356 // at least use a sane default value
357 dpb_size = 32 * 1024 * 1024;
358 break;
359 }
360 return dpb_size;
361 }
362
363 /* free associated data in the video buffer callback */
364 static void ruvd_destroy_associated_data(void *data)
365 {
366 /* NOOP, since we only use an intptr */
367 }
368
369 /* get h264 specific message bits */
370 static struct ruvd_h264 get_h264_msg(struct ruvd_decoder *dec, struct pipe_h264_picture_desc *pic)
371 {
372 struct ruvd_h264 result;
373
374 memset(&result, 0, sizeof(result));
375 switch (pic->base.profile) {
376 case PIPE_VIDEO_PROFILE_MPEG4_AVC_BASELINE:
377 result.profile = RUVD_H264_PROFILE_BASELINE;
378 break;
379
380 case PIPE_VIDEO_PROFILE_MPEG4_AVC_MAIN:
381 result.profile = RUVD_H264_PROFILE_MAIN;
382 break;
383
384 case PIPE_VIDEO_PROFILE_MPEG4_AVC_HIGH:
385 result.profile = RUVD_H264_PROFILE_HIGH;
386 break;
387
388 default:
389 assert(0);
390 break;
391 }
392
393 result.level = dec->base.level;
394
395 result.sps_info_flags = 0;
396 result.sps_info_flags |= pic->pps->sps->direct_8x8_inference_flag << 0;
397 result.sps_info_flags |= pic->pps->sps->mb_adaptive_frame_field_flag << 1;
398 result.sps_info_flags |= pic->pps->sps->frame_mbs_only_flag << 2;
399 result.sps_info_flags |= pic->pps->sps->delta_pic_order_always_zero_flag << 3;
400
401 result.bit_depth_luma_minus8 = pic->pps->sps->bit_depth_luma_minus8;
402 result.bit_depth_chroma_minus8 = pic->pps->sps->bit_depth_chroma_minus8;
403 result.log2_max_frame_num_minus4 = pic->pps->sps->log2_max_frame_num_minus4;
404 result.pic_order_cnt_type = pic->pps->sps->pic_order_cnt_type;
405 result.log2_max_pic_order_cnt_lsb_minus4 = pic->pps->sps->log2_max_pic_order_cnt_lsb_minus4;
406
407 switch (dec->base.chroma_format) {
408 case PIPE_VIDEO_CHROMA_FORMAT_400:
409 result.chroma_format = 0;
410 break;
411 case PIPE_VIDEO_CHROMA_FORMAT_420:
412 result.chroma_format = 1;
413 break;
414 case PIPE_VIDEO_CHROMA_FORMAT_422:
415 result.chroma_format = 2;
416 break;
417 case PIPE_VIDEO_CHROMA_FORMAT_444:
418 result.chroma_format = 3;
419 break;
420 }
421
422 result.pps_info_flags = 0;
423 result.pps_info_flags |= pic->pps->transform_8x8_mode_flag << 0;
424 result.pps_info_flags |= pic->pps->redundant_pic_cnt_present_flag << 1;
425 result.pps_info_flags |= pic->pps->constrained_intra_pred_flag << 2;
426 result.pps_info_flags |= pic->pps->deblocking_filter_control_present_flag << 3;
427 result.pps_info_flags |= pic->pps->weighted_bipred_idc << 4;
428 result.pps_info_flags |= pic->pps->weighted_pred_flag << 6;
429 result.pps_info_flags |= pic->pps->bottom_field_pic_order_in_frame_present_flag << 7;
430 result.pps_info_flags |= pic->pps->entropy_coding_mode_flag << 8;
431
432 result.num_slice_groups_minus1 = pic->pps->num_slice_groups_minus1;
433 result.slice_group_map_type = pic->pps->slice_group_map_type;
434 result.slice_group_change_rate_minus1 = pic->pps->slice_group_change_rate_minus1;
435 result.pic_init_qp_minus26 = pic->pps->pic_init_qp_minus26;
436 result.chroma_qp_index_offset = pic->pps->chroma_qp_index_offset;
437 result.second_chroma_qp_index_offset = pic->pps->second_chroma_qp_index_offset;
438
439 memcpy(result.scaling_list_4x4, pic->pps->ScalingList4x4, 6*16);
440 memcpy(result.scaling_list_8x8, pic->pps->ScalingList8x8, 2*64);
441
442 if (dec->stream_type == RUVD_CODEC_H264_PERF) {
443 memcpy(dec->it, result.scaling_list_4x4, 6*16);
444 memcpy((dec->it + 96), result.scaling_list_8x8, 2*64);
445 }
446
447 result.num_ref_frames = pic->num_ref_frames;
448
449 result.num_ref_idx_l0_active_minus1 = pic->num_ref_idx_l0_active_minus1;
450 result.num_ref_idx_l1_active_minus1 = pic->num_ref_idx_l1_active_minus1;
451
452 result.frame_num = pic->frame_num;
453 memcpy(result.frame_num_list, pic->frame_num_list, 4*16);
454 result.curr_field_order_cnt_list[0] = pic->field_order_cnt[0];
455 result.curr_field_order_cnt_list[1] = pic->field_order_cnt[1];
456 memcpy(result.field_order_cnt_list, pic->field_order_cnt_list, 4*16*2);
457
458 result.decoded_pic_idx = pic->frame_num;
459
460 return result;
461 }
462
463 /* get h265 specific message bits */
464 static struct ruvd_h265 get_h265_msg(struct ruvd_decoder *dec, struct pipe_video_buffer *target,
465 struct pipe_h265_picture_desc *pic)
466 {
467 struct ruvd_h265 result;
468 unsigned i;
469
470 memset(&result, 0, sizeof(result));
471
472 result.sps_info_flags = 0;
473 result.sps_info_flags |= pic->pps->sps->scaling_list_enabled_flag << 0;
474 result.sps_info_flags |= pic->pps->sps->amp_enabled_flag << 1;
475 result.sps_info_flags |= pic->pps->sps->sample_adaptive_offset_enabled_flag << 2;
476 result.sps_info_flags |= pic->pps->sps->pcm_enabled_flag << 3;
477 result.sps_info_flags |= pic->pps->sps->pcm_loop_filter_disabled_flag << 4;
478 result.sps_info_flags |= pic->pps->sps->long_term_ref_pics_present_flag << 5;
479 result.sps_info_flags |= pic->pps->sps->sps_temporal_mvp_enabled_flag << 6;
480 result.sps_info_flags |= pic->pps->sps->strong_intra_smoothing_enabled_flag << 7;
481 result.sps_info_flags |= pic->pps->sps->separate_colour_plane_flag << 8;
482 if (((struct r600_common_screen*)dec->screen)->family == CHIP_CARRIZO)
483 result.sps_info_flags |= 1 << 9;
484
485 result.chroma_format = pic->pps->sps->chroma_format_idc;
486 result.bit_depth_luma_minus8 = pic->pps->sps->bit_depth_luma_minus8;
487 result.bit_depth_chroma_minus8 = pic->pps->sps->bit_depth_chroma_minus8;
488 result.log2_max_pic_order_cnt_lsb_minus4 = pic->pps->sps->log2_max_pic_order_cnt_lsb_minus4;
489 result.sps_max_dec_pic_buffering_minus1 = pic->pps->sps->sps_max_dec_pic_buffering_minus1;
490 result.log2_min_luma_coding_block_size_minus3 = pic->pps->sps->log2_min_luma_coding_block_size_minus3;
491 result.log2_diff_max_min_luma_coding_block_size = pic->pps->sps->log2_diff_max_min_luma_coding_block_size;
492 result.log2_min_transform_block_size_minus2 = pic->pps->sps->log2_min_transform_block_size_minus2;
493 result.log2_diff_max_min_transform_block_size = pic->pps->sps->log2_diff_max_min_transform_block_size;
494 result.max_transform_hierarchy_depth_inter = pic->pps->sps->max_transform_hierarchy_depth_inter;
495 result.max_transform_hierarchy_depth_intra = pic->pps->sps->max_transform_hierarchy_depth_intra;
496 result.pcm_sample_bit_depth_luma_minus1 = pic->pps->sps->pcm_sample_bit_depth_luma_minus1;
497 result.pcm_sample_bit_depth_chroma_minus1 = pic->pps->sps->pcm_sample_bit_depth_chroma_minus1;
498 result.log2_min_pcm_luma_coding_block_size_minus3 = pic->pps->sps->log2_min_pcm_luma_coding_block_size_minus3;
499 result.log2_diff_max_min_pcm_luma_coding_block_size = pic->pps->sps->log2_diff_max_min_pcm_luma_coding_block_size;
500 result.num_short_term_ref_pic_sets = pic->pps->sps->num_short_term_ref_pic_sets;
501
502 result.pps_info_flags = 0;
503 result.pps_info_flags |= pic->pps->dependent_slice_segments_enabled_flag << 0;
504 result.pps_info_flags |= pic->pps->output_flag_present_flag << 1;
505 result.pps_info_flags |= pic->pps->sign_data_hiding_enabled_flag << 2;
506 result.pps_info_flags |= pic->pps->cabac_init_present_flag << 3;
507 result.pps_info_flags |= pic->pps->constrained_intra_pred_flag << 4;
508 result.pps_info_flags |= pic->pps->transform_skip_enabled_flag << 5;
509 result.pps_info_flags |= pic->pps->cu_qp_delta_enabled_flag << 6;
510 result.pps_info_flags |= pic->pps->pps_slice_chroma_qp_offsets_present_flag << 7;
511 result.pps_info_flags |= pic->pps->weighted_pred_flag << 8;
512 result.pps_info_flags |= pic->pps->weighted_bipred_flag << 9;
513 result.pps_info_flags |= pic->pps->transquant_bypass_enabled_flag << 10;
514 result.pps_info_flags |= pic->pps->tiles_enabled_flag << 11;
515 result.pps_info_flags |= pic->pps->entropy_coding_sync_enabled_flag << 12;
516 result.pps_info_flags |= pic->pps->uniform_spacing_flag << 13;
517 result.pps_info_flags |= pic->pps->loop_filter_across_tiles_enabled_flag << 14;
518 result.pps_info_flags |= pic->pps->pps_loop_filter_across_slices_enabled_flag << 15;
519 result.pps_info_flags |= pic->pps->deblocking_filter_override_enabled_flag << 16;
520 result.pps_info_flags |= pic->pps->pps_deblocking_filter_disabled_flag << 17;
521 result.pps_info_flags |= pic->pps->lists_modification_present_flag << 18;
522 result.pps_info_flags |= pic->pps->slice_segment_header_extension_present_flag << 19;
523 //result.pps_info_flags |= pic->pps->deblocking_filter_control_present_flag; ???
524
525 result.num_extra_slice_header_bits = pic->pps->num_extra_slice_header_bits;
526 result.num_long_term_ref_pic_sps = pic->pps->sps->num_long_term_ref_pics_sps;
527 result.num_ref_idx_l0_default_active_minus1 = pic->pps->num_ref_idx_l0_default_active_minus1;
528 result.num_ref_idx_l1_default_active_minus1 = pic->pps->num_ref_idx_l1_default_active_minus1;
529 result.pps_cb_qp_offset = pic->pps->pps_cb_qp_offset;
530 result.pps_cr_qp_offset = pic->pps->pps_cr_qp_offset;
531 result.pps_beta_offset_div2 = pic->pps->pps_beta_offset_div2;
532 result.pps_tc_offset_div2 = pic->pps->pps_tc_offset_div2;
533 result.diff_cu_qp_delta_depth = pic->pps->diff_cu_qp_delta_depth;
534 result.num_tile_columns_minus1 = pic->pps->num_tile_columns_minus1;
535 result.num_tile_rows_minus1 = pic->pps->num_tile_rows_minus1;
536 result.log2_parallel_merge_level_minus2 = pic->pps->log2_parallel_merge_level_minus2;
537 result.init_qp_minus26 = pic->pps->init_qp_minus26;
538
539 for (i = 0; i < 19; ++i)
540 result.column_width_minus1[i] = pic->pps->column_width_minus1[i];
541
542 for (i = 0; i < 21; ++i)
543 result.row_height_minus1[i] = pic->pps->row_height_minus1[i];
544
545 result.num_delta_pocs_ref_rps_idx = pic->NumDeltaPocsOfRefRpsIdx;
546 result.curr_idx = pic->CurrPicOrderCntVal;
547 result.curr_poc = pic->CurrPicOrderCntVal;
548
549 vl_video_buffer_set_associated_data(target, &dec->base,
550 (void *)(uintptr_t)pic->CurrPicOrderCntVal,
551 &ruvd_destroy_associated_data);
552
553 for (i = 0; i < 16; ++i) {
554 struct pipe_video_buffer *ref = pic->ref[i];
555 uintptr_t ref_pic = 0;
556
557 result.poc_list[i] = pic->PicOrderCntVal[i];
558
559 if (ref)
560 ref_pic = (uintptr_t)vl_video_buffer_get_associated_data(ref, &dec->base);
561 else
562 ref_pic = 0x7F;
563 result.ref_pic_list[i] = ref_pic;
564 }
565
566 for (i = 0; i < 8; ++i) {
567 result.ref_pic_set_st_curr_before[i] = 0xFF;
568 result.ref_pic_set_st_curr_after[i] = 0xFF;
569 result.ref_pic_set_lt_curr[i] = 0xFF;
570 }
571
572 for (i = 0; i < pic->NumPocStCurrBefore; ++i)
573 result.ref_pic_set_st_curr_before[i] = pic->RefPicSetStCurrBefore[i];
574
575 for (i = 0; i < pic->NumPocStCurrAfter; ++i)
576 result.ref_pic_set_st_curr_after[i] = pic->RefPicSetStCurrAfter[i];
577
578 for (i = 0; i < pic->NumPocLtCurr; ++i)
579 result.ref_pic_set_lt_curr[i] = pic->RefPicSetLtCurr[i];
580
581 for (i = 0; i < 6; ++i)
582 result.ucScalingListDCCoefSizeID2[i] = pic->pps->sps->ScalingListDCCoeff16x16[i];
583
584 for (i = 0; i < 2; ++i)
585 result.ucScalingListDCCoefSizeID3[i] = pic->pps->sps->ScalingListDCCoeff32x32[i];
586
587 memcpy(dec->it, pic->pps->sps->ScalingList4x4, 6 * 16);
588 memcpy(dec->it + 96, pic->pps->sps->ScalingList8x8, 6 * 64);
589 memcpy(dec->it + 480, pic->pps->sps->ScalingList16x16, 6 * 64);
590 memcpy(dec->it + 864, pic->pps->sps->ScalingList32x32, 2 * 64);
591
592 /* TODO
593 result.highestTid;
594 result.isNonRef;
595
596 IDRPicFlag;
597 RAPPicFlag;
598 NumPocTotalCurr;
599 NumShortTermPictureSliceHeaderBits;
600 NumLongTermPictureSliceHeaderBits;
601
602 IsLongTerm[16];
603 */
604
605 return result;
606 }
607
608 /* get vc1 specific message bits */
609 static struct ruvd_vc1 get_vc1_msg(struct pipe_vc1_picture_desc *pic)
610 {
611 struct ruvd_vc1 result;
612
613 memset(&result, 0, sizeof(result));
614
615 switch(pic->base.profile) {
616 case PIPE_VIDEO_PROFILE_VC1_SIMPLE:
617 result.profile = RUVD_VC1_PROFILE_SIMPLE;
618 result.level = 1;
619 break;
620
621 case PIPE_VIDEO_PROFILE_VC1_MAIN:
622 result.profile = RUVD_VC1_PROFILE_MAIN;
623 result.level = 2;
624 break;
625
626 case PIPE_VIDEO_PROFILE_VC1_ADVANCED:
627 result.profile = RUVD_VC1_PROFILE_ADVANCED;
628 result.level = 4;
629 break;
630
631 default:
632 assert(0);
633 }
634
635 /* fields common for all profiles */
636 result.sps_info_flags |= pic->postprocflag << 7;
637 result.sps_info_flags |= pic->pulldown << 6;
638 result.sps_info_flags |= pic->interlace << 5;
639 result.sps_info_flags |= pic->tfcntrflag << 4;
640 result.sps_info_flags |= pic->finterpflag << 3;
641 result.sps_info_flags |= pic->psf << 1;
642
643 result.pps_info_flags |= pic->range_mapy_flag << 31;
644 result.pps_info_flags |= pic->range_mapy << 28;
645 result.pps_info_flags |= pic->range_mapuv_flag << 27;
646 result.pps_info_flags |= pic->range_mapuv << 24;
647 result.pps_info_flags |= pic->multires << 21;
648 result.pps_info_flags |= pic->maxbframes << 16;
649 result.pps_info_flags |= pic->overlap << 11;
650 result.pps_info_flags |= pic->quantizer << 9;
651 result.pps_info_flags |= pic->panscan_flag << 7;
652 result.pps_info_flags |= pic->refdist_flag << 6;
653 result.pps_info_flags |= pic->vstransform << 0;
654
655 /* some fields only apply to main/advanced profile */
656 if (pic->base.profile != PIPE_VIDEO_PROFILE_VC1_SIMPLE) {
657 result.pps_info_flags |= pic->syncmarker << 20;
658 result.pps_info_flags |= pic->rangered << 19;
659 result.pps_info_flags |= pic->loopfilter << 5;
660 result.pps_info_flags |= pic->fastuvmc << 4;
661 result.pps_info_flags |= pic->extended_mv << 3;
662 result.pps_info_flags |= pic->extended_dmv << 8;
663 result.pps_info_flags |= pic->dquant << 1;
664 }
665
666 result.chroma_format = 1;
667
668 #if 0
669 //(((unsigned int)(pPicParams->advance.reserved1)) << SPS_INFO_VC1_RESERVED_SHIFT)
670 uint32_t slice_count
671 uint8_t picture_type
672 uint8_t frame_coding_mode
673 uint8_t deblockEnable
674 uint8_t pquant
675 #endif
676
677 return result;
678 }
679
680 /* extract the frame number from a referenced video buffer */
681 static uint32_t get_ref_pic_idx(struct ruvd_decoder *dec, struct pipe_video_buffer *ref)
682 {
683 uint32_t min = MAX2(dec->frame_number, NUM_MPEG2_REFS) - NUM_MPEG2_REFS;
684 uint32_t max = MAX2(dec->frame_number, 1) - 1;
685 uintptr_t frame;
686
687 /* seems to be the most sane fallback */
688 if (!ref)
689 return max;
690
691 /* get the frame number from the associated data */
692 frame = (uintptr_t)vl_video_buffer_get_associated_data(ref, &dec->base);
693
694 /* limit the frame number to a valid range */
695 return MAX2(MIN2(frame, max), min);
696 }
697
698 /* get mpeg2 specific msg bits */
699 static struct ruvd_mpeg2 get_mpeg2_msg(struct ruvd_decoder *dec,
700 struct pipe_mpeg12_picture_desc *pic)
701 {
702 const int *zscan = pic->alternate_scan ? vl_zscan_alternate : vl_zscan_normal;
703 struct ruvd_mpeg2 result;
704 unsigned i;
705
706 memset(&result, 0, sizeof(result));
707 result.decoded_pic_idx = dec->frame_number;
708 for (i = 0; i < 2; ++i)
709 result.ref_pic_idx[i] = get_ref_pic_idx(dec, pic->ref[i]);
710
711 result.load_intra_quantiser_matrix = 1;
712 result.load_nonintra_quantiser_matrix = 1;
713
714 for (i = 0; i < 64; ++i) {
715 result.intra_quantiser_matrix[i] = pic->intra_matrix[zscan[i]];
716 result.nonintra_quantiser_matrix[i] = pic->non_intra_matrix[zscan[i]];
717 }
718
719 result.profile_and_level_indication = 0;
720 result.chroma_format = 0x1;
721
722 result.picture_coding_type = pic->picture_coding_type;
723 result.f_code[0][0] = pic->f_code[0][0] + 1;
724 result.f_code[0][1] = pic->f_code[0][1] + 1;
725 result.f_code[1][0] = pic->f_code[1][0] + 1;
726 result.f_code[1][1] = pic->f_code[1][1] + 1;
727 result.intra_dc_precision = pic->intra_dc_precision;
728 result.pic_structure = pic->picture_structure;
729 result.top_field_first = pic->top_field_first;
730 result.frame_pred_frame_dct = pic->frame_pred_frame_dct;
731 result.concealment_motion_vectors = pic->concealment_motion_vectors;
732 result.q_scale_type = pic->q_scale_type;
733 result.intra_vlc_format = pic->intra_vlc_format;
734 result.alternate_scan = pic->alternate_scan;
735
736 return result;
737 }
738
739 /* get mpeg4 specific msg bits */
740 static struct ruvd_mpeg4 get_mpeg4_msg(struct ruvd_decoder *dec,
741 struct pipe_mpeg4_picture_desc *pic)
742 {
743 struct ruvd_mpeg4 result;
744 unsigned i;
745
746 memset(&result, 0, sizeof(result));
747 result.decoded_pic_idx = dec->frame_number;
748 for (i = 0; i < 2; ++i)
749 result.ref_pic_idx[i] = get_ref_pic_idx(dec, pic->ref[i]);
750
751 result.variant_type = 0;
752 result.profile_and_level_indication = 0xF0; // ASP Level0
753
754 result.video_object_layer_verid = 0x5; // advanced simple
755 result.video_object_layer_shape = 0x0; // rectangular
756
757 result.video_object_layer_width = dec->base.width;
758 result.video_object_layer_height = dec->base.height;
759
760 result.vop_time_increment_resolution = pic->vop_time_increment_resolution;
761
762 result.flags |= pic->short_video_header << 0;
763 //result.flags |= obmc_disable << 1;
764 result.flags |= pic->interlaced << 2;
765 result.flags |= 1 << 3; // load_intra_quant_mat
766 result.flags |= 1 << 4; // load_nonintra_quant_mat
767 result.flags |= pic->quarter_sample << 5;
768 result.flags |= 1 << 6; // complexity_estimation_disable
769 result.flags |= pic->resync_marker_disable << 7;
770 //result.flags |= data_partitioned << 8;
771 //result.flags |= reversible_vlc << 9;
772 result.flags |= 0 << 10; // newpred_enable
773 result.flags |= 0 << 11; // reduced_resolution_vop_enable
774 //result.flags |= scalability << 12;
775 //result.flags |= is_object_layer_identifier << 13;
776 //result.flags |= fixed_vop_rate << 14;
777 //result.flags |= newpred_segment_type << 15;
778
779 result.quant_type = pic->quant_type;
780
781 for (i = 0; i < 64; ++i) {
782 result.intra_quant_mat[i] = pic->intra_matrix[vl_zscan_normal[i]];
783 result.nonintra_quant_mat[i] = pic->non_intra_matrix[vl_zscan_normal[i]];
784 }
785
786 /*
787 int32_t trd [2]
788 int32_t trb [2]
789 uint8_t vop_coding_type
790 uint8_t vop_fcode_forward
791 uint8_t vop_fcode_backward
792 uint8_t rounding_control
793 uint8_t alternate_vertical_scan_flag
794 uint8_t top_field_first
795 */
796
797 return result;
798 }
799
800 /**
801 * destroy this video decoder
802 */
803 static void ruvd_destroy(struct pipe_video_codec *decoder)
804 {
805 struct ruvd_decoder *dec = (struct ruvd_decoder*)decoder;
806 unsigned i;
807
808 assert(decoder);
809
810 map_msg_fb_it_buf(dec);
811 memset(dec->msg, 0, sizeof(*dec->msg));
812 dec->msg->size = sizeof(*dec->msg);
813 dec->msg->msg_type = RUVD_MSG_DESTROY;
814 dec->msg->stream_handle = dec->stream_handle;
815 send_msg_buf(dec);
816
817 flush(dec);
818
819 dec->ws->cs_destroy(dec->cs);
820
821 for (i = 0; i < NUM_BUFFERS; ++i) {
822 rvid_destroy_buffer(&dec->msg_fb_it_buffers[i]);
823 rvid_destroy_buffer(&dec->bs_buffers[i]);
824 }
825
826 rvid_destroy_buffer(&dec->dpb);
827 if (u_reduce_video_profile(dec->base.profile) == PIPE_VIDEO_FORMAT_HEVC)
828 rvid_destroy_buffer(&dec->ctx);
829
830 FREE(dec);
831 }
832
833 /**
834 * start decoding of a new frame
835 */
836 static void ruvd_begin_frame(struct pipe_video_codec *decoder,
837 struct pipe_video_buffer *target,
838 struct pipe_picture_desc *picture)
839 {
840 struct ruvd_decoder *dec = (struct ruvd_decoder*)decoder;
841 uintptr_t frame;
842
843 assert(decoder);
844
845 frame = ++dec->frame_number;
846 vl_video_buffer_set_associated_data(target, decoder, (void *)frame,
847 &ruvd_destroy_associated_data);
848
849 dec->bs_size = 0;
850 dec->bs_ptr = dec->ws->buffer_map(
851 dec->bs_buffers[dec->cur_buffer].res->cs_buf,
852 dec->cs, PIPE_TRANSFER_WRITE);
853 }
854
855 /**
856 * decode a macroblock
857 */
858 static void ruvd_decode_macroblock(struct pipe_video_codec *decoder,
859 struct pipe_video_buffer *target,
860 struct pipe_picture_desc *picture,
861 const struct pipe_macroblock *macroblocks,
862 unsigned num_macroblocks)
863 {
864 /* not supported (yet) */
865 assert(0);
866 }
867
868 /**
869 * decode a bitstream
870 */
871 static void ruvd_decode_bitstream(struct pipe_video_codec *decoder,
872 struct pipe_video_buffer *target,
873 struct pipe_picture_desc *picture,
874 unsigned num_buffers,
875 const void * const *buffers,
876 const unsigned *sizes)
877 {
878 struct ruvd_decoder *dec = (struct ruvd_decoder*)decoder;
879 unsigned i;
880
881 assert(decoder);
882
883 if (!dec->bs_ptr)
884 return;
885
886 for (i = 0; i < num_buffers; ++i) {
887 struct rvid_buffer *buf = &dec->bs_buffers[dec->cur_buffer];
888 unsigned new_size = dec->bs_size + sizes[i];
889
890 if (new_size > buf->res->buf->size) {
891 dec->ws->buffer_unmap(buf->res->cs_buf);
892 if (!rvid_resize_buffer(dec->screen, dec->cs, buf, new_size)) {
893 RVID_ERR("Can't resize bitstream buffer!");
894 return;
895 }
896
897 dec->bs_ptr = dec->ws->buffer_map(buf->res->cs_buf, dec->cs,
898 PIPE_TRANSFER_WRITE);
899 if (!dec->bs_ptr)
900 return;
901
902 dec->bs_ptr += dec->bs_size;
903 }
904
905 memcpy(dec->bs_ptr, buffers[i], sizes[i]);
906 dec->bs_size += sizes[i];
907 dec->bs_ptr += sizes[i];
908 }
909 }
910
911 /**
912 * end decoding of the current frame
913 */
914 static void ruvd_end_frame(struct pipe_video_codec *decoder,
915 struct pipe_video_buffer *target,
916 struct pipe_picture_desc *picture)
917 {
918 struct ruvd_decoder *dec = (struct ruvd_decoder*)decoder;
919 struct radeon_winsys_cs_handle *dt;
920 struct rvid_buffer *msg_fb_it_buf, *bs_buf;
921 unsigned bs_size;
922
923 assert(decoder);
924
925 if (!dec->bs_ptr)
926 return;
927
928 msg_fb_it_buf = &dec->msg_fb_it_buffers[dec->cur_buffer];
929 bs_buf = &dec->bs_buffers[dec->cur_buffer];
930
931 bs_size = align(dec->bs_size, 128);
932 memset(dec->bs_ptr, 0, bs_size - dec->bs_size);
933 dec->ws->buffer_unmap(bs_buf->res->cs_buf);
934
935 map_msg_fb_it_buf(dec);
936 dec->msg->size = sizeof(*dec->msg);
937 dec->msg->msg_type = RUVD_MSG_DECODE;
938 dec->msg->stream_handle = dec->stream_handle;
939 dec->msg->status_report_feedback_number = dec->frame_number;
940
941 dec->msg->body.decode.stream_type = dec->stream_type;
942 dec->msg->body.decode.decode_flags = 0x1;
943 dec->msg->body.decode.width_in_samples = dec->base.width;
944 dec->msg->body.decode.height_in_samples = dec->base.height;
945
946 dec->msg->body.decode.dpb_size = dec->dpb.res->buf->size;
947 dec->msg->body.decode.bsd_size = bs_size;
948 dec->msg->body.decode.db_pitch = dec->base.width;
949
950 dt = dec->set_dtb(dec->msg, (struct vl_video_buffer *)target);
951
952 switch (u_reduce_video_profile(picture->profile)) {
953 case PIPE_VIDEO_FORMAT_MPEG4_AVC:
954 dec->msg->body.decode.codec.h264 = get_h264_msg(dec, (struct pipe_h264_picture_desc*)picture);
955 break;
956
957 case PIPE_VIDEO_FORMAT_HEVC:
958 dec->msg->body.decode.codec.h265 = get_h265_msg(dec, target, (struct pipe_h265_picture_desc*)picture);
959 break;
960
961 case PIPE_VIDEO_FORMAT_VC1:
962 dec->msg->body.decode.codec.vc1 = get_vc1_msg((struct pipe_vc1_picture_desc*)picture);
963 break;
964
965 case PIPE_VIDEO_FORMAT_MPEG12:
966 dec->msg->body.decode.codec.mpeg2 = get_mpeg2_msg(dec, (struct pipe_mpeg12_picture_desc*)picture);
967 break;
968
969 case PIPE_VIDEO_FORMAT_MPEG4:
970 dec->msg->body.decode.codec.mpeg4 = get_mpeg4_msg(dec, (struct pipe_mpeg4_picture_desc*)picture);
971 break;
972
973 default:
974 assert(0);
975 return;
976 }
977
978 dec->msg->body.decode.db_surf_tile_config = dec->msg->body.decode.dt_surf_tile_config;
979 dec->msg->body.decode.extension_support = 0x1;
980
981 /* set at least the feedback buffer size */
982 dec->fb[0] = FB_BUFFER_SIZE;
983
984 send_msg_buf(dec);
985
986 send_cmd(dec, RUVD_CMD_DPB_BUFFER, dec->dpb.res->cs_buf, 0,
987 RADEON_USAGE_READWRITE, RADEON_DOMAIN_VRAM);
988 if (u_reduce_video_profile(picture->profile) == PIPE_VIDEO_FORMAT_HEVC) {
989 send_cmd(dec, RUVD_CMD_CONTEXT_BUFFER, dec->ctx.res->cs_buf, 0,
990 RADEON_USAGE_READWRITE, RADEON_DOMAIN_VRAM);
991 }
992 send_cmd(dec, RUVD_CMD_BITSTREAM_BUFFER, bs_buf->res->cs_buf,
993 0, RADEON_USAGE_READ, RADEON_DOMAIN_GTT);
994 send_cmd(dec, RUVD_CMD_DECODING_TARGET_BUFFER, dt, 0,
995 RADEON_USAGE_WRITE, RADEON_DOMAIN_VRAM);
996 send_cmd(dec, RUVD_CMD_FEEDBACK_BUFFER, msg_fb_it_buf->res->cs_buf,
997 FB_BUFFER_OFFSET, RADEON_USAGE_WRITE, RADEON_DOMAIN_GTT);
998 if (have_it(dec))
999 send_cmd(dec, RUVD_CMD_ITSCALING_TABLE_BUFFER, msg_fb_it_buf->res->cs_buf,
1000 FB_BUFFER_OFFSET + FB_BUFFER_SIZE, RADEON_USAGE_READ, RADEON_DOMAIN_GTT);
1001 set_reg(dec, RUVD_ENGINE_CNTL, 1);
1002
1003 flush(dec);
1004 next_buffer(dec);
1005 }
1006
1007 /**
1008 * flush any outstanding command buffers to the hardware
1009 */
1010 static void ruvd_flush(struct pipe_video_codec *decoder)
1011 {
1012 }
1013
1014 /**
1015 * create and UVD decoder
1016 */
1017 struct pipe_video_codec *ruvd_create_decoder(struct pipe_context *context,
1018 const struct pipe_video_codec *templ,
1019 ruvd_set_dtb set_dtb)
1020 {
1021 struct radeon_winsys* ws = ((struct r600_common_context *)context)->ws;
1022 struct r600_common_context *rctx = (struct r600_common_context*)context;
1023 unsigned dpb_size;
1024 unsigned width = templ->width, height = templ->height;
1025 unsigned bs_buf_size;
1026 struct radeon_info info;
1027 struct ruvd_decoder *dec;
1028 int i;
1029
1030 ws->query_info(ws, &info);
1031
1032 switch(u_reduce_video_profile(templ->profile)) {
1033 case PIPE_VIDEO_FORMAT_MPEG12:
1034 if (templ->entrypoint > PIPE_VIDEO_ENTRYPOINT_BITSTREAM || info.family < CHIP_PALM)
1035 return vl_create_mpeg12_decoder(context, templ);
1036
1037 /* fall through */
1038 case PIPE_VIDEO_FORMAT_MPEG4:
1039 case PIPE_VIDEO_FORMAT_MPEG4_AVC:
1040 width = align(width, VL_MACROBLOCK_WIDTH);
1041 height = align(height, VL_MACROBLOCK_HEIGHT);
1042 break;
1043
1044 default:
1045 break;
1046 }
1047
1048
1049 dec = CALLOC_STRUCT(ruvd_decoder);
1050
1051 if (!dec)
1052 return NULL;
1053
1054 if (info.drm_major < 3)
1055 dec->use_legacy = TRUE;
1056
1057 dec->base = *templ;
1058 dec->base.context = context;
1059 dec->base.width = width;
1060 dec->base.height = height;
1061
1062 dec->base.destroy = ruvd_destroy;
1063 dec->base.begin_frame = ruvd_begin_frame;
1064 dec->base.decode_macroblock = ruvd_decode_macroblock;
1065 dec->base.decode_bitstream = ruvd_decode_bitstream;
1066 dec->base.end_frame = ruvd_end_frame;
1067 dec->base.flush = ruvd_flush;
1068
1069 dec->stream_type = profile2stream_type(dec, info.family);
1070 dec->set_dtb = set_dtb;
1071 dec->stream_handle = rvid_alloc_stream_handle();
1072 dec->screen = context->screen;
1073 dec->ws = ws;
1074 dec->cs = ws->cs_create(rctx->ctx, RING_UVD, NULL, NULL, NULL);
1075 if (!dec->cs) {
1076 RVID_ERR("Can't get command submission context.\n");
1077 goto error;
1078 }
1079
1080 bs_buf_size = width * height * 512 / (16 * 16);
1081 for (i = 0; i < NUM_BUFFERS; ++i) {
1082 unsigned msg_fb_it_size = FB_BUFFER_OFFSET + FB_BUFFER_SIZE;
1083 STATIC_ASSERT(sizeof(struct ruvd_msg) <= FB_BUFFER_OFFSET);
1084 if (have_it(dec))
1085 msg_fb_it_size += IT_SCALING_TABLE_SIZE;
1086 if (!rvid_create_buffer(dec->screen, &dec->msg_fb_it_buffers[i],
1087 msg_fb_it_size, PIPE_USAGE_STAGING)) {
1088 RVID_ERR("Can't allocated message buffers.\n");
1089 goto error;
1090 }
1091
1092 if (!rvid_create_buffer(dec->screen, &dec->bs_buffers[i],
1093 bs_buf_size, PIPE_USAGE_STAGING)) {
1094 RVID_ERR("Can't allocated bitstream buffers.\n");
1095 goto error;
1096 }
1097
1098 rvid_clear_buffer(context, &dec->msg_fb_it_buffers[i]);
1099 rvid_clear_buffer(context, &dec->bs_buffers[i]);
1100 }
1101
1102 dpb_size = calc_dpb_size(dec);
1103
1104 if (!rvid_create_buffer(dec->screen, &dec->dpb, dpb_size, PIPE_USAGE_DEFAULT)) {
1105 RVID_ERR("Can't allocated dpb.\n");
1106 goto error;
1107 }
1108
1109 rvid_clear_buffer(context, &dec->dpb);
1110
1111 if (u_reduce_video_profile(dec->base.profile) == PIPE_VIDEO_FORMAT_HEVC) {
1112 unsigned ctx_size = calc_ctx_size(dec);
1113 if (!rvid_create_buffer(dec->screen, &dec->ctx, ctx_size, PIPE_USAGE_DEFAULT)) {
1114 RVID_ERR("Can't allocated context buffer.\n");
1115 goto error;
1116 }
1117 rvid_clear_buffer(context, &dec->ctx);
1118 }
1119
1120 map_msg_fb_it_buf(dec);
1121 dec->msg->size = sizeof(*dec->msg);
1122 dec->msg->msg_type = RUVD_MSG_CREATE;
1123 dec->msg->stream_handle = dec->stream_handle;
1124 dec->msg->body.create.stream_type = dec->stream_type;
1125 dec->msg->body.create.width_in_samples = dec->base.width;
1126 dec->msg->body.create.height_in_samples = dec->base.height;
1127 dec->msg->body.create.dpb_size = dpb_size;
1128 send_msg_buf(dec);
1129 flush(dec);
1130 next_buffer(dec);
1131
1132 return &dec->base;
1133
1134 error:
1135 if (dec->cs) dec->ws->cs_destroy(dec->cs);
1136
1137 for (i = 0; i < NUM_BUFFERS; ++i) {
1138 rvid_destroy_buffer(&dec->msg_fb_it_buffers[i]);
1139 rvid_destroy_buffer(&dec->bs_buffers[i]);
1140 }
1141
1142 rvid_destroy_buffer(&dec->dpb);
1143 if (u_reduce_video_profile(dec->base.profile) == PIPE_VIDEO_FORMAT_HEVC)
1144 rvid_destroy_buffer(&dec->ctx);
1145
1146 FREE(dec);
1147
1148 return NULL;
1149 }
1150
1151 /* calculate top/bottom offset */
1152 static unsigned texture_offset(struct radeon_surf *surface, unsigned layer)
1153 {
1154 return surface->level[0].offset +
1155 layer * surface->level[0].slice_size;
1156 }
1157
1158 /* hw encode the aspect of macro tiles */
1159 static unsigned macro_tile_aspect(unsigned macro_tile_aspect)
1160 {
1161 switch (macro_tile_aspect) {
1162 default:
1163 case 1: macro_tile_aspect = 0; break;
1164 case 2: macro_tile_aspect = 1; break;
1165 case 4: macro_tile_aspect = 2; break;
1166 case 8: macro_tile_aspect = 3; break;
1167 }
1168 return macro_tile_aspect;
1169 }
1170
1171 /* hw encode the bank width and height */
1172 static unsigned bank_wh(unsigned bankwh)
1173 {
1174 switch (bankwh) {
1175 default:
1176 case 1: bankwh = 0; break;
1177 case 2: bankwh = 1; break;
1178 case 4: bankwh = 2; break;
1179 case 8: bankwh = 3; break;
1180 }
1181 return bankwh;
1182 }
1183
1184 /**
1185 * fill decoding target field from the luma and chroma surfaces
1186 */
1187 void ruvd_set_dt_surfaces(struct ruvd_msg *msg, struct radeon_surf *luma,
1188 struct radeon_surf *chroma)
1189 {
1190 msg->body.decode.dt_pitch = luma->level[0].pitch_bytes;
1191 switch (luma->level[0].mode) {
1192 case RADEON_SURF_MODE_LINEAR_ALIGNED:
1193 msg->body.decode.dt_tiling_mode = RUVD_TILE_LINEAR;
1194 msg->body.decode.dt_array_mode = RUVD_ARRAY_MODE_LINEAR;
1195 break;
1196 case RADEON_SURF_MODE_1D:
1197 msg->body.decode.dt_tiling_mode = RUVD_TILE_8X8;
1198 msg->body.decode.dt_array_mode = RUVD_ARRAY_MODE_1D_THIN;
1199 break;
1200 case RADEON_SURF_MODE_2D:
1201 msg->body.decode.dt_tiling_mode = RUVD_TILE_8X8;
1202 msg->body.decode.dt_array_mode = RUVD_ARRAY_MODE_2D_THIN;
1203 break;
1204 default:
1205 assert(0);
1206 break;
1207 }
1208
1209 msg->body.decode.dt_luma_top_offset = texture_offset(luma, 0);
1210 msg->body.decode.dt_chroma_top_offset = texture_offset(chroma, 0);
1211 if (msg->body.decode.dt_field_mode) {
1212 msg->body.decode.dt_luma_bottom_offset = texture_offset(luma, 1);
1213 msg->body.decode.dt_chroma_bottom_offset = texture_offset(chroma, 1);
1214 } else {
1215 msg->body.decode.dt_luma_bottom_offset = msg->body.decode.dt_luma_top_offset;
1216 msg->body.decode.dt_chroma_bottom_offset = msg->body.decode.dt_chroma_top_offset;
1217 }
1218
1219 assert(luma->bankw == chroma->bankw);
1220 assert(luma->bankh == chroma->bankh);
1221 assert(luma->mtilea == chroma->mtilea);
1222
1223 msg->body.decode.dt_surf_tile_config |= RUVD_BANK_WIDTH(bank_wh(luma->bankw));
1224 msg->body.decode.dt_surf_tile_config |= RUVD_BANK_HEIGHT(bank_wh(luma->bankh));
1225 msg->body.decode.dt_surf_tile_config |= RUVD_MACRO_TILE_ASPECT_RATIO(macro_tile_aspect(luma->mtilea));
1226 }