projects / mesa.git / blob
? search:
summary | shortlog | log | commit | commitdiff | tree
history | raw | HEAD
radeon/uvd: fix tonga feedback buffer size
[mesa.git] / src / gallium / drivers / radeon / radeon_uvd.c
1 /**************************************************************************
2 *
3 * Copyright 2011 Advanced Micro Devices, Inc.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28 /*
29 * Authors:
30 * Christian König <christian.koenig@amd.com>
31 *
32 */
33
34 #include <sys/types.h>
35 #include <assert.h>
36 #include <errno.h>
37 #include <unistd.h>
38 #include <stdio.h>
39
40 #include "pipe/p_video_codec.h"
41
42 #include "util/u_memory.h"
43 #include "util/u_video.h"
44
45 #include "vl/vl_defines.h"
46 #include "vl/vl_mpeg12_decoder.h"
47
48 #include "r600_pipe_common.h"
49 #include "radeon_video.h"
50 #include "radeon_uvd.h"
51
52 #define NUM_BUFFERS 4
53
54 #define NUM_MPEG2_REFS 6
55 #define NUM_H264_REFS 17
56 #define NUM_VC1_REFS 5
57
58 #define FB_BUFFER_OFFSET 0x1000
59 #define FB_BUFFER_SIZE 2048
60 #define FB_BUFFER_SIZE_TONGA (2048 * 64)
61 #define IT_SCALING_TABLE_SIZE 992
62
63 /* UVD decoder representation */
64 struct ruvd_decoder {
65 struct pipe_video_codec base;
66
67 ruvd_set_dtb set_dtb;
68
69 unsigned stream_handle;
70 unsigned stream_type;
71 unsigned frame_number;
72
73 struct pipe_screen *screen;
74 struct radeon_winsys* ws;
75 struct radeon_winsys_cs* cs;
76
77 unsigned cur_buffer;
78
79 struct rvid_buffer msg_fb_it_buffers[NUM_BUFFERS];
80 struct ruvd_msg *msg;
81 uint32_t *fb;
82 unsigned fb_size;
83 uint8_t *it;
84
85 struct rvid_buffer bs_buffers[NUM_BUFFERS];
86 void* bs_ptr;
87 unsigned bs_size;
88
89 struct rvid_buffer dpb;
90 bool use_legacy;
91 struct rvid_buffer ctx;
92 };
93
94 /* flush IB to the hardware */
95 static void flush(struct ruvd_decoder *dec)
96 {
97 dec->ws->cs_flush(dec->cs, RADEON_FLUSH_ASYNC, NULL);
98 }
99
100 /* add a new set register command to the IB */
101 static void set_reg(struct ruvd_decoder *dec, unsigned reg, uint32_t val)
102 {
103 uint32_t *pm4 = dec->cs->buf;
104 pm4[dec->cs->cdw++] = RUVD_PKT0(reg >> 2, 0);
105 pm4[dec->cs->cdw++] = val;
106 }
107
108 /* send a command to the VCPU through the GPCOM registers */
109 static void send_cmd(struct ruvd_decoder *dec, unsigned cmd,
110 struct pb_buffer* buf, uint32_t off,
111 enum radeon_bo_usage usage, enum radeon_bo_domain domain)
112 {
113 int reloc_idx;
114
115 reloc_idx = dec->ws->cs_add_buffer(dec->cs, buf, usage, domain,
116 RADEON_PRIO_UVD);
117 if (!dec->use_legacy) {
118 uint64_t addr;
119 addr = dec->ws->buffer_get_virtual_address(buf);
120 addr = addr + off;
121 set_reg(dec, RUVD_GPCOM_VCPU_DATA0, addr);
122 set_reg(dec, RUVD_GPCOM_VCPU_DATA1, addr >> 32);
123 } else {
124 set_reg(dec, RUVD_GPCOM_VCPU_DATA0, off);
125 set_reg(dec, RUVD_GPCOM_VCPU_DATA1, reloc_idx * 4);
126 }
127 set_reg(dec, RUVD_GPCOM_VCPU_CMD, cmd << 1);
128 }
129
130 /* do the codec needs an IT buffer ?*/
131 static bool have_it(struct ruvd_decoder *dec)
132 {
133 return dec->stream_type == RUVD_CODEC_H264_PERF ||
134 dec->stream_type == RUVD_CODEC_H265;
135 }
136
137 /* map the next available message/feedback/itscaling buffer */
138 static void map_msg_fb_it_buf(struct ruvd_decoder *dec)
139 {
140 struct rvid_buffer* buf;
141 uint8_t *ptr;
142
143 /* grab the current message/feedback buffer */
144 buf = &dec->msg_fb_it_buffers[dec->cur_buffer];
145
146 /* and map it for CPU access */
147 ptr = dec->ws->buffer_map(buf->res->buf, dec->cs, PIPE_TRANSFER_WRITE);
148
149 /* calc buffer offsets */
150 dec->msg = (struct ruvd_msg *)ptr;
151 dec->fb = (uint32_t *)(ptr + FB_BUFFER_OFFSET);
152 if (have_it(dec))
153 dec->it = (uint8_t *)(ptr + FB_BUFFER_OFFSET + dec->fb_size);
154 }
155
156 /* unmap and send a message command to the VCPU */
157 static void send_msg_buf(struct ruvd_decoder *dec)
158 {
159 struct rvid_buffer* buf;
160
161 /* ignore the request if message/feedback buffer isn't mapped */
162 if (!dec->msg || !dec->fb)
163 return;
164
165 /* grab the current message buffer */
166 buf = &dec->msg_fb_it_buffers[dec->cur_buffer];
167
168 /* unmap the buffer */
169 dec->ws->buffer_unmap(buf->res->buf);
170 dec->msg = NULL;
171 dec->fb = NULL;
172 dec->it = NULL;
173
174 /* and send it to the hardware */
175 send_cmd(dec, RUVD_CMD_MSG_BUFFER, buf->res->buf, 0,
176 RADEON_USAGE_READ, RADEON_DOMAIN_GTT);
177 }
178
179 /* cycle to the next set of buffers */
180 static void next_buffer(struct ruvd_decoder *dec)
181 {
182 ++dec->cur_buffer;
183 dec->cur_buffer %= NUM_BUFFERS;
184 }
185
186 /* convert the profile into something UVD understands */
187 static uint32_t profile2stream_type(struct ruvd_decoder *dec, unsigned family)
188 {
189 switch (u_reduce_video_profile(dec->base.profile)) {
190 case PIPE_VIDEO_FORMAT_MPEG4_AVC:
191 return (family >= CHIP_TONGA) ?
192 RUVD_CODEC_H264_PERF : RUVD_CODEC_H264;
193
194 case PIPE_VIDEO_FORMAT_VC1:
195 return RUVD_CODEC_VC1;
196
197 case PIPE_VIDEO_FORMAT_MPEG12:
198 return RUVD_CODEC_MPEG2;
199
200 case PIPE_VIDEO_FORMAT_MPEG4:
201 return RUVD_CODEC_MPEG4;
202
203 case PIPE_VIDEO_FORMAT_HEVC:
204 return RUVD_CODEC_H265;
205
206 default:
207 assert(0);
208 return 0;
209 }
210 }
211
212 static unsigned calc_ctx_size_h265_main(struct ruvd_decoder *dec)
213 {
214 unsigned width = align(dec->base.width, VL_MACROBLOCK_WIDTH);
215 unsigned height = align(dec->base.height, VL_MACROBLOCK_HEIGHT);
216
217 unsigned max_references = dec->base.max_references + 1;
218
219 if (dec->base.width * dec->base.height >= 4096*2000)
220 max_references = MAX2(max_references, 8);
221 else
222 max_references = MAX2(max_references, 17);
223
224 width = align (width, 16);
225 height = align (height, 16);
226 return ((width + 255) / 16) * ((height + 255) / 16) * 16 * max_references + 52 * 1024;
227 }
228
229 static unsigned calc_ctx_size_h265_main10(struct ruvd_decoder *dec, struct pipe_h265_picture_desc *pic)
230 {
231 unsigned block_size, log2_ctb_size, width_in_ctb, height_in_ctb, num_16x16_block_per_ctb;
232 unsigned context_buffer_size_per_ctb_row, cm_buffer_size, max_mb_address, db_left_tile_pxl_size;
233 unsigned db_left_tile_ctx_size = 4096 / 16 * (32 + 16 * 4);
234
235 unsigned width = align(dec->base.width, VL_MACROBLOCK_WIDTH);
236 unsigned height = align(dec->base.height, VL_MACROBLOCK_HEIGHT);
237 unsigned coeff_10bit = (pic->pps->sps->bit_depth_luma_minus8 || pic->pps->sps->bit_depth_chroma_minus8) ? 2 : 1;
238
239 unsigned max_references = dec->base.max_references + 1;
240
241 if (dec->base.width * dec->base.height >= 4096*2000)
242 max_references = MAX2(max_references, 8);
243 else
244 max_references = MAX2(max_references, 17);
245
246 block_size = (1 << (pic->pps->sps->log2_min_luma_coding_block_size_minus3 + 3));
247 log2_ctb_size = block_size + pic->pps->sps->log2_diff_max_min_luma_coding_block_size;
248
249 width_in_ctb = (width + ((1 << log2_ctb_size) - 1)) >> log2_ctb_size;
250 height_in_ctb = (height + ((1 << log2_ctb_size) - 1)) >> log2_ctb_size;
251
252 num_16x16_block_per_ctb = ((1 << log2_ctb_size) >> 4) * ((1 << log2_ctb_size) >> 4);
253 context_buffer_size_per_ctb_row = align(width_in_ctb * num_16x16_block_per_ctb * 16, 256);
254 max_mb_address = (unsigned) ceil(height * 8 / 2048.0);
255
256 cm_buffer_size = max_references * context_buffer_size_per_ctb_row * height_in_ctb;
257 db_left_tile_pxl_size = coeff_10bit * (max_mb_address * 2 * 2048 + 1024);
258
259 return cm_buffer_size + db_left_tile_ctx_size + db_left_tile_pxl_size;
260 }
261
262 /* calculate size of reference picture buffer */
263 static unsigned calc_dpb_size(struct ruvd_decoder *dec)
264 {
265 unsigned width_in_mb, height_in_mb, image_size, dpb_size;
266
267 // always align them to MB size for dpb calculation
268 unsigned width = align(dec->base.width, VL_MACROBLOCK_WIDTH);
269 unsigned height = align(dec->base.height, VL_MACROBLOCK_HEIGHT);
270
271 // always one more for currently decoded picture
272 unsigned max_references = dec->base.max_references + 1;
273
274 // aligned size of a single frame
275 image_size = width * height;
276 image_size += image_size / 2;
277 image_size = align(image_size, 1024);
278
279 // picture width & height in 16 pixel units
280 width_in_mb = width / VL_MACROBLOCK_WIDTH;
281 height_in_mb = align(height / VL_MACROBLOCK_HEIGHT, 2);
282
283 switch (u_reduce_video_profile(dec->base.profile)) {
284 case PIPE_VIDEO_FORMAT_MPEG4_AVC: {
285 if (!dec->use_legacy) {
286 unsigned fs_in_mb = width_in_mb * height_in_mb;
287 unsigned alignment = 64, num_dpb_buffer;
288
289 if (dec->stream_type == RUVD_CODEC_H264_PERF)
290 alignment = 256;
291 switch(dec->base.level) {
292 case 30:
293 num_dpb_buffer = 8100 / fs_in_mb;
294 break;
295 case 31:
296 num_dpb_buffer = 18000 / fs_in_mb;
297 break;
298 case 32:
299 num_dpb_buffer = 20480 / fs_in_mb;
300 break;
301 case 41:
302 num_dpb_buffer = 32768 / fs_in_mb;
303 break;
304 case 42:
305 num_dpb_buffer = 34816 / fs_in_mb;
306 break;
307 case 50:
308 num_dpb_buffer = 110400 / fs_in_mb;
309 break;
310 case 51:
311 num_dpb_buffer = 184320 / fs_in_mb;
312 break;
313 default:
314 num_dpb_buffer = 184320 / fs_in_mb;
315 break;
316 }
317 num_dpb_buffer++;
318 max_references = MAX2(MIN2(NUM_H264_REFS, num_dpb_buffer), max_references);
319 dpb_size = image_size * max_references;
320 dpb_size += max_references * align(width_in_mb * height_in_mb * 192, alignment);
321 dpb_size += align(width_in_mb * height_in_mb * 32, alignment);
322 } else {
323 // the firmware seems to allways assume a minimum of ref frames
324 max_references = MAX2(NUM_H264_REFS, max_references);
325 // reference picture buffer
326 dpb_size = image_size * max_references;
327 // macroblock context buffer
328 dpb_size += width_in_mb * height_in_mb * max_references * 192;
329 // IT surface buffer
330 dpb_size += width_in_mb * height_in_mb * 32;
331 }
332 break;
333 }
334
335 case PIPE_VIDEO_FORMAT_HEVC:
336 if (dec->base.width * dec->base.height >= 4096*2000)
337 max_references = MAX2(max_references, 8);
338 else
339 max_references = MAX2(max_references, 17);
340
341 width = align (width, 16);
342 height = align (height, 16);
343 if (dec->base.profile == PIPE_VIDEO_PROFILE_HEVC_MAIN_10)
344 dpb_size = align((width * height * 9) / 4, 256) * max_references;
345 else
346 dpb_size = align((width * height * 3) / 2, 256) * max_references;
347 break;
348
349 case PIPE_VIDEO_FORMAT_VC1:
350 // the firmware seems to allways assume a minimum of ref frames
351 max_references = MAX2(NUM_VC1_REFS, max_references);
352
353 // reference picture buffer
354 dpb_size = image_size * max_references;
355
356 // CONTEXT_BUFFER
357 dpb_size += width_in_mb * height_in_mb * 128;
358
359 // IT surface buffer
360 dpb_size += width_in_mb * 64;
361
362 // DB surface buffer
363 dpb_size += width_in_mb * 128;
364
365 // BP
366 dpb_size += align(MAX2(width_in_mb, height_in_mb) * 7 * 16, 64);
367 break;
368
369 case PIPE_VIDEO_FORMAT_MPEG12:
370 // reference picture buffer, must be big enough for all frames
371 dpb_size = image_size * NUM_MPEG2_REFS;
372 break;
373
374 case PIPE_VIDEO_FORMAT_MPEG4:
375 // reference picture buffer
376 dpb_size = image_size * max_references;
377
378 // CM
379 dpb_size += width_in_mb * height_in_mb * 64;
380
381 // IT surface buffer
382 dpb_size += align(width_in_mb * height_in_mb * 32, 64);
383
384 dpb_size = MAX2(dpb_size, 30 * 1024 * 1024);
385 break;
386
387 default:
388 // something is missing here
389 assert(0);
390
391 // at least use a sane default value
392 dpb_size = 32 * 1024 * 1024;
393 break;
394 }
395 return dpb_size;
396 }
397
398 /* free associated data in the video buffer callback */
399 static void ruvd_destroy_associated_data(void *data)
400 {
401 /* NOOP, since we only use an intptr */
402 }
403
404 /* get h264 specific message bits */
405 static struct ruvd_h264 get_h264_msg(struct ruvd_decoder *dec, struct pipe_h264_picture_desc *pic)
406 {
407 struct ruvd_h264 result;
408
409 memset(&result, 0, sizeof(result));
410 switch (pic->base.profile) {
411 case PIPE_VIDEO_PROFILE_MPEG4_AVC_BASELINE:
412 result.profile = RUVD_H264_PROFILE_BASELINE;
413 break;
414
415 case PIPE_VIDEO_PROFILE_MPEG4_AVC_MAIN:
416 result.profile = RUVD_H264_PROFILE_MAIN;
417 break;
418
419 case PIPE_VIDEO_PROFILE_MPEG4_AVC_HIGH:
420 result.profile = RUVD_H264_PROFILE_HIGH;
421 break;
422
423 default:
424 assert(0);
425 break;
426 }
427
428 result.level = dec->base.level;
429
430 result.sps_info_flags = 0;
431 result.sps_info_flags |= pic->pps->sps->direct_8x8_inference_flag << 0;
432 result.sps_info_flags |= pic->pps->sps->mb_adaptive_frame_field_flag << 1;
433 result.sps_info_flags |= pic->pps->sps->frame_mbs_only_flag << 2;
434 result.sps_info_flags |= pic->pps->sps->delta_pic_order_always_zero_flag << 3;
435
436 result.bit_depth_luma_minus8 = pic->pps->sps->bit_depth_luma_minus8;
437 result.bit_depth_chroma_minus8 = pic->pps->sps->bit_depth_chroma_minus8;
438 result.log2_max_frame_num_minus4 = pic->pps->sps->log2_max_frame_num_minus4;
439 result.pic_order_cnt_type = pic->pps->sps->pic_order_cnt_type;
440 result.log2_max_pic_order_cnt_lsb_minus4 = pic->pps->sps->log2_max_pic_order_cnt_lsb_minus4;
441
442 switch (dec->base.chroma_format) {
443 case PIPE_VIDEO_CHROMA_FORMAT_NONE:
444 /* TODO: assert? */
445 break;
446 case PIPE_VIDEO_CHROMA_FORMAT_400:
447 result.chroma_format = 0;
448 break;
449 case PIPE_VIDEO_CHROMA_FORMAT_420:
450 result.chroma_format = 1;
451 break;
452 case PIPE_VIDEO_CHROMA_FORMAT_422:
453 result.chroma_format = 2;
454 break;
455 case PIPE_VIDEO_CHROMA_FORMAT_444:
456 result.chroma_format = 3;
457 break;
458 }
459
460 result.pps_info_flags = 0;
461 result.pps_info_flags |= pic->pps->transform_8x8_mode_flag << 0;
462 result.pps_info_flags |= pic->pps->redundant_pic_cnt_present_flag << 1;
463 result.pps_info_flags |= pic->pps->constrained_intra_pred_flag << 2;
464 result.pps_info_flags |= pic->pps->deblocking_filter_control_present_flag << 3;
465 result.pps_info_flags |= pic->pps->weighted_bipred_idc << 4;
466 result.pps_info_flags |= pic->pps->weighted_pred_flag << 6;
467 result.pps_info_flags |= pic->pps->bottom_field_pic_order_in_frame_present_flag << 7;
468 result.pps_info_flags |= pic->pps->entropy_coding_mode_flag << 8;
469
470 result.num_slice_groups_minus1 = pic->pps->num_slice_groups_minus1;
471 result.slice_group_map_type = pic->pps->slice_group_map_type;
472 result.slice_group_change_rate_minus1 = pic->pps->slice_group_change_rate_minus1;
473 result.pic_init_qp_minus26 = pic->pps->pic_init_qp_minus26;
474 result.chroma_qp_index_offset = pic->pps->chroma_qp_index_offset;
475 result.second_chroma_qp_index_offset = pic->pps->second_chroma_qp_index_offset;
476
477 memcpy(result.scaling_list_4x4, pic->pps->ScalingList4x4, 6*16);
478 memcpy(result.scaling_list_8x8, pic->pps->ScalingList8x8, 2*64);
479
480 if (dec->stream_type == RUVD_CODEC_H264_PERF) {
481 memcpy(dec->it, result.scaling_list_4x4, 6*16);
482 memcpy((dec->it + 96), result.scaling_list_8x8, 2*64);
483 }
484
485 result.num_ref_frames = pic->num_ref_frames;
486
487 result.num_ref_idx_l0_active_minus1 = pic->num_ref_idx_l0_active_minus1;
488 result.num_ref_idx_l1_active_minus1 = pic->num_ref_idx_l1_active_minus1;
489
490 result.frame_num = pic->frame_num;
491 memcpy(result.frame_num_list, pic->frame_num_list, 4*16);
492 result.curr_field_order_cnt_list[0] = pic->field_order_cnt[0];
493 result.curr_field_order_cnt_list[1] = pic->field_order_cnt[1];
494 memcpy(result.field_order_cnt_list, pic->field_order_cnt_list, 4*16*2);
495
496 result.decoded_pic_idx = pic->frame_num;
497
498 return result;
499 }
500
501 /* get h265 specific message bits */
502 static struct ruvd_h265 get_h265_msg(struct ruvd_decoder *dec, struct pipe_video_buffer *target,
503 struct pipe_h265_picture_desc *pic)
504 {
505 struct ruvd_h265 result;
506 unsigned i;
507
508 memset(&result, 0, sizeof(result));
509
510 result.sps_info_flags = 0;
511 result.sps_info_flags |= pic->pps->sps->scaling_list_enabled_flag << 0;
512 result.sps_info_flags |= pic->pps->sps->amp_enabled_flag << 1;
513 result.sps_info_flags |= pic->pps->sps->sample_adaptive_offset_enabled_flag << 2;
514 result.sps_info_flags |= pic->pps->sps->pcm_enabled_flag << 3;
515 result.sps_info_flags |= pic->pps->sps->pcm_loop_filter_disabled_flag << 4;
516 result.sps_info_flags |= pic->pps->sps->long_term_ref_pics_present_flag << 5;
517 result.sps_info_flags |= pic->pps->sps->sps_temporal_mvp_enabled_flag << 6;
518 result.sps_info_flags |= pic->pps->sps->strong_intra_smoothing_enabled_flag << 7;
519 result.sps_info_flags |= pic->pps->sps->separate_colour_plane_flag << 8;
520 if (((struct r600_common_screen*)dec->screen)->family == CHIP_CARRIZO)
521 result.sps_info_flags |= 1 << 9;
522 if (pic->UseRefPicList == true)
523 result.sps_info_flags |= 1 << 10;
524
525 result.chroma_format = pic->pps->sps->chroma_format_idc;
526 result.bit_depth_luma_minus8 = pic->pps->sps->bit_depth_luma_minus8;
527 result.bit_depth_chroma_minus8 = pic->pps->sps->bit_depth_chroma_minus8;
528 result.log2_max_pic_order_cnt_lsb_minus4 = pic->pps->sps->log2_max_pic_order_cnt_lsb_minus4;
529 result.sps_max_dec_pic_buffering_minus1 = pic->pps->sps->sps_max_dec_pic_buffering_minus1;
530 result.log2_min_luma_coding_block_size_minus3 = pic->pps->sps->log2_min_luma_coding_block_size_minus3;
531 result.log2_diff_max_min_luma_coding_block_size = pic->pps->sps->log2_diff_max_min_luma_coding_block_size;
532 result.log2_min_transform_block_size_minus2 = pic->pps->sps->log2_min_transform_block_size_minus2;
533 result.log2_diff_max_min_transform_block_size = pic->pps->sps->log2_diff_max_min_transform_block_size;
534 result.max_transform_hierarchy_depth_inter = pic->pps->sps->max_transform_hierarchy_depth_inter;
535 result.max_transform_hierarchy_depth_intra = pic->pps->sps->max_transform_hierarchy_depth_intra;
536 result.pcm_sample_bit_depth_luma_minus1 = pic->pps->sps->pcm_sample_bit_depth_luma_minus1;
537 result.pcm_sample_bit_depth_chroma_minus1 = pic->pps->sps->pcm_sample_bit_depth_chroma_minus1;
538 result.log2_min_pcm_luma_coding_block_size_minus3 = pic->pps->sps->log2_min_pcm_luma_coding_block_size_minus3;
539 result.log2_diff_max_min_pcm_luma_coding_block_size = pic->pps->sps->log2_diff_max_min_pcm_luma_coding_block_size;
540 result.num_short_term_ref_pic_sets = pic->pps->sps->num_short_term_ref_pic_sets;
541
542 result.pps_info_flags = 0;
543 result.pps_info_flags |= pic->pps->dependent_slice_segments_enabled_flag << 0;
544 result.pps_info_flags |= pic->pps->output_flag_present_flag << 1;
545 result.pps_info_flags |= pic->pps->sign_data_hiding_enabled_flag << 2;
546 result.pps_info_flags |= pic->pps->cabac_init_present_flag << 3;
547 result.pps_info_flags |= pic->pps->constrained_intra_pred_flag << 4;
548 result.pps_info_flags |= pic->pps->transform_skip_enabled_flag << 5;
549 result.pps_info_flags |= pic->pps->cu_qp_delta_enabled_flag << 6;
550 result.pps_info_flags |= pic->pps->pps_slice_chroma_qp_offsets_present_flag << 7;
551 result.pps_info_flags |= pic->pps->weighted_pred_flag << 8;
552 result.pps_info_flags |= pic->pps->weighted_bipred_flag << 9;
553 result.pps_info_flags |= pic->pps->transquant_bypass_enabled_flag << 10;
554 result.pps_info_flags |= pic->pps->tiles_enabled_flag << 11;
555 result.pps_info_flags |= pic->pps->entropy_coding_sync_enabled_flag << 12;
556 result.pps_info_flags |= pic->pps->uniform_spacing_flag << 13;
557 result.pps_info_flags |= pic->pps->loop_filter_across_tiles_enabled_flag << 14;
558 result.pps_info_flags |= pic->pps->pps_loop_filter_across_slices_enabled_flag << 15;
559 result.pps_info_flags |= pic->pps->deblocking_filter_override_enabled_flag << 16;
560 result.pps_info_flags |= pic->pps->pps_deblocking_filter_disabled_flag << 17;
561 result.pps_info_flags |= pic->pps->lists_modification_present_flag << 18;
562 result.pps_info_flags |= pic->pps->slice_segment_header_extension_present_flag << 19;
563 //result.pps_info_flags |= pic->pps->deblocking_filter_control_present_flag; ???
564
565 result.num_extra_slice_header_bits = pic->pps->num_extra_slice_header_bits;
566 result.num_long_term_ref_pic_sps = pic->pps->sps->num_long_term_ref_pics_sps;
567 result.num_ref_idx_l0_default_active_minus1 = pic->pps->num_ref_idx_l0_default_active_minus1;
568 result.num_ref_idx_l1_default_active_minus1 = pic->pps->num_ref_idx_l1_default_active_minus1;
569 result.pps_cb_qp_offset = pic->pps->pps_cb_qp_offset;
570 result.pps_cr_qp_offset = pic->pps->pps_cr_qp_offset;
571 result.pps_beta_offset_div2 = pic->pps->pps_beta_offset_div2;
572 result.pps_tc_offset_div2 = pic->pps->pps_tc_offset_div2;
573 result.diff_cu_qp_delta_depth = pic->pps->diff_cu_qp_delta_depth;
574 result.num_tile_columns_minus1 = pic->pps->num_tile_columns_minus1;
575 result.num_tile_rows_minus1 = pic->pps->num_tile_rows_minus1;
576 result.log2_parallel_merge_level_minus2 = pic->pps->log2_parallel_merge_level_minus2;
577 result.init_qp_minus26 = pic->pps->init_qp_minus26;
578
579 for (i = 0; i < 19; ++i)
580 result.column_width_minus1[i] = pic->pps->column_width_minus1[i];
581
582 for (i = 0; i < 21; ++i)
583 result.row_height_minus1[i] = pic->pps->row_height_minus1[i];
584
585 result.num_delta_pocs_ref_rps_idx = pic->NumDeltaPocsOfRefRpsIdx;
586 result.curr_idx = pic->CurrPicOrderCntVal;
587 result.curr_poc = pic->CurrPicOrderCntVal;
588
589 vl_video_buffer_set_associated_data(target, &dec->base,
590 (void *)(uintptr_t)pic->CurrPicOrderCntVal,
591 &ruvd_destroy_associated_data);
592
593 for (i = 0; i < 16; ++i) {
594 struct pipe_video_buffer *ref = pic->ref[i];
595 uintptr_t ref_pic = 0;
596
597 result.poc_list[i] = pic->PicOrderCntVal[i];
598
599 if (ref)
600 ref_pic = (uintptr_t)vl_video_buffer_get_associated_data(ref, &dec->base);
601 else
602 ref_pic = 0x7F;
603 result.ref_pic_list[i] = ref_pic;
604 }
605
606 for (i = 0; i < 8; ++i) {
607 result.ref_pic_set_st_curr_before[i] = 0xFF;
608 result.ref_pic_set_st_curr_after[i] = 0xFF;
609 result.ref_pic_set_lt_curr[i] = 0xFF;
610 }
611
612 for (i = 0; i < pic->NumPocStCurrBefore; ++i)
613 result.ref_pic_set_st_curr_before[i] = pic->RefPicSetStCurrBefore[i];
614
615 for (i = 0; i < pic->NumPocStCurrAfter; ++i)
616 result.ref_pic_set_st_curr_after[i] = pic->RefPicSetStCurrAfter[i];
617
618 for (i = 0; i < pic->NumPocLtCurr; ++i)
619 result.ref_pic_set_lt_curr[i] = pic->RefPicSetLtCurr[i];
620
621 for (i = 0; i < 6; ++i)
622 result.ucScalingListDCCoefSizeID2[i] = pic->pps->sps->ScalingListDCCoeff16x16[i];
623
624 for (i = 0; i < 2; ++i)
625 result.ucScalingListDCCoefSizeID3[i] = pic->pps->sps->ScalingListDCCoeff32x32[i];
626
627 memcpy(dec->it, pic->pps->sps->ScalingList4x4, 6 * 16);
628 memcpy(dec->it + 96, pic->pps->sps->ScalingList8x8, 6 * 64);
629 memcpy(dec->it + 480, pic->pps->sps->ScalingList16x16, 6 * 64);
630 memcpy(dec->it + 864, pic->pps->sps->ScalingList32x32, 2 * 64);
631
632 for (i = 0 ; i < 2 ; i++) {
633 for (int j = 0 ; j < 15 ; j++)
634 result.direct_reflist[i][j] = pic->RefPicList[i][j];
635 }
636
637 if ((pic->base.profile == PIPE_VIDEO_PROFILE_HEVC_MAIN_10) &&
638 (target->buffer_format == PIPE_FORMAT_NV12)) {
639 result.p010_mode = 0;
640 result.luma_10to8 = 5;
641 result.chroma_10to8 = 5;
642 result.sclr_luma10to8 = 4;
643 result.sclr_chroma10to8 = 4;
644 }
645
646 /* TODO
647 result.highestTid;
648 result.isNonRef;
649
650 IDRPicFlag;
651 RAPPicFlag;
652 NumPocTotalCurr;
653 NumShortTermPictureSliceHeaderBits;
654 NumLongTermPictureSliceHeaderBits;
655
656 IsLongTerm[16];
657 */
658
659 return result;
660 }
661
662 /* get vc1 specific message bits */
663 static struct ruvd_vc1 get_vc1_msg(struct pipe_vc1_picture_desc *pic)
664 {
665 struct ruvd_vc1 result;
666
667 memset(&result, 0, sizeof(result));
668
669 switch(pic->base.profile) {
670 case PIPE_VIDEO_PROFILE_VC1_SIMPLE:
671 result.profile = RUVD_VC1_PROFILE_SIMPLE;
672 result.level = 1;
673 break;
674
675 case PIPE_VIDEO_PROFILE_VC1_MAIN:
676 result.profile = RUVD_VC1_PROFILE_MAIN;
677 result.level = 2;
678 break;
679
680 case PIPE_VIDEO_PROFILE_VC1_ADVANCED:
681 result.profile = RUVD_VC1_PROFILE_ADVANCED;
682 result.level = 4;
683 break;
684
685 default:
686 assert(0);
687 }
688
689 /* fields common for all profiles */
690 result.sps_info_flags |= pic->postprocflag << 7;
691 result.sps_info_flags |= pic->pulldown << 6;
692 result.sps_info_flags |= pic->interlace << 5;
693 result.sps_info_flags |= pic->tfcntrflag << 4;
694 result.sps_info_flags |= pic->finterpflag << 3;
695 result.sps_info_flags |= pic->psf << 1;
696
697 result.pps_info_flags |= pic->range_mapy_flag << 31;
698 result.pps_info_flags |= pic->range_mapy << 28;
699 result.pps_info_flags |= pic->range_mapuv_flag << 27;
700 result.pps_info_flags |= pic->range_mapuv << 24;
701 result.pps_info_flags |= pic->multires << 21;
702 result.pps_info_flags |= pic->maxbframes << 16;
703 result.pps_info_flags |= pic->overlap << 11;
704 result.pps_info_flags |= pic->quantizer << 9;
705 result.pps_info_flags |= pic->panscan_flag << 7;
706 result.pps_info_flags |= pic->refdist_flag << 6;
707 result.pps_info_flags |= pic->vstransform << 0;
708
709 /* some fields only apply to main/advanced profile */
710 if (pic->base.profile != PIPE_VIDEO_PROFILE_VC1_SIMPLE) {
711 result.pps_info_flags |= pic->syncmarker << 20;
712 result.pps_info_flags |= pic->rangered << 19;
713 result.pps_info_flags |= pic->loopfilter << 5;
714 result.pps_info_flags |= pic->fastuvmc << 4;
715 result.pps_info_flags |= pic->extended_mv << 3;
716 result.pps_info_flags |= pic->extended_dmv << 8;
717 result.pps_info_flags |= pic->dquant << 1;
718 }
719
720 result.chroma_format = 1;
721
722 #if 0
723 //(((unsigned int)(pPicParams->advance.reserved1)) << SPS_INFO_VC1_RESERVED_SHIFT)
724 uint32_t slice_count
725 uint8_t picture_type
726 uint8_t frame_coding_mode
727 uint8_t deblockEnable
728 uint8_t pquant
729 #endif
730
731 return result;
732 }
733
734 /* extract the frame number from a referenced video buffer */
735 static uint32_t get_ref_pic_idx(struct ruvd_decoder *dec, struct pipe_video_buffer *ref)
736 {
737 uint32_t min = MAX2(dec->frame_number, NUM_MPEG2_REFS) - NUM_MPEG2_REFS;
738 uint32_t max = MAX2(dec->frame_number, 1) - 1;
739 uintptr_t frame;
740
741 /* seems to be the most sane fallback */
742 if (!ref)
743 return max;
744
745 /* get the frame number from the associated data */
746 frame = (uintptr_t)vl_video_buffer_get_associated_data(ref, &dec->base);
747
748 /* limit the frame number to a valid range */
749 return MAX2(MIN2(frame, max), min);
750 }
751
752 /* get mpeg2 specific msg bits */
753 static struct ruvd_mpeg2 get_mpeg2_msg(struct ruvd_decoder *dec,
754 struct pipe_mpeg12_picture_desc *pic)
755 {
756 const int *zscan = pic->alternate_scan ? vl_zscan_alternate : vl_zscan_normal;
757 struct ruvd_mpeg2 result;
758 unsigned i;
759
760 memset(&result, 0, sizeof(result));
761 result.decoded_pic_idx = dec->frame_number;
762 for (i = 0; i < 2; ++i)
763 result.ref_pic_idx[i] = get_ref_pic_idx(dec, pic->ref[i]);
764
765 result.load_intra_quantiser_matrix = 1;
766 result.load_nonintra_quantiser_matrix = 1;
767
768 for (i = 0; i < 64; ++i) {
769 result.intra_quantiser_matrix[i] = pic->intra_matrix[zscan[i]];
770 result.nonintra_quantiser_matrix[i] = pic->non_intra_matrix[zscan[i]];
771 }
772
773 result.profile_and_level_indication = 0;
774 result.chroma_format = 0x1;
775
776 result.picture_coding_type = pic->picture_coding_type;
777 result.f_code[0][0] = pic->f_code[0][0] + 1;
778 result.f_code[0][1] = pic->f_code[0][1] + 1;
779 result.f_code[1][0] = pic->f_code[1][0] + 1;
780 result.f_code[1][1] = pic->f_code[1][1] + 1;
781 result.intra_dc_precision = pic->intra_dc_precision;
782 result.pic_structure = pic->picture_structure;
783 result.top_field_first = pic->top_field_first;
784 result.frame_pred_frame_dct = pic->frame_pred_frame_dct;
785 result.concealment_motion_vectors = pic->concealment_motion_vectors;
786 result.q_scale_type = pic->q_scale_type;
787 result.intra_vlc_format = pic->intra_vlc_format;
788 result.alternate_scan = pic->alternate_scan;
789
790 return result;
791 }
792
793 /* get mpeg4 specific msg bits */
794 static struct ruvd_mpeg4 get_mpeg4_msg(struct ruvd_decoder *dec,
795 struct pipe_mpeg4_picture_desc *pic)
796 {
797 struct ruvd_mpeg4 result;
798 unsigned i;
799
800 memset(&result, 0, sizeof(result));
801 result.decoded_pic_idx = dec->frame_number;
802 for (i = 0; i < 2; ++i)
803 result.ref_pic_idx[i] = get_ref_pic_idx(dec, pic->ref[i]);
804
805 result.variant_type = 0;
806 result.profile_and_level_indication = 0xF0; // ASP Level0
807
808 result.video_object_layer_verid = 0x5; // advanced simple
809 result.video_object_layer_shape = 0x0; // rectangular
810
811 result.video_object_layer_width = dec->base.width;
812 result.video_object_layer_height = dec->base.height;
813
814 result.vop_time_increment_resolution = pic->vop_time_increment_resolution;
815
816 result.flags |= pic->short_video_header << 0;
817 //result.flags |= obmc_disable << 1;
818 result.flags |= pic->interlaced << 2;
819 result.flags |= 1 << 3; // load_intra_quant_mat
820 result.flags |= 1 << 4; // load_nonintra_quant_mat
821 result.flags |= pic->quarter_sample << 5;
822 result.flags |= 1 << 6; // complexity_estimation_disable
823 result.flags |= pic->resync_marker_disable << 7;
824 //result.flags |= data_partitioned << 8;
825 //result.flags |= reversible_vlc << 9;
826 result.flags |= 0 << 10; // newpred_enable
827 result.flags |= 0 << 11; // reduced_resolution_vop_enable
828 //result.flags |= scalability << 12;
829 //result.flags |= is_object_layer_identifier << 13;
830 //result.flags |= fixed_vop_rate << 14;
831 //result.flags |= newpred_segment_type << 15;
832
833 result.quant_type = pic->quant_type;
834
835 for (i = 0; i < 64; ++i) {
836 result.intra_quant_mat[i] = pic->intra_matrix[vl_zscan_normal[i]];
837 result.nonintra_quant_mat[i] = pic->non_intra_matrix[vl_zscan_normal[i]];
838 }
839
840 /*
841 int32_t trd [2]
842 int32_t trb [2]
843 uint8_t vop_coding_type
844 uint8_t vop_fcode_forward
845 uint8_t vop_fcode_backward
846 uint8_t rounding_control
847 uint8_t alternate_vertical_scan_flag
848 uint8_t top_field_first
849 */
850
851 return result;
852 }
853
854 /**
855 * destroy this video decoder
856 */
857 static void ruvd_destroy(struct pipe_video_codec *decoder)
858 {
859 struct ruvd_decoder *dec = (struct ruvd_decoder*)decoder;
860 unsigned i;
861
862 assert(decoder);
863
864 map_msg_fb_it_buf(dec);
865 memset(dec->msg, 0, sizeof(*dec->msg));
866 dec->msg->size = sizeof(*dec->msg);
867 dec->msg->msg_type = RUVD_MSG_DESTROY;
868 dec->msg->stream_handle = dec->stream_handle;
869 send_msg_buf(dec);
870
871 flush(dec);
872
873 dec->ws->cs_destroy(dec->cs);
874
875 for (i = 0; i < NUM_BUFFERS; ++i) {
876 rvid_destroy_buffer(&dec->msg_fb_it_buffers[i]);
877 rvid_destroy_buffer(&dec->bs_buffers[i]);
878 }
879
880 rvid_destroy_buffer(&dec->dpb);
881 if (u_reduce_video_profile(dec->base.profile) == PIPE_VIDEO_FORMAT_HEVC)
882 rvid_destroy_buffer(&dec->ctx);
883
884 FREE(dec);
885 }
886
887 /**
888 * start decoding of a new frame
889 */
890 static void ruvd_begin_frame(struct pipe_video_codec *decoder,
891 struct pipe_video_buffer *target,
892 struct pipe_picture_desc *picture)
893 {
894 struct ruvd_decoder *dec = (struct ruvd_decoder*)decoder;
895 uintptr_t frame;
896
897 assert(decoder);
898
899 frame = ++dec->frame_number;
900 vl_video_buffer_set_associated_data(target, decoder, (void *)frame,
901 &ruvd_destroy_associated_data);
902
903 dec->bs_size = 0;
904 dec->bs_ptr = dec->ws->buffer_map(
905 dec->bs_buffers[dec->cur_buffer].res->buf,
906 dec->cs, PIPE_TRANSFER_WRITE);
907 }
908
909 /**
910 * decode a macroblock
911 */
912 static void ruvd_decode_macroblock(struct pipe_video_codec *decoder,
913 struct pipe_video_buffer *target,
914 struct pipe_picture_desc *picture,
915 const struct pipe_macroblock *macroblocks,
916 unsigned num_macroblocks)
917 {
918 /* not supported (yet) */
919 assert(0);
920 }
921
922 /**
923 * decode a bitstream
924 */
925 static void ruvd_decode_bitstream(struct pipe_video_codec *decoder,
926 struct pipe_video_buffer *target,
927 struct pipe_picture_desc *picture,
928 unsigned num_buffers,
929 const void * const *buffers,
930 const unsigned *sizes)
931 {
932 struct ruvd_decoder *dec = (struct ruvd_decoder*)decoder;
933 unsigned i;
934
935 assert(decoder);
936
937 if (!dec->bs_ptr)
938 return;
939
940 for (i = 0; i < num_buffers; ++i) {
941 struct rvid_buffer *buf = &dec->bs_buffers[dec->cur_buffer];
942 unsigned new_size = dec->bs_size + sizes[i];
943
944 if (new_size > buf->res->buf->size) {
945 dec->ws->buffer_unmap(buf->res->buf);
946 if (!rvid_resize_buffer(dec->screen, dec->cs, buf, new_size)) {
947 RVID_ERR("Can't resize bitstream buffer!");
948 return;
949 }
950
951 dec->bs_ptr = dec->ws->buffer_map(buf->res->buf, dec->cs,
952 PIPE_TRANSFER_WRITE);
953 if (!dec->bs_ptr)
954 return;
955
956 dec->bs_ptr += dec->bs_size;
957 }
958
959 memcpy(dec->bs_ptr, buffers[i], sizes[i]);
960 dec->bs_size += sizes[i];
961 dec->bs_ptr += sizes[i];
962 }
963 }
964
965 /**
966 * end decoding of the current frame
967 */
968 static void ruvd_end_frame(struct pipe_video_codec *decoder,
969 struct pipe_video_buffer *target,
970 struct pipe_picture_desc *picture)
971 {
972 struct ruvd_decoder *dec = (struct ruvd_decoder*)decoder;
973 struct pb_buffer *dt;
974 struct rvid_buffer *msg_fb_it_buf, *bs_buf;
975 unsigned bs_size;
976
977 assert(decoder);
978
979 if (!dec->bs_ptr)
980 return;
981
982 msg_fb_it_buf = &dec->msg_fb_it_buffers[dec->cur_buffer];
983 bs_buf = &dec->bs_buffers[dec->cur_buffer];
984
985 bs_size = align(dec->bs_size, 128);
986 memset(dec->bs_ptr, 0, bs_size - dec->bs_size);
987 dec->ws->buffer_unmap(bs_buf->res->buf);
988
989 map_msg_fb_it_buf(dec);
990 dec->msg->size = sizeof(*dec->msg);
991 dec->msg->msg_type = RUVD_MSG_DECODE;
992 dec->msg->stream_handle = dec->stream_handle;
993 dec->msg->status_report_feedback_number = dec->frame_number;
994
995 dec->msg->body.decode.stream_type = dec->stream_type;
996 dec->msg->body.decode.decode_flags = 0x1;
997 dec->msg->body.decode.width_in_samples = dec->base.width;
998 dec->msg->body.decode.height_in_samples = dec->base.height;
999
1000 if ((picture->profile == PIPE_VIDEO_PROFILE_VC1_SIMPLE) ||
1001 (picture->profile == PIPE_VIDEO_PROFILE_VC1_MAIN)) {
1002 dec->msg->body.decode.width_in_samples = align(dec->msg->body.decode.width_in_samples, 16) / 16;
1003 dec->msg->body.decode.height_in_samples = align(dec->msg->body.decode.height_in_samples, 16) / 16;
1004 }
1005
1006 dec->msg->body.decode.dpb_size = dec->dpb.res->buf->size;
1007 dec->msg->body.decode.bsd_size = bs_size;
1008 dec->msg->body.decode.db_pitch = align(dec->base.width, 16);
1009
1010 dt = dec->set_dtb(dec->msg, (struct vl_video_buffer *)target);
1011 if (((struct r600_common_screen*)dec->screen)->family >= CHIP_STONEY)
1012 dec->msg->body.decode.dt_wa_chroma_top_offset = dec->msg->body.decode.dt_pitch / 2;
1013
1014 switch (u_reduce_video_profile(picture->profile)) {
1015 case PIPE_VIDEO_FORMAT_MPEG4_AVC:
1016 dec->msg->body.decode.codec.h264 = get_h264_msg(dec, (struct pipe_h264_picture_desc*)picture);
1017 break;
1018
1019 case PIPE_VIDEO_FORMAT_HEVC:
1020 dec->msg->body.decode.codec.h265 = get_h265_msg(dec, target, (struct pipe_h265_picture_desc*)picture);
1021 if (dec->ctx.res == NULL) {
1022 unsigned ctx_size;
1023 if (dec->base.profile == PIPE_VIDEO_PROFILE_HEVC_MAIN_10)
1024 ctx_size = calc_ctx_size_h265_main10(dec, (struct pipe_h265_picture_desc*)picture);
1025 else
1026 ctx_size = calc_ctx_size_h265_main(dec);
1027 if (!rvid_create_buffer(dec->screen, &dec->ctx, ctx_size, PIPE_USAGE_DEFAULT)) {
1028 RVID_ERR("Can't allocated context buffer.\n");
1029 }
1030 rvid_clear_buffer(decoder->context, &dec->ctx);
1031 }
1032 break;
1033
1034 case PIPE_VIDEO_FORMAT_VC1:
1035 dec->msg->body.decode.codec.vc1 = get_vc1_msg((struct pipe_vc1_picture_desc*)picture);
1036 break;
1037
1038 case PIPE_VIDEO_FORMAT_MPEG12:
1039 dec->msg->body.decode.codec.mpeg2 = get_mpeg2_msg(dec, (struct pipe_mpeg12_picture_desc*)picture);
1040 break;
1041
1042 case PIPE_VIDEO_FORMAT_MPEG4:
1043 dec->msg->body.decode.codec.mpeg4 = get_mpeg4_msg(dec, (struct pipe_mpeg4_picture_desc*)picture);
1044 break;
1045
1046 default:
1047 assert(0);
1048 return;
1049 }
1050
1051 dec->msg->body.decode.db_surf_tile_config = dec->msg->body.decode.dt_surf_tile_config;
1052 dec->msg->body.decode.extension_support = 0x1;
1053
1054 /* set at least the feedback buffer size */
1055 dec->fb[0] = dec->fb_size;
1056
1057 send_msg_buf(dec);
1058
1059 send_cmd(dec, RUVD_CMD_DPB_BUFFER, dec->dpb.res->buf, 0,
1060 RADEON_USAGE_READWRITE, RADEON_DOMAIN_VRAM);
1061 if (u_reduce_video_profile(picture->profile) == PIPE_VIDEO_FORMAT_HEVC) {
1062 send_cmd(dec, RUVD_CMD_CONTEXT_BUFFER, dec->ctx.res->buf, 0,
1063 RADEON_USAGE_READWRITE, RADEON_DOMAIN_VRAM);
1064 }
1065 send_cmd(dec, RUVD_CMD_BITSTREAM_BUFFER, bs_buf->res->buf,
1066 0, RADEON_USAGE_READ, RADEON_DOMAIN_GTT);
1067 send_cmd(dec, RUVD_CMD_DECODING_TARGET_BUFFER, dt, 0,
1068 RADEON_USAGE_WRITE, RADEON_DOMAIN_VRAM);
1069 send_cmd(dec, RUVD_CMD_FEEDBACK_BUFFER, msg_fb_it_buf->res->buf,
1070 FB_BUFFER_OFFSET, RADEON_USAGE_WRITE, RADEON_DOMAIN_GTT);
1071 if (have_it(dec))
1072 send_cmd(dec, RUVD_CMD_ITSCALING_TABLE_BUFFER, msg_fb_it_buf->res->buf,
1073 FB_BUFFER_OFFSET + dec->fb_size, RADEON_USAGE_READ, RADEON_DOMAIN_GTT);
1074 set_reg(dec, RUVD_ENGINE_CNTL, 1);
1075
1076 flush(dec);
1077 next_buffer(dec);
1078 }
1079
1080 /**
1081 * flush any outstanding command buffers to the hardware
1082 */
1083 static void ruvd_flush(struct pipe_video_codec *decoder)
1084 {
1085 }
1086
1087 /**
1088 * create and UVD decoder
1089 */
1090 struct pipe_video_codec *ruvd_create_decoder(struct pipe_context *context,
1091 const struct pipe_video_codec *templ,
1092 ruvd_set_dtb set_dtb)
1093 {
1094 struct radeon_winsys* ws = ((struct r600_common_context *)context)->ws;
1095 struct r600_common_context *rctx = (struct r600_common_context*)context;
1096 unsigned dpb_size;
1097 unsigned width = templ->width, height = templ->height;
1098 unsigned bs_buf_size;
1099 struct radeon_info info;
1100 struct ruvd_decoder *dec;
1101 int i;
1102
1103 ws->query_info(ws, &info);
1104
1105 switch(u_reduce_video_profile(templ->profile)) {
1106 case PIPE_VIDEO_FORMAT_MPEG12:
1107 if (templ->entrypoint > PIPE_VIDEO_ENTRYPOINT_BITSTREAM || info.family < CHIP_PALM)
1108 return vl_create_mpeg12_decoder(context, templ);
1109
1110 /* fall through */
1111 case PIPE_VIDEO_FORMAT_MPEG4:
1112 case PIPE_VIDEO_FORMAT_MPEG4_AVC:
1113 width = align(width, VL_MACROBLOCK_WIDTH);
1114 height = align(height, VL_MACROBLOCK_HEIGHT);
1115 break;
1116
1117 default:
1118 break;
1119 }
1120
1121
1122 dec = CALLOC_STRUCT(ruvd_decoder);
1123
1124 if (!dec)
1125 return NULL;
1126
1127 if (info.drm_major < 3)
1128 dec->use_legacy = TRUE;
1129
1130 dec->base = *templ;
1131 dec->base.context = context;
1132 dec->base.width = width;
1133 dec->base.height = height;
1134
1135 dec->base.destroy = ruvd_destroy;
1136 dec->base.begin_frame = ruvd_begin_frame;
1137 dec->base.decode_macroblock = ruvd_decode_macroblock;
1138 dec->base.decode_bitstream = ruvd_decode_bitstream;
1139 dec->base.end_frame = ruvd_end_frame;
1140 dec->base.flush = ruvd_flush;
1141
1142 dec->stream_type = profile2stream_type(dec, info.family);
1143 dec->set_dtb = set_dtb;
1144 dec->stream_handle = rvid_alloc_stream_handle();
1145 dec->screen = context->screen;
1146 dec->ws = ws;
1147 dec->cs = ws->cs_create(rctx->ctx, RING_UVD, NULL, NULL);
1148 if (!dec->cs) {
1149 RVID_ERR("Can't get command submission context.\n");
1150 goto error;
1151 }
1152
1153 dec->fb_size = (info.family == CHIP_TONGA) ? FB_BUFFER_SIZE_TONGA :
1154 FB_BUFFER_SIZE;
1155 bs_buf_size = width * height * 512 / (16 * 16);
1156 for (i = 0; i < NUM_BUFFERS; ++i) {
1157 unsigned msg_fb_it_size = FB_BUFFER_OFFSET + dec->fb_size;
1158 STATIC_ASSERT(sizeof(struct ruvd_msg) <= FB_BUFFER_OFFSET);
1159 if (have_it(dec))
1160 msg_fb_it_size += IT_SCALING_TABLE_SIZE;
1161 if (!rvid_create_buffer(dec->screen, &dec->msg_fb_it_buffers[i],
1162 msg_fb_it_size, PIPE_USAGE_STAGING)) {
1163 RVID_ERR("Can't allocated message buffers.\n");
1164 goto error;
1165 }
1166
1167 if (!rvid_create_buffer(dec->screen, &dec->bs_buffers[i],
1168 bs_buf_size, PIPE_USAGE_STAGING)) {
1169 RVID_ERR("Can't allocated bitstream buffers.\n");
1170 goto error;
1171 }
1172
1173 rvid_clear_buffer(context, &dec->msg_fb_it_buffers[i]);
1174 rvid_clear_buffer(context, &dec->bs_buffers[i]);
1175 }
1176
1177 dpb_size = calc_dpb_size(dec);
1178
1179 if (!rvid_create_buffer(dec->screen, &dec->dpb, dpb_size, PIPE_USAGE_DEFAULT)) {
1180 RVID_ERR("Can't allocated dpb.\n");
1181 goto error;
1182 }
1183
1184 rvid_clear_buffer(context, &dec->dpb);
1185
1186 map_msg_fb_it_buf(dec);
1187 dec->msg->size = sizeof(*dec->msg);
1188 dec->msg->msg_type = RUVD_MSG_CREATE;
1189 dec->msg->stream_handle = dec->stream_handle;
1190 dec->msg->body.create.stream_type = dec->stream_type;
1191 dec->msg->body.create.width_in_samples = dec->base.width;
1192 dec->msg->body.create.height_in_samples = dec->base.height;
1193 dec->msg->body.create.dpb_size = dpb_size;
1194 send_msg_buf(dec);
1195 flush(dec);
1196 next_buffer(dec);
1197
1198 return &dec->base;
1199
1200 error:
1201 if (dec->cs) dec->ws->cs_destroy(dec->cs);
1202
1203 for (i = 0; i < NUM_BUFFERS; ++i) {
1204 rvid_destroy_buffer(&dec->msg_fb_it_buffers[i]);
1205 rvid_destroy_buffer(&dec->bs_buffers[i]);
1206 }
1207
1208 rvid_destroy_buffer(&dec->dpb);
1209 if (u_reduce_video_profile(dec->base.profile) == PIPE_VIDEO_FORMAT_HEVC)
1210 rvid_destroy_buffer(&dec->ctx);
1211
1212 FREE(dec);
1213
1214 return NULL;
1215 }
1216
1217 /* calculate top/bottom offset */
1218 static unsigned texture_offset(struct radeon_surf *surface, unsigned layer)
1219 {
1220 return surface->level[0].offset +
1221 layer * surface->level[0].slice_size;
1222 }
1223
1224 /* hw encode the aspect of macro tiles */
1225 static unsigned macro_tile_aspect(unsigned macro_tile_aspect)
1226 {
1227 switch (macro_tile_aspect) {
1228 default:
1229 case 1: macro_tile_aspect = 0; break;
1230 case 2: macro_tile_aspect = 1; break;
1231 case 4: macro_tile_aspect = 2; break;
1232 case 8: macro_tile_aspect = 3; break;
1233 }
1234 return macro_tile_aspect;
1235 }
1236
1237 /* hw encode the bank width and height */
1238 static unsigned bank_wh(unsigned bankwh)
1239 {
1240 switch (bankwh) {
1241 default:
1242 case 1: bankwh = 0; break;
1243 case 2: bankwh = 1; break;
1244 case 4: bankwh = 2; break;
1245 case 8: bankwh = 3; break;
1246 }
1247 return bankwh;
1248 }
1249
1250 /**
1251 * fill decoding target field from the luma and chroma surfaces
1252 */
1253 void ruvd_set_dt_surfaces(struct ruvd_msg *msg, struct radeon_surf *luma,
1254 struct radeon_surf *chroma)
1255 {
1256 msg->body.decode.dt_pitch = luma->level[0].pitch_bytes;
1257 switch (luma->level[0].mode) {
1258 case RADEON_SURF_MODE_LINEAR_ALIGNED:
1259 msg->body.decode.dt_tiling_mode = RUVD_TILE_LINEAR;
1260 msg->body.decode.dt_array_mode = RUVD_ARRAY_MODE_LINEAR;
1261 break;
1262 case RADEON_SURF_MODE_1D:
1263 msg->body.decode.dt_tiling_mode = RUVD_TILE_8X8;
1264 msg->body.decode.dt_array_mode = RUVD_ARRAY_MODE_1D_THIN;
1265 break;
1266 case RADEON_SURF_MODE_2D:
1267 msg->body.decode.dt_tiling_mode = RUVD_TILE_8X8;
1268 msg->body.decode.dt_array_mode = RUVD_ARRAY_MODE_2D_THIN;
1269 break;
1270 default:
1271 assert(0);
1272 break;
1273 }
1274
1275 msg->body.decode.dt_luma_top_offset = texture_offset(luma, 0);
1276 msg->body.decode.dt_chroma_top_offset = texture_offset(chroma, 0);
1277 if (msg->body.decode.dt_field_mode) {
1278 msg->body.decode.dt_luma_bottom_offset = texture_offset(luma, 1);
1279 msg->body.decode.dt_chroma_bottom_offset = texture_offset(chroma, 1);
1280 } else {
1281 msg->body.decode.dt_luma_bottom_offset = msg->body.decode.dt_luma_top_offset;
1282 msg->body.decode.dt_chroma_bottom_offset = msg->body.decode.dt_chroma_top_offset;
1283 }
1284
1285 assert(luma->bankw == chroma->bankw);
1286 assert(luma->bankh == chroma->bankh);
1287 assert(luma->mtilea == chroma->mtilea);
1288
1289 msg->body.decode.dt_surf_tile_config |= RUVD_BANK_WIDTH(bank_wh(luma->bankw));
1290 msg->body.decode.dt_surf_tile_config |= RUVD_BANK_HEIGHT(bank_wh(luma->bankh));
1291 msg->body.decode.dt_surf_tile_config |= RUVD_MACRO_TILE_ASPECT_RATIO(macro_tile_aspect(luma->mtilea));
1292 }