1 /**************************************************************************
3 * Copyright 2011 Advanced Micro Devices, Inc.
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **************************************************************************/
30 * Christian König <christian.koenig@amd.com>
34 #include <sys/types.h>
40 #include "pipe/p_video_codec.h"
42 #include "util/u_memory.h"
43 #include "util/u_video.h"
45 #include "vl/vl_defines.h"
46 #include "vl/vl_mpeg12_decoder.h"
48 #include "r600_pipe_common.h"
49 #include "radeon_video.h"
50 #include "radeon_uvd.h"
54 #define NUM_MPEG2_REFS 6
55 #define NUM_H264_REFS 17
56 #define NUM_VC1_REFS 5
58 #define FB_BUFFER_OFFSET 0x1000
59 #define FB_BUFFER_SIZE 2048
60 #define FB_BUFFER_SIZE_TONGA (2048 * 64)
61 #define IT_SCALING_TABLE_SIZE 992
62 #define UVD_SESSION_CONTEXT_SIZE (128 * 1024)
64 /* UVD decoder representation */
66 struct pipe_video_codec base
;
70 unsigned stream_handle
;
72 unsigned frame_number
;
74 struct pipe_screen
*screen
;
75 struct radeon_winsys
* ws
;
76 struct radeon_winsys_cs
* cs
;
80 struct rvid_buffer msg_fb_it_buffers
[NUM_BUFFERS
];
86 struct rvid_buffer bs_buffers
[NUM_BUFFERS
];
90 struct rvid_buffer dpb
;
92 struct rvid_buffer ctx
;
93 struct rvid_buffer sessionctx
;
102 /* flush IB to the hardware */
103 static int flush(struct ruvd_decoder
*dec
, unsigned flags
)
105 return dec
->ws
->cs_flush(dec
->cs
, flags
, NULL
);
108 /* add a new set register command to the IB */
109 static void set_reg(struct ruvd_decoder
*dec
, unsigned reg
, uint32_t val
)
111 radeon_emit(dec
->cs
, RUVD_PKT0(reg
>> 2, 0));
112 radeon_emit(dec
->cs
, val
);
115 /* send a command to the VCPU through the GPCOM registers */
116 static void send_cmd(struct ruvd_decoder
*dec
, unsigned cmd
,
117 struct pb_buffer
* buf
, uint32_t off
,
118 enum radeon_bo_usage usage
, enum radeon_bo_domain domain
)
122 reloc_idx
= dec
->ws
->cs_add_buffer(dec
->cs
, buf
, usage
| RADEON_USAGE_SYNCHRONIZED
,
125 if (!dec
->use_legacy
) {
127 addr
= dec
->ws
->buffer_get_virtual_address(buf
);
129 set_reg(dec
, dec
->reg
.data0
, addr
);
130 set_reg(dec
, dec
->reg
.data1
, addr
>> 32);
132 off
+= dec
->ws
->buffer_get_reloc_offset(buf
);
133 set_reg(dec
, RUVD_GPCOM_VCPU_DATA0
, off
);
134 set_reg(dec
, RUVD_GPCOM_VCPU_DATA1
, reloc_idx
* 4);
136 set_reg(dec
, dec
->reg
.cmd
, cmd
<< 1);
139 /* do the codec needs an IT buffer ?*/
140 static bool have_it(struct ruvd_decoder
*dec
)
142 return dec
->stream_type
== RUVD_CODEC_H264_PERF
||
143 dec
->stream_type
== RUVD_CODEC_H265
;
146 /* map the next available message/feedback/itscaling buffer */
147 static void map_msg_fb_it_buf(struct ruvd_decoder
*dec
)
149 struct rvid_buffer
* buf
;
152 /* grab the current message/feedback buffer */
153 buf
= &dec
->msg_fb_it_buffers
[dec
->cur_buffer
];
155 /* and map it for CPU access */
156 ptr
= dec
->ws
->buffer_map(buf
->res
->buf
, dec
->cs
, PIPE_TRANSFER_WRITE
);
158 /* calc buffer offsets */
159 dec
->msg
= (struct ruvd_msg
*)ptr
;
160 memset(dec
->msg
, 0, sizeof(*dec
->msg
));
162 dec
->fb
= (uint32_t *)(ptr
+ FB_BUFFER_OFFSET
);
164 dec
->it
= (uint8_t *)(ptr
+ FB_BUFFER_OFFSET
+ dec
->fb_size
);
167 /* unmap and send a message command to the VCPU */
168 static void send_msg_buf(struct ruvd_decoder
*dec
)
170 struct rvid_buffer
* buf
;
172 /* ignore the request if message/feedback buffer isn't mapped */
173 if (!dec
->msg
|| !dec
->fb
)
176 /* grab the current message buffer */
177 buf
= &dec
->msg_fb_it_buffers
[dec
->cur_buffer
];
179 /* unmap the buffer */
180 dec
->ws
->buffer_unmap(buf
->res
->buf
);
186 if (dec
->sessionctx
.res
)
187 send_cmd(dec
, RUVD_CMD_SESSION_CONTEXT_BUFFER
,
188 dec
->sessionctx
.res
->buf
, 0, RADEON_USAGE_READWRITE
,
191 /* and send it to the hardware */
192 send_cmd(dec
, RUVD_CMD_MSG_BUFFER
, buf
->res
->buf
, 0,
193 RADEON_USAGE_READ
, RADEON_DOMAIN_GTT
);
196 /* cycle to the next set of buffers */
197 static void next_buffer(struct ruvd_decoder
*dec
)
200 dec
->cur_buffer
%= NUM_BUFFERS
;
203 /* convert the profile into something UVD understands */
204 static uint32_t profile2stream_type(struct ruvd_decoder
*dec
, unsigned family
)
206 switch (u_reduce_video_profile(dec
->base
.profile
)) {
207 case PIPE_VIDEO_FORMAT_MPEG4_AVC
:
208 return (family
>= CHIP_TONGA
) ?
209 RUVD_CODEC_H264_PERF
: RUVD_CODEC_H264
;
211 case PIPE_VIDEO_FORMAT_VC1
:
212 return RUVD_CODEC_VC1
;
214 case PIPE_VIDEO_FORMAT_MPEG12
:
215 return RUVD_CODEC_MPEG2
;
217 case PIPE_VIDEO_FORMAT_MPEG4
:
218 return RUVD_CODEC_MPEG4
;
220 case PIPE_VIDEO_FORMAT_HEVC
:
221 return RUVD_CODEC_H265
;
223 case PIPE_VIDEO_FORMAT_JPEG
:
224 return RUVD_CODEC_MJPEG
;
232 static unsigned calc_ctx_size_h264_perf(struct ruvd_decoder
*dec
)
234 unsigned width_in_mb
, height_in_mb
, ctx_size
;
235 unsigned width
= align(dec
->base
.width
, VL_MACROBLOCK_WIDTH
);
236 unsigned height
= align(dec
->base
.height
, VL_MACROBLOCK_HEIGHT
);
238 unsigned max_references
= dec
->base
.max_references
+ 1;
240 // picture width & height in 16 pixel units
241 width_in_mb
= width
/ VL_MACROBLOCK_WIDTH
;
242 height_in_mb
= align(height
/ VL_MACROBLOCK_HEIGHT
, 2);
244 if (!dec
->use_legacy
) {
245 unsigned fs_in_mb
= width_in_mb
* height_in_mb
;
246 unsigned num_dpb_buffer
;
247 switch(dec
->base
.level
) {
249 num_dpb_buffer
= 8100 / fs_in_mb
;
252 num_dpb_buffer
= 18000 / fs_in_mb
;
255 num_dpb_buffer
= 20480 / fs_in_mb
;
258 num_dpb_buffer
= 32768 / fs_in_mb
;
261 num_dpb_buffer
= 34816 / fs_in_mb
;
264 num_dpb_buffer
= 110400 / fs_in_mb
;
267 num_dpb_buffer
= 184320 / fs_in_mb
;
270 num_dpb_buffer
= 184320 / fs_in_mb
;
274 max_references
= MAX2(MIN2(NUM_H264_REFS
, num_dpb_buffer
), max_references
);
275 ctx_size
= max_references
* align(width_in_mb
* height_in_mb
* 192, 256);
277 // the firmware seems to always assume a minimum of ref frames
278 max_references
= MAX2(NUM_H264_REFS
, max_references
);
279 // macroblock context buffer
280 ctx_size
= align(width_in_mb
* height_in_mb
* max_references
* 192, 256);
286 static unsigned calc_ctx_size_h265_main(struct ruvd_decoder
*dec
)
288 unsigned width
= align(dec
->base
.width
, VL_MACROBLOCK_WIDTH
);
289 unsigned height
= align(dec
->base
.height
, VL_MACROBLOCK_HEIGHT
);
291 unsigned max_references
= dec
->base
.max_references
+ 1;
293 if (dec
->base
.width
* dec
->base
.height
>= 4096*2000)
294 max_references
= MAX2(max_references
, 8);
296 max_references
= MAX2(max_references
, 17);
298 width
= align (width
, 16);
299 height
= align (height
, 16);
300 return ((width
+ 255) / 16) * ((height
+ 255) / 16) * 16 * max_references
+ 52 * 1024;
303 static unsigned calc_ctx_size_h265_main10(struct ruvd_decoder
*dec
, struct pipe_h265_picture_desc
*pic
)
305 unsigned block_size
, log2_ctb_size
, width_in_ctb
, height_in_ctb
, num_16x16_block_per_ctb
;
306 unsigned context_buffer_size_per_ctb_row
, cm_buffer_size
, max_mb_address
, db_left_tile_pxl_size
;
307 unsigned db_left_tile_ctx_size
= 4096 / 16 * (32 + 16 * 4);
309 unsigned width
= align(dec
->base
.width
, VL_MACROBLOCK_WIDTH
);
310 unsigned height
= align(dec
->base
.height
, VL_MACROBLOCK_HEIGHT
);
311 unsigned coeff_10bit
= (pic
->pps
->sps
->bit_depth_luma_minus8
|| pic
->pps
->sps
->bit_depth_chroma_minus8
) ? 2 : 1;
313 unsigned max_references
= dec
->base
.max_references
+ 1;
315 if (dec
->base
.width
* dec
->base
.height
>= 4096*2000)
316 max_references
= MAX2(max_references
, 8);
318 max_references
= MAX2(max_references
, 17);
320 block_size
= (1 << (pic
->pps
->sps
->log2_min_luma_coding_block_size_minus3
+ 3));
321 log2_ctb_size
= block_size
+ pic
->pps
->sps
->log2_diff_max_min_luma_coding_block_size
;
323 width_in_ctb
= (width
+ ((1 << log2_ctb_size
) - 1)) >> log2_ctb_size
;
324 height_in_ctb
= (height
+ ((1 << log2_ctb_size
) - 1)) >> log2_ctb_size
;
326 num_16x16_block_per_ctb
= ((1 << log2_ctb_size
) >> 4) * ((1 << log2_ctb_size
) >> 4);
327 context_buffer_size_per_ctb_row
= align(width_in_ctb
* num_16x16_block_per_ctb
* 16, 256);
328 max_mb_address
= (unsigned) ceil(height
* 8 / 2048.0);
330 cm_buffer_size
= max_references
* context_buffer_size_per_ctb_row
* height_in_ctb
;
331 db_left_tile_pxl_size
= coeff_10bit
* (max_mb_address
* 2 * 2048 + 1024);
333 return cm_buffer_size
+ db_left_tile_ctx_size
+ db_left_tile_pxl_size
;
336 static unsigned get_db_pitch_alignment(struct ruvd_decoder
*dec
)
338 if (((struct r600_common_screen
*)dec
->screen
)->family
< CHIP_VEGA10
)
344 /* calculate size of reference picture buffer */
345 static unsigned calc_dpb_size(struct ruvd_decoder
*dec
)
347 unsigned width_in_mb
, height_in_mb
, image_size
, dpb_size
;
349 // always align them to MB size for dpb calculation
350 unsigned width
= align(dec
->base
.width
, VL_MACROBLOCK_WIDTH
);
351 unsigned height
= align(dec
->base
.height
, VL_MACROBLOCK_HEIGHT
);
353 // always one more for currently decoded picture
354 unsigned max_references
= dec
->base
.max_references
+ 1;
356 // aligned size of a single frame
357 image_size
= align(width
, get_db_pitch_alignment(dec
)) * height
;
358 image_size
+= image_size
/ 2;
359 image_size
= align(image_size
, 1024);
361 // picture width & height in 16 pixel units
362 width_in_mb
= width
/ VL_MACROBLOCK_WIDTH
;
363 height_in_mb
= align(height
/ VL_MACROBLOCK_HEIGHT
, 2);
365 switch (u_reduce_video_profile(dec
->base
.profile
)) {
366 case PIPE_VIDEO_FORMAT_MPEG4_AVC
: {
367 if (!dec
->use_legacy
) {
368 unsigned fs_in_mb
= width_in_mb
* height_in_mb
;
369 unsigned alignment
= 64, num_dpb_buffer
;
371 if (dec
->stream_type
== RUVD_CODEC_H264_PERF
)
373 switch(dec
->base
.level
) {
375 num_dpb_buffer
= 8100 / fs_in_mb
;
378 num_dpb_buffer
= 18000 / fs_in_mb
;
381 num_dpb_buffer
= 20480 / fs_in_mb
;
384 num_dpb_buffer
= 32768 / fs_in_mb
;
387 num_dpb_buffer
= 34816 / fs_in_mb
;
390 num_dpb_buffer
= 110400 / fs_in_mb
;
393 num_dpb_buffer
= 184320 / fs_in_mb
;
396 num_dpb_buffer
= 184320 / fs_in_mb
;
400 max_references
= MAX2(MIN2(NUM_H264_REFS
, num_dpb_buffer
), max_references
);
401 dpb_size
= image_size
* max_references
;
402 if ((dec
->stream_type
!= RUVD_CODEC_H264_PERF
) ||
403 (((struct r600_common_screen
*)dec
->screen
)->family
< CHIP_POLARIS10
)) {
404 dpb_size
+= max_references
* align(width_in_mb
* height_in_mb
* 192, alignment
);
405 dpb_size
+= align(width_in_mb
* height_in_mb
* 32, alignment
);
408 // the firmware seems to allways assume a minimum of ref frames
409 max_references
= MAX2(NUM_H264_REFS
, max_references
);
410 // reference picture buffer
411 dpb_size
= image_size
* max_references
;
412 if ((dec
->stream_type
!= RUVD_CODEC_H264_PERF
) ||
413 (((struct r600_common_screen
*)dec
->screen
)->family
< CHIP_POLARIS10
)) {
414 // macroblock context buffer
415 dpb_size
+= width_in_mb
* height_in_mb
* max_references
* 192;
417 dpb_size
+= width_in_mb
* height_in_mb
* 32;
423 case PIPE_VIDEO_FORMAT_HEVC
:
424 if (dec
->base
.width
* dec
->base
.height
>= 4096*2000)
425 max_references
= MAX2(max_references
, 8);
427 max_references
= MAX2(max_references
, 17);
429 width
= align (width
, 16);
430 height
= align (height
, 16);
431 if (dec
->base
.profile
== PIPE_VIDEO_PROFILE_HEVC_MAIN_10
)
432 dpb_size
= align((align(width
, get_db_pitch_alignment(dec
)) * height
* 9) / 4, 256) * max_references
;
434 dpb_size
= align((align(width
, get_db_pitch_alignment(dec
)) * height
* 3) / 2, 256) * max_references
;
437 case PIPE_VIDEO_FORMAT_VC1
:
438 // the firmware seems to allways assume a minimum of ref frames
439 max_references
= MAX2(NUM_VC1_REFS
, max_references
);
441 // reference picture buffer
442 dpb_size
= image_size
* max_references
;
445 dpb_size
+= width_in_mb
* height_in_mb
* 128;
448 dpb_size
+= width_in_mb
* 64;
451 dpb_size
+= width_in_mb
* 128;
454 dpb_size
+= align(MAX2(width_in_mb
, height_in_mb
) * 7 * 16, 64);
457 case PIPE_VIDEO_FORMAT_MPEG12
:
458 // reference picture buffer, must be big enough for all frames
459 dpb_size
= image_size
* NUM_MPEG2_REFS
;
462 case PIPE_VIDEO_FORMAT_MPEG4
:
463 // reference picture buffer
464 dpb_size
= image_size
* max_references
;
467 dpb_size
+= width_in_mb
* height_in_mb
* 64;
470 dpb_size
+= align(width_in_mb
* height_in_mb
* 32, 64);
472 dpb_size
= MAX2(dpb_size
, 30 * 1024 * 1024);
475 case PIPE_VIDEO_FORMAT_JPEG
:
480 // something is missing here
483 // at least use a sane default value
484 dpb_size
= 32 * 1024 * 1024;
490 /* free associated data in the video buffer callback */
491 static void ruvd_destroy_associated_data(void *data
)
493 /* NOOP, since we only use an intptr */
496 /* get h264 specific message bits */
497 static struct ruvd_h264
get_h264_msg(struct ruvd_decoder
*dec
, struct pipe_h264_picture_desc
*pic
)
499 struct ruvd_h264 result
;
501 memset(&result
, 0, sizeof(result
));
502 switch (pic
->base
.profile
) {
503 case PIPE_VIDEO_PROFILE_MPEG4_AVC_BASELINE
:
504 case PIPE_VIDEO_PROFILE_MPEG4_AVC_CONSTRAINED_BASELINE
:
505 result
.profile
= RUVD_H264_PROFILE_BASELINE
;
508 case PIPE_VIDEO_PROFILE_MPEG4_AVC_MAIN
:
509 result
.profile
= RUVD_H264_PROFILE_MAIN
;
512 case PIPE_VIDEO_PROFILE_MPEG4_AVC_HIGH
:
513 result
.profile
= RUVD_H264_PROFILE_HIGH
;
521 result
.level
= dec
->base
.level
;
523 result
.sps_info_flags
= 0;
524 result
.sps_info_flags
|= pic
->pps
->sps
->direct_8x8_inference_flag
<< 0;
525 result
.sps_info_flags
|= pic
->pps
->sps
->mb_adaptive_frame_field_flag
<< 1;
526 result
.sps_info_flags
|= pic
->pps
->sps
->frame_mbs_only_flag
<< 2;
527 result
.sps_info_flags
|= pic
->pps
->sps
->delta_pic_order_always_zero_flag
<< 3;
529 result
.bit_depth_luma_minus8
= pic
->pps
->sps
->bit_depth_luma_minus8
;
530 result
.bit_depth_chroma_minus8
= pic
->pps
->sps
->bit_depth_chroma_minus8
;
531 result
.log2_max_frame_num_minus4
= pic
->pps
->sps
->log2_max_frame_num_minus4
;
532 result
.pic_order_cnt_type
= pic
->pps
->sps
->pic_order_cnt_type
;
533 result
.log2_max_pic_order_cnt_lsb_minus4
= pic
->pps
->sps
->log2_max_pic_order_cnt_lsb_minus4
;
535 switch (dec
->base
.chroma_format
) {
536 case PIPE_VIDEO_CHROMA_FORMAT_NONE
:
539 case PIPE_VIDEO_CHROMA_FORMAT_400
:
540 result
.chroma_format
= 0;
542 case PIPE_VIDEO_CHROMA_FORMAT_420
:
543 result
.chroma_format
= 1;
545 case PIPE_VIDEO_CHROMA_FORMAT_422
:
546 result
.chroma_format
= 2;
548 case PIPE_VIDEO_CHROMA_FORMAT_444
:
549 result
.chroma_format
= 3;
553 result
.pps_info_flags
= 0;
554 result
.pps_info_flags
|= pic
->pps
->transform_8x8_mode_flag
<< 0;
555 result
.pps_info_flags
|= pic
->pps
->redundant_pic_cnt_present_flag
<< 1;
556 result
.pps_info_flags
|= pic
->pps
->constrained_intra_pred_flag
<< 2;
557 result
.pps_info_flags
|= pic
->pps
->deblocking_filter_control_present_flag
<< 3;
558 result
.pps_info_flags
|= pic
->pps
->weighted_bipred_idc
<< 4;
559 result
.pps_info_flags
|= pic
->pps
->weighted_pred_flag
<< 6;
560 result
.pps_info_flags
|= pic
->pps
->bottom_field_pic_order_in_frame_present_flag
<< 7;
561 result
.pps_info_flags
|= pic
->pps
->entropy_coding_mode_flag
<< 8;
563 result
.num_slice_groups_minus1
= pic
->pps
->num_slice_groups_minus1
;
564 result
.slice_group_map_type
= pic
->pps
->slice_group_map_type
;
565 result
.slice_group_change_rate_minus1
= pic
->pps
->slice_group_change_rate_minus1
;
566 result
.pic_init_qp_minus26
= pic
->pps
->pic_init_qp_minus26
;
567 result
.chroma_qp_index_offset
= pic
->pps
->chroma_qp_index_offset
;
568 result
.second_chroma_qp_index_offset
= pic
->pps
->second_chroma_qp_index_offset
;
570 memcpy(result
.scaling_list_4x4
, pic
->pps
->ScalingList4x4
, 6*16);
571 memcpy(result
.scaling_list_8x8
, pic
->pps
->ScalingList8x8
, 2*64);
573 if (dec
->stream_type
== RUVD_CODEC_H264_PERF
) {
574 memcpy(dec
->it
, result
.scaling_list_4x4
, 6*16);
575 memcpy((dec
->it
+ 96), result
.scaling_list_8x8
, 2*64);
578 result
.num_ref_frames
= pic
->num_ref_frames
;
580 result
.num_ref_idx_l0_active_minus1
= pic
->num_ref_idx_l0_active_minus1
;
581 result
.num_ref_idx_l1_active_minus1
= pic
->num_ref_idx_l1_active_minus1
;
583 result
.frame_num
= pic
->frame_num
;
584 memcpy(result
.frame_num_list
, pic
->frame_num_list
, 4*16);
585 result
.curr_field_order_cnt_list
[0] = pic
->field_order_cnt
[0];
586 result
.curr_field_order_cnt_list
[1] = pic
->field_order_cnt
[1];
587 memcpy(result
.field_order_cnt_list
, pic
->field_order_cnt_list
, 4*16*2);
589 result
.decoded_pic_idx
= pic
->frame_num
;
594 /* get h265 specific message bits */
595 static struct ruvd_h265
get_h265_msg(struct ruvd_decoder
*dec
, struct pipe_video_buffer
*target
,
596 struct pipe_h265_picture_desc
*pic
)
598 struct ruvd_h265 result
;
601 memset(&result
, 0, sizeof(result
));
603 result
.sps_info_flags
= 0;
604 result
.sps_info_flags
|= pic
->pps
->sps
->scaling_list_enabled_flag
<< 0;
605 result
.sps_info_flags
|= pic
->pps
->sps
->amp_enabled_flag
<< 1;
606 result
.sps_info_flags
|= pic
->pps
->sps
->sample_adaptive_offset_enabled_flag
<< 2;
607 result
.sps_info_flags
|= pic
->pps
->sps
->pcm_enabled_flag
<< 3;
608 result
.sps_info_flags
|= pic
->pps
->sps
->pcm_loop_filter_disabled_flag
<< 4;
609 result
.sps_info_flags
|= pic
->pps
->sps
->long_term_ref_pics_present_flag
<< 5;
610 result
.sps_info_flags
|= pic
->pps
->sps
->sps_temporal_mvp_enabled_flag
<< 6;
611 result
.sps_info_flags
|= pic
->pps
->sps
->strong_intra_smoothing_enabled_flag
<< 7;
612 result
.sps_info_flags
|= pic
->pps
->sps
->separate_colour_plane_flag
<< 8;
613 if (((struct r600_common_screen
*)dec
->screen
)->family
== CHIP_CARRIZO
)
614 result
.sps_info_flags
|= 1 << 9;
615 if (pic
->UseRefPicList
== true)
616 result
.sps_info_flags
|= 1 << 10;
618 result
.chroma_format
= pic
->pps
->sps
->chroma_format_idc
;
619 result
.bit_depth_luma_minus8
= pic
->pps
->sps
->bit_depth_luma_minus8
;
620 result
.bit_depth_chroma_minus8
= pic
->pps
->sps
->bit_depth_chroma_minus8
;
621 result
.log2_max_pic_order_cnt_lsb_minus4
= pic
->pps
->sps
->log2_max_pic_order_cnt_lsb_minus4
;
622 result
.sps_max_dec_pic_buffering_minus1
= pic
->pps
->sps
->sps_max_dec_pic_buffering_minus1
;
623 result
.log2_min_luma_coding_block_size_minus3
= pic
->pps
->sps
->log2_min_luma_coding_block_size_minus3
;
624 result
.log2_diff_max_min_luma_coding_block_size
= pic
->pps
->sps
->log2_diff_max_min_luma_coding_block_size
;
625 result
.log2_min_transform_block_size_minus2
= pic
->pps
->sps
->log2_min_transform_block_size_minus2
;
626 result
.log2_diff_max_min_transform_block_size
= pic
->pps
->sps
->log2_diff_max_min_transform_block_size
;
627 result
.max_transform_hierarchy_depth_inter
= pic
->pps
->sps
->max_transform_hierarchy_depth_inter
;
628 result
.max_transform_hierarchy_depth_intra
= pic
->pps
->sps
->max_transform_hierarchy_depth_intra
;
629 result
.pcm_sample_bit_depth_luma_minus1
= pic
->pps
->sps
->pcm_sample_bit_depth_luma_minus1
;
630 result
.pcm_sample_bit_depth_chroma_minus1
= pic
->pps
->sps
->pcm_sample_bit_depth_chroma_minus1
;
631 result
.log2_min_pcm_luma_coding_block_size_minus3
= pic
->pps
->sps
->log2_min_pcm_luma_coding_block_size_minus3
;
632 result
.log2_diff_max_min_pcm_luma_coding_block_size
= pic
->pps
->sps
->log2_diff_max_min_pcm_luma_coding_block_size
;
633 result
.num_short_term_ref_pic_sets
= pic
->pps
->sps
->num_short_term_ref_pic_sets
;
635 result
.pps_info_flags
= 0;
636 result
.pps_info_flags
|= pic
->pps
->dependent_slice_segments_enabled_flag
<< 0;
637 result
.pps_info_flags
|= pic
->pps
->output_flag_present_flag
<< 1;
638 result
.pps_info_flags
|= pic
->pps
->sign_data_hiding_enabled_flag
<< 2;
639 result
.pps_info_flags
|= pic
->pps
->cabac_init_present_flag
<< 3;
640 result
.pps_info_flags
|= pic
->pps
->constrained_intra_pred_flag
<< 4;
641 result
.pps_info_flags
|= pic
->pps
->transform_skip_enabled_flag
<< 5;
642 result
.pps_info_flags
|= pic
->pps
->cu_qp_delta_enabled_flag
<< 6;
643 result
.pps_info_flags
|= pic
->pps
->pps_slice_chroma_qp_offsets_present_flag
<< 7;
644 result
.pps_info_flags
|= pic
->pps
->weighted_pred_flag
<< 8;
645 result
.pps_info_flags
|= pic
->pps
->weighted_bipred_flag
<< 9;
646 result
.pps_info_flags
|= pic
->pps
->transquant_bypass_enabled_flag
<< 10;
647 result
.pps_info_flags
|= pic
->pps
->tiles_enabled_flag
<< 11;
648 result
.pps_info_flags
|= pic
->pps
->entropy_coding_sync_enabled_flag
<< 12;
649 result
.pps_info_flags
|= pic
->pps
->uniform_spacing_flag
<< 13;
650 result
.pps_info_flags
|= pic
->pps
->loop_filter_across_tiles_enabled_flag
<< 14;
651 result
.pps_info_flags
|= pic
->pps
->pps_loop_filter_across_slices_enabled_flag
<< 15;
652 result
.pps_info_flags
|= pic
->pps
->deblocking_filter_override_enabled_flag
<< 16;
653 result
.pps_info_flags
|= pic
->pps
->pps_deblocking_filter_disabled_flag
<< 17;
654 result
.pps_info_flags
|= pic
->pps
->lists_modification_present_flag
<< 18;
655 result
.pps_info_flags
|= pic
->pps
->slice_segment_header_extension_present_flag
<< 19;
656 //result.pps_info_flags |= pic->pps->deblocking_filter_control_present_flag; ???
658 result
.num_extra_slice_header_bits
= pic
->pps
->num_extra_slice_header_bits
;
659 result
.num_long_term_ref_pic_sps
= pic
->pps
->sps
->num_long_term_ref_pics_sps
;
660 result
.num_ref_idx_l0_default_active_minus1
= pic
->pps
->num_ref_idx_l0_default_active_minus1
;
661 result
.num_ref_idx_l1_default_active_minus1
= pic
->pps
->num_ref_idx_l1_default_active_minus1
;
662 result
.pps_cb_qp_offset
= pic
->pps
->pps_cb_qp_offset
;
663 result
.pps_cr_qp_offset
= pic
->pps
->pps_cr_qp_offset
;
664 result
.pps_beta_offset_div2
= pic
->pps
->pps_beta_offset_div2
;
665 result
.pps_tc_offset_div2
= pic
->pps
->pps_tc_offset_div2
;
666 result
.diff_cu_qp_delta_depth
= pic
->pps
->diff_cu_qp_delta_depth
;
667 result
.num_tile_columns_minus1
= pic
->pps
->num_tile_columns_minus1
;
668 result
.num_tile_rows_minus1
= pic
->pps
->num_tile_rows_minus1
;
669 result
.log2_parallel_merge_level_minus2
= pic
->pps
->log2_parallel_merge_level_minus2
;
670 result
.init_qp_minus26
= pic
->pps
->init_qp_minus26
;
672 for (i
= 0; i
< 19; ++i
)
673 result
.column_width_minus1
[i
] = pic
->pps
->column_width_minus1
[i
];
675 for (i
= 0; i
< 21; ++i
)
676 result
.row_height_minus1
[i
] = pic
->pps
->row_height_minus1
[i
];
678 result
.num_delta_pocs_ref_rps_idx
= pic
->NumDeltaPocsOfRefRpsIdx
;
679 result
.curr_idx
= pic
->CurrPicOrderCntVal
;
680 result
.curr_poc
= pic
->CurrPicOrderCntVal
;
682 vl_video_buffer_set_associated_data(target
, &dec
->base
,
683 (void *)(uintptr_t)pic
->CurrPicOrderCntVal
,
684 &ruvd_destroy_associated_data
);
686 for (i
= 0; i
< 16; ++i
) {
687 struct pipe_video_buffer
*ref
= pic
->ref
[i
];
688 uintptr_t ref_pic
= 0;
690 result
.poc_list
[i
] = pic
->PicOrderCntVal
[i
];
693 ref_pic
= (uintptr_t)vl_video_buffer_get_associated_data(ref
, &dec
->base
);
696 result
.ref_pic_list
[i
] = ref_pic
;
699 for (i
= 0; i
< 8; ++i
) {
700 result
.ref_pic_set_st_curr_before
[i
] = 0xFF;
701 result
.ref_pic_set_st_curr_after
[i
] = 0xFF;
702 result
.ref_pic_set_lt_curr
[i
] = 0xFF;
705 for (i
= 0; i
< pic
->NumPocStCurrBefore
; ++i
)
706 result
.ref_pic_set_st_curr_before
[i
] = pic
->RefPicSetStCurrBefore
[i
];
708 for (i
= 0; i
< pic
->NumPocStCurrAfter
; ++i
)
709 result
.ref_pic_set_st_curr_after
[i
] = pic
->RefPicSetStCurrAfter
[i
];
711 for (i
= 0; i
< pic
->NumPocLtCurr
; ++i
)
712 result
.ref_pic_set_lt_curr
[i
] = pic
->RefPicSetLtCurr
[i
];
714 for (i
= 0; i
< 6; ++i
)
715 result
.ucScalingListDCCoefSizeID2
[i
] = pic
->pps
->sps
->ScalingListDCCoeff16x16
[i
];
717 for (i
= 0; i
< 2; ++i
)
718 result
.ucScalingListDCCoefSizeID3
[i
] = pic
->pps
->sps
->ScalingListDCCoeff32x32
[i
];
720 memcpy(dec
->it
, pic
->pps
->sps
->ScalingList4x4
, 6 * 16);
721 memcpy(dec
->it
+ 96, pic
->pps
->sps
->ScalingList8x8
, 6 * 64);
722 memcpy(dec
->it
+ 480, pic
->pps
->sps
->ScalingList16x16
, 6 * 64);
723 memcpy(dec
->it
+ 864, pic
->pps
->sps
->ScalingList32x32
, 2 * 64);
725 for (i
= 0 ; i
< 2 ; i
++) {
726 for (int j
= 0 ; j
< 15 ; j
++)
727 result
.direct_reflist
[i
][j
] = pic
->RefPicList
[i
][j
];
730 if (pic
->base
.profile
== PIPE_VIDEO_PROFILE_HEVC_MAIN_10
) {
731 if (target
->buffer_format
== PIPE_FORMAT_P016
) {
732 result
.p010_mode
= 1;
735 result
.luma_10to8
= 5;
736 result
.chroma_10to8
= 5;
737 result
.sclr_luma10to8
= 4;
738 result
.sclr_chroma10to8
= 4;
749 NumShortTermPictureSliceHeaderBits;
750 NumLongTermPictureSliceHeaderBits;
758 /* get vc1 specific message bits */
759 static struct ruvd_vc1
get_vc1_msg(struct pipe_vc1_picture_desc
*pic
)
761 struct ruvd_vc1 result
;
763 memset(&result
, 0, sizeof(result
));
765 switch(pic
->base
.profile
) {
766 case PIPE_VIDEO_PROFILE_VC1_SIMPLE
:
767 result
.profile
= RUVD_VC1_PROFILE_SIMPLE
;
771 case PIPE_VIDEO_PROFILE_VC1_MAIN
:
772 result
.profile
= RUVD_VC1_PROFILE_MAIN
;
776 case PIPE_VIDEO_PROFILE_VC1_ADVANCED
:
777 result
.profile
= RUVD_VC1_PROFILE_ADVANCED
;
785 /* fields common for all profiles */
786 result
.sps_info_flags
|= pic
->postprocflag
<< 7;
787 result
.sps_info_flags
|= pic
->pulldown
<< 6;
788 result
.sps_info_flags
|= pic
->interlace
<< 5;
789 result
.sps_info_flags
|= pic
->tfcntrflag
<< 4;
790 result
.sps_info_flags
|= pic
->finterpflag
<< 3;
791 result
.sps_info_flags
|= pic
->psf
<< 1;
793 result
.pps_info_flags
|= pic
->range_mapy_flag
<< 31;
794 result
.pps_info_flags
|= pic
->range_mapy
<< 28;
795 result
.pps_info_flags
|= pic
->range_mapuv_flag
<< 27;
796 result
.pps_info_flags
|= pic
->range_mapuv
<< 24;
797 result
.pps_info_flags
|= pic
->multires
<< 21;
798 result
.pps_info_flags
|= pic
->maxbframes
<< 16;
799 result
.pps_info_flags
|= pic
->overlap
<< 11;
800 result
.pps_info_flags
|= pic
->quantizer
<< 9;
801 result
.pps_info_flags
|= pic
->panscan_flag
<< 7;
802 result
.pps_info_flags
|= pic
->refdist_flag
<< 6;
803 result
.pps_info_flags
|= pic
->vstransform
<< 0;
805 /* some fields only apply to main/advanced profile */
806 if (pic
->base
.profile
!= PIPE_VIDEO_PROFILE_VC1_SIMPLE
) {
807 result
.pps_info_flags
|= pic
->syncmarker
<< 20;
808 result
.pps_info_flags
|= pic
->rangered
<< 19;
809 result
.pps_info_flags
|= pic
->loopfilter
<< 5;
810 result
.pps_info_flags
|= pic
->fastuvmc
<< 4;
811 result
.pps_info_flags
|= pic
->extended_mv
<< 3;
812 result
.pps_info_flags
|= pic
->extended_dmv
<< 8;
813 result
.pps_info_flags
|= pic
->dquant
<< 1;
816 result
.chroma_format
= 1;
819 //(((unsigned int)(pPicParams->advance.reserved1)) << SPS_INFO_VC1_RESERVED_SHIFT)
822 uint8_t frame_coding_mode
823 uint8_t deblockEnable
830 /* extract the frame number from a referenced video buffer */
831 static uint32_t get_ref_pic_idx(struct ruvd_decoder
*dec
, struct pipe_video_buffer
*ref
)
833 uint32_t min
= MAX2(dec
->frame_number
, NUM_MPEG2_REFS
) - NUM_MPEG2_REFS
;
834 uint32_t max
= MAX2(dec
->frame_number
, 1) - 1;
837 /* seems to be the most sane fallback */
841 /* get the frame number from the associated data */
842 frame
= (uintptr_t)vl_video_buffer_get_associated_data(ref
, &dec
->base
);
844 /* limit the frame number to a valid range */
845 return MAX2(MIN2(frame
, max
), min
);
848 /* get mpeg2 specific msg bits */
849 static struct ruvd_mpeg2
get_mpeg2_msg(struct ruvd_decoder
*dec
,
850 struct pipe_mpeg12_picture_desc
*pic
)
852 const int *zscan
= pic
->alternate_scan
? vl_zscan_alternate
: vl_zscan_normal
;
853 struct ruvd_mpeg2 result
;
856 memset(&result
, 0, sizeof(result
));
857 result
.decoded_pic_idx
= dec
->frame_number
;
858 for (i
= 0; i
< 2; ++i
)
859 result
.ref_pic_idx
[i
] = get_ref_pic_idx(dec
, pic
->ref
[i
]);
861 result
.load_intra_quantiser_matrix
= 1;
862 result
.load_nonintra_quantiser_matrix
= 1;
864 for (i
= 0; i
< 64; ++i
) {
865 result
.intra_quantiser_matrix
[i
] = pic
->intra_matrix
[zscan
[i
]];
866 result
.nonintra_quantiser_matrix
[i
] = pic
->non_intra_matrix
[zscan
[i
]];
869 result
.profile_and_level_indication
= 0;
870 result
.chroma_format
= 0x1;
872 result
.picture_coding_type
= pic
->picture_coding_type
;
873 result
.f_code
[0][0] = pic
->f_code
[0][0] + 1;
874 result
.f_code
[0][1] = pic
->f_code
[0][1] + 1;
875 result
.f_code
[1][0] = pic
->f_code
[1][0] + 1;
876 result
.f_code
[1][1] = pic
->f_code
[1][1] + 1;
877 result
.intra_dc_precision
= pic
->intra_dc_precision
;
878 result
.pic_structure
= pic
->picture_structure
;
879 result
.top_field_first
= pic
->top_field_first
;
880 result
.frame_pred_frame_dct
= pic
->frame_pred_frame_dct
;
881 result
.concealment_motion_vectors
= pic
->concealment_motion_vectors
;
882 result
.q_scale_type
= pic
->q_scale_type
;
883 result
.intra_vlc_format
= pic
->intra_vlc_format
;
884 result
.alternate_scan
= pic
->alternate_scan
;
889 /* get mpeg4 specific msg bits */
890 static struct ruvd_mpeg4
get_mpeg4_msg(struct ruvd_decoder
*dec
,
891 struct pipe_mpeg4_picture_desc
*pic
)
893 struct ruvd_mpeg4 result
;
896 memset(&result
, 0, sizeof(result
));
897 result
.decoded_pic_idx
= dec
->frame_number
;
898 for (i
= 0; i
< 2; ++i
)
899 result
.ref_pic_idx
[i
] = get_ref_pic_idx(dec
, pic
->ref
[i
]);
901 result
.variant_type
= 0;
902 result
.profile_and_level_indication
= 0xF0; // ASP Level0
904 result
.video_object_layer_verid
= 0x5; // advanced simple
905 result
.video_object_layer_shape
= 0x0; // rectangular
907 result
.video_object_layer_width
= dec
->base
.width
;
908 result
.video_object_layer_height
= dec
->base
.height
;
910 result
.vop_time_increment_resolution
= pic
->vop_time_increment_resolution
;
912 result
.flags
|= pic
->short_video_header
<< 0;
913 //result.flags |= obmc_disable << 1;
914 result
.flags
|= pic
->interlaced
<< 2;
915 result
.flags
|= 1 << 3; // load_intra_quant_mat
916 result
.flags
|= 1 << 4; // load_nonintra_quant_mat
917 result
.flags
|= pic
->quarter_sample
<< 5;
918 result
.flags
|= 1 << 6; // complexity_estimation_disable
919 result
.flags
|= pic
->resync_marker_disable
<< 7;
920 //result.flags |= data_partitioned << 8;
921 //result.flags |= reversible_vlc << 9;
922 result
.flags
|= 0 << 10; // newpred_enable
923 result
.flags
|= 0 << 11; // reduced_resolution_vop_enable
924 //result.flags |= scalability << 12;
925 //result.flags |= is_object_layer_identifier << 13;
926 //result.flags |= fixed_vop_rate << 14;
927 //result.flags |= newpred_segment_type << 15;
929 result
.quant_type
= pic
->quant_type
;
931 for (i
= 0; i
< 64; ++i
) {
932 result
.intra_quant_mat
[i
] = pic
->intra_matrix
[vl_zscan_normal
[i
]];
933 result
.nonintra_quant_mat
[i
] = pic
->non_intra_matrix
[vl_zscan_normal
[i
]];
939 uint8_t vop_coding_type
940 uint8_t vop_fcode_forward
941 uint8_t vop_fcode_backward
942 uint8_t rounding_control
943 uint8_t alternate_vertical_scan_flag
944 uint8_t top_field_first
950 static void get_mjpeg_slice_header(struct ruvd_decoder
*dec
, struct pipe_mjpeg_picture_desc
*pic
)
952 int size
= 0, saved_size
, len_pos
, i
;
954 uint8_t *buf
= dec
->bs_ptr
;
967 for (i
= 0; i
< 4; ++i
) {
968 if (pic
->quantization_table
.load_quantiser_table
[i
] == 0)
972 memcpy((buf
+ size
), &pic
->quantization_table
.quantiser_table
[i
], 64);
976 bs
= (uint16_t*)&buf
[len_pos
];
977 *bs
= util_bswap16(size
- 4);
988 for (i
= 0; i
< 2; ++i
) {
989 if (pic
->huffman_table
.load_huffman_table
[i
] == 0)
992 buf
[size
++] = 0x00 | i
;
993 memcpy((buf
+ size
), &pic
->huffman_table
.table
[i
].num_dc_codes
, 16);
995 memcpy((buf
+ size
), &pic
->huffman_table
.table
[i
].dc_values
, 12);
999 for (i
= 0; i
< 2; ++i
) {
1000 if (pic
->huffman_table
.load_huffman_table
[i
] == 0)
1003 buf
[size
++] = 0x10 | i
;
1004 memcpy((buf
+ size
), &pic
->huffman_table
.table
[i
].num_ac_codes
, 16);
1006 memcpy((buf
+ size
), &pic
->huffman_table
.table
[i
].ac_values
, 162);
1010 bs
= (uint16_t*)&buf
[len_pos
];
1011 *bs
= util_bswap16(size
- saved_size
- 2);
1016 if (pic
->slice_parameter
.restart_interval
) {
1021 bs
= (uint16_t*)&buf
[size
++];
1022 *bs
= util_bswap16(pic
->slice_parameter
.restart_interval
);
1023 saved_size
= ++size
;
1035 bs
= (uint16_t*)&buf
[size
++];
1036 *bs
= util_bswap16(pic
->picture_parameter
.picture_height
);
1039 bs
= (uint16_t*)&buf
[size
++];
1040 *bs
= util_bswap16(pic
->picture_parameter
.picture_width
);
1043 buf
[size
++] = pic
->picture_parameter
.num_components
;
1045 for (i
= 0; i
< pic
->picture_parameter
.num_components
; ++i
) {
1046 buf
[size
++] = pic
->picture_parameter
.components
[i
].component_id
;
1047 buf
[size
++] = pic
->picture_parameter
.components
[i
].h_sampling_factor
<< 4 |
1048 pic
->picture_parameter
.components
[i
].v_sampling_factor
;
1049 buf
[size
++] = pic
->picture_parameter
.components
[i
].quantiser_table_selector
;
1052 bs
= (uint16_t*)&buf
[len_pos
];
1053 *bs
= util_bswap16(size
- saved_size
- 2);
1064 buf
[size
++] = pic
->slice_parameter
.num_components
;
1066 for (i
= 0; i
< pic
->slice_parameter
.num_components
; ++i
) {
1067 buf
[size
++] = pic
->slice_parameter
.components
[i
].component_selector
;
1068 buf
[size
++] = pic
->slice_parameter
.components
[i
].dc_table_selector
<< 4 |
1069 pic
->slice_parameter
.components
[i
].ac_table_selector
;
1076 bs
= (uint16_t*)&buf
[len_pos
];
1077 *bs
= util_bswap16(size
- saved_size
- 2);
1079 dec
->bs_ptr
+= size
;
1080 dec
->bs_size
+= size
;
1084 * destroy this video decoder
1086 static void ruvd_destroy(struct pipe_video_codec
*decoder
)
1088 struct ruvd_decoder
*dec
= (struct ruvd_decoder
*)decoder
;
1093 map_msg_fb_it_buf(dec
);
1094 dec
->msg
->size
= sizeof(*dec
->msg
);
1095 dec
->msg
->msg_type
= RUVD_MSG_DESTROY
;
1096 dec
->msg
->stream_handle
= dec
->stream_handle
;
1101 dec
->ws
->cs_destroy(dec
->cs
);
1103 for (i
= 0; i
< NUM_BUFFERS
; ++i
) {
1104 si_vid_destroy_buffer(&dec
->msg_fb_it_buffers
[i
]);
1105 si_vid_destroy_buffer(&dec
->bs_buffers
[i
]);
1108 si_vid_destroy_buffer(&dec
->dpb
);
1109 si_vid_destroy_buffer(&dec
->ctx
);
1110 si_vid_destroy_buffer(&dec
->sessionctx
);
1116 * start decoding of a new frame
1118 static void ruvd_begin_frame(struct pipe_video_codec
*decoder
,
1119 struct pipe_video_buffer
*target
,
1120 struct pipe_picture_desc
*picture
)
1122 struct ruvd_decoder
*dec
= (struct ruvd_decoder
*)decoder
;
1127 frame
= ++dec
->frame_number
;
1128 vl_video_buffer_set_associated_data(target
, decoder
, (void *)frame
,
1129 &ruvd_destroy_associated_data
);
1132 dec
->bs_ptr
= dec
->ws
->buffer_map(
1133 dec
->bs_buffers
[dec
->cur_buffer
].res
->buf
,
1134 dec
->cs
, PIPE_TRANSFER_WRITE
);
1138 * decode a macroblock
1140 static void ruvd_decode_macroblock(struct pipe_video_codec
*decoder
,
1141 struct pipe_video_buffer
*target
,
1142 struct pipe_picture_desc
*picture
,
1143 const struct pipe_macroblock
*macroblocks
,
1144 unsigned num_macroblocks
)
1146 /* not supported (yet) */
1151 * decode a bitstream
1153 static void ruvd_decode_bitstream(struct pipe_video_codec
*decoder
,
1154 struct pipe_video_buffer
*target
,
1155 struct pipe_picture_desc
*picture
,
1156 unsigned num_buffers
,
1157 const void * const *buffers
,
1158 const unsigned *sizes
)
1160 struct ruvd_decoder
*dec
= (struct ruvd_decoder
*)decoder
;
1161 enum pipe_video_format format
= u_reduce_video_profile(picture
->profile
);
1169 if (format
== PIPE_VIDEO_FORMAT_JPEG
)
1170 get_mjpeg_slice_header(dec
, (struct pipe_mjpeg_picture_desc
*)picture
);
1172 for (i
= 0; i
< num_buffers
; ++i
) {
1173 struct rvid_buffer
*buf
= &dec
->bs_buffers
[dec
->cur_buffer
];
1174 unsigned new_size
= dec
->bs_size
+ sizes
[i
];
1176 if (format
== PIPE_VIDEO_FORMAT_JPEG
)
1177 new_size
+= 2; /* save for EOI */
1179 if (new_size
> buf
->res
->buf
->size
) {
1180 dec
->ws
->buffer_unmap(buf
->res
->buf
);
1181 if (!si_vid_resize_buffer(dec
->screen
, dec
->cs
, buf
, new_size
)) {
1182 RVID_ERR("Can't resize bitstream buffer!");
1186 dec
->bs_ptr
= dec
->ws
->buffer_map(buf
->res
->buf
, dec
->cs
,
1187 PIPE_TRANSFER_WRITE
);
1191 dec
->bs_ptr
+= dec
->bs_size
;
1194 memcpy(dec
->bs_ptr
, buffers
[i
], sizes
[i
]);
1195 dec
->bs_size
+= sizes
[i
];
1196 dec
->bs_ptr
+= sizes
[i
];
1199 if (format
== PIPE_VIDEO_FORMAT_JPEG
) {
1200 ((uint8_t *)dec
->bs_ptr
)[0] = 0xff; /* EOI */
1201 ((uint8_t *)dec
->bs_ptr
)[1] = 0xd9;
1208 * end decoding of the current frame
1210 static void ruvd_end_frame(struct pipe_video_codec
*decoder
,
1211 struct pipe_video_buffer
*target
,
1212 struct pipe_picture_desc
*picture
)
1214 struct ruvd_decoder
*dec
= (struct ruvd_decoder
*)decoder
;
1215 struct pb_buffer
*dt
;
1216 struct rvid_buffer
*msg_fb_it_buf
, *bs_buf
;
1224 msg_fb_it_buf
= &dec
->msg_fb_it_buffers
[dec
->cur_buffer
];
1225 bs_buf
= &dec
->bs_buffers
[dec
->cur_buffer
];
1227 bs_size
= align(dec
->bs_size
, 128);
1228 memset(dec
->bs_ptr
, 0, bs_size
- dec
->bs_size
);
1229 dec
->ws
->buffer_unmap(bs_buf
->res
->buf
);
1231 map_msg_fb_it_buf(dec
);
1232 dec
->msg
->size
= sizeof(*dec
->msg
);
1233 dec
->msg
->msg_type
= RUVD_MSG_DECODE
;
1234 dec
->msg
->stream_handle
= dec
->stream_handle
;
1235 dec
->msg
->status_report_feedback_number
= dec
->frame_number
;
1237 dec
->msg
->body
.decode
.stream_type
= dec
->stream_type
;
1238 dec
->msg
->body
.decode
.decode_flags
= 0x1;
1239 dec
->msg
->body
.decode
.width_in_samples
= dec
->base
.width
;
1240 dec
->msg
->body
.decode
.height_in_samples
= dec
->base
.height
;
1242 if ((picture
->profile
== PIPE_VIDEO_PROFILE_VC1_SIMPLE
) ||
1243 (picture
->profile
== PIPE_VIDEO_PROFILE_VC1_MAIN
)) {
1244 dec
->msg
->body
.decode
.width_in_samples
= align(dec
->msg
->body
.decode
.width_in_samples
, 16) / 16;
1245 dec
->msg
->body
.decode
.height_in_samples
= align(dec
->msg
->body
.decode
.height_in_samples
, 16) / 16;
1249 dec
->msg
->body
.decode
.dpb_size
= dec
->dpb
.res
->buf
->size
;
1250 dec
->msg
->body
.decode
.bsd_size
= bs_size
;
1251 dec
->msg
->body
.decode
.db_pitch
= align(dec
->base
.width
, get_db_pitch_alignment(dec
));
1253 if (dec
->stream_type
== RUVD_CODEC_H264_PERF
&&
1254 ((struct r600_common_screen
*)dec
->screen
)->family
>= CHIP_POLARIS10
)
1255 dec
->msg
->body
.decode
.dpb_reserved
= dec
->ctx
.res
->buf
->size
;
1257 dt
= dec
->set_dtb(dec
->msg
, (struct vl_video_buffer
*)target
);
1258 if (((struct r600_common_screen
*)dec
->screen
)->family
>= CHIP_STONEY
)
1259 dec
->msg
->body
.decode
.dt_wa_chroma_top_offset
= dec
->msg
->body
.decode
.dt_pitch
/ 2;
1261 switch (u_reduce_video_profile(picture
->profile
)) {
1262 case PIPE_VIDEO_FORMAT_MPEG4_AVC
:
1263 dec
->msg
->body
.decode
.codec
.h264
= get_h264_msg(dec
, (struct pipe_h264_picture_desc
*)picture
);
1266 case PIPE_VIDEO_FORMAT_HEVC
:
1267 dec
->msg
->body
.decode
.codec
.h265
= get_h265_msg(dec
, target
, (struct pipe_h265_picture_desc
*)picture
);
1268 if (dec
->ctx
.res
== NULL
) {
1270 if (dec
->base
.profile
== PIPE_VIDEO_PROFILE_HEVC_MAIN_10
)
1271 ctx_size
= calc_ctx_size_h265_main10(dec
, (struct pipe_h265_picture_desc
*)picture
);
1273 ctx_size
= calc_ctx_size_h265_main(dec
);
1274 if (!si_vid_create_buffer(dec
->screen
, &dec
->ctx
, ctx_size
, PIPE_USAGE_DEFAULT
)) {
1275 RVID_ERR("Can't allocated context buffer.\n");
1277 si_vid_clear_buffer(decoder
->context
, &dec
->ctx
);
1281 dec
->msg
->body
.decode
.dpb_reserved
= dec
->ctx
.res
->buf
->size
;
1284 case PIPE_VIDEO_FORMAT_VC1
:
1285 dec
->msg
->body
.decode
.codec
.vc1
= get_vc1_msg((struct pipe_vc1_picture_desc
*)picture
);
1288 case PIPE_VIDEO_FORMAT_MPEG12
:
1289 dec
->msg
->body
.decode
.codec
.mpeg2
= get_mpeg2_msg(dec
, (struct pipe_mpeg12_picture_desc
*)picture
);
1292 case PIPE_VIDEO_FORMAT_MPEG4
:
1293 dec
->msg
->body
.decode
.codec
.mpeg4
= get_mpeg4_msg(dec
, (struct pipe_mpeg4_picture_desc
*)picture
);
1296 case PIPE_VIDEO_FORMAT_JPEG
:
1304 dec
->msg
->body
.decode
.db_surf_tile_config
= dec
->msg
->body
.decode
.dt_surf_tile_config
;
1305 dec
->msg
->body
.decode
.extension_support
= 0x1;
1307 /* set at least the feedback buffer size */
1308 dec
->fb
[0] = dec
->fb_size
;
1313 send_cmd(dec
, RUVD_CMD_DPB_BUFFER
, dec
->dpb
.res
->buf
, 0,
1314 RADEON_USAGE_READWRITE
, RADEON_DOMAIN_VRAM
);
1317 send_cmd(dec
, RUVD_CMD_CONTEXT_BUFFER
, dec
->ctx
.res
->buf
, 0,
1318 RADEON_USAGE_READWRITE
, RADEON_DOMAIN_VRAM
);
1319 send_cmd(dec
, RUVD_CMD_BITSTREAM_BUFFER
, bs_buf
->res
->buf
,
1320 0, RADEON_USAGE_READ
, RADEON_DOMAIN_GTT
);
1321 send_cmd(dec
, RUVD_CMD_DECODING_TARGET_BUFFER
, dt
, 0,
1322 RADEON_USAGE_WRITE
, RADEON_DOMAIN_VRAM
);
1323 send_cmd(dec
, RUVD_CMD_FEEDBACK_BUFFER
, msg_fb_it_buf
->res
->buf
,
1324 FB_BUFFER_OFFSET
, RADEON_USAGE_WRITE
, RADEON_DOMAIN_GTT
);
1326 send_cmd(dec
, RUVD_CMD_ITSCALING_TABLE_BUFFER
, msg_fb_it_buf
->res
->buf
,
1327 FB_BUFFER_OFFSET
+ dec
->fb_size
, RADEON_USAGE_READ
, RADEON_DOMAIN_GTT
);
1328 set_reg(dec
, dec
->reg
.cntl
, 1);
1330 flush(dec
, RADEON_FLUSH_ASYNC
);
1335 * flush any outstanding command buffers to the hardware
1337 static void ruvd_flush(struct pipe_video_codec
*decoder
)
1342 * create and UVD decoder
1344 struct pipe_video_codec
*si_common_uvd_create_decoder(struct pipe_context
*context
,
1345 const struct pipe_video_codec
*templ
,
1346 ruvd_set_dtb set_dtb
)
1348 struct radeon_winsys
* ws
= ((struct r600_common_context
*)context
)->ws
;
1349 struct r600_common_context
*rctx
= (struct r600_common_context
*)context
;
1351 unsigned width
= templ
->width
, height
= templ
->height
;
1352 unsigned bs_buf_size
;
1353 struct radeon_info info
;
1354 struct ruvd_decoder
*dec
;
1357 ws
->query_info(ws
, &info
);
1359 switch(u_reduce_video_profile(templ
->profile
)) {
1360 case PIPE_VIDEO_FORMAT_MPEG12
:
1361 if (templ
->entrypoint
> PIPE_VIDEO_ENTRYPOINT_BITSTREAM
)
1362 return vl_create_mpeg12_decoder(context
, templ
);
1365 case PIPE_VIDEO_FORMAT_MPEG4
:
1366 width
= align(width
, VL_MACROBLOCK_WIDTH
);
1367 height
= align(height
, VL_MACROBLOCK_HEIGHT
);
1369 case PIPE_VIDEO_FORMAT_MPEG4_AVC
:
1370 width
= align(width
, VL_MACROBLOCK_WIDTH
);
1371 height
= align(height
, VL_MACROBLOCK_HEIGHT
);
1379 dec
= CALLOC_STRUCT(ruvd_decoder
);
1384 if (info
.drm_major
< 3)
1385 dec
->use_legacy
= true;
1388 dec
->base
.context
= context
;
1389 dec
->base
.width
= width
;
1390 dec
->base
.height
= height
;
1392 dec
->base
.destroy
= ruvd_destroy
;
1393 dec
->base
.begin_frame
= ruvd_begin_frame
;
1394 dec
->base
.decode_macroblock
= ruvd_decode_macroblock
;
1395 dec
->base
.decode_bitstream
= ruvd_decode_bitstream
;
1396 dec
->base
.end_frame
= ruvd_end_frame
;
1397 dec
->base
.flush
= ruvd_flush
;
1399 dec
->stream_type
= profile2stream_type(dec
, info
.family
);
1400 dec
->set_dtb
= set_dtb
;
1401 dec
->stream_handle
= si_vid_alloc_stream_handle();
1402 dec
->screen
= context
->screen
;
1404 dec
->cs
= ws
->cs_create(rctx
->ctx
, RING_UVD
, NULL
, NULL
);
1406 RVID_ERR("Can't get command submission context.\n");
1410 dec
->fb_size
= (info
.family
== CHIP_TONGA
) ? FB_BUFFER_SIZE_TONGA
:
1412 bs_buf_size
= width
* height
* (512 / (16 * 16));
1413 for (i
= 0; i
< NUM_BUFFERS
; ++i
) {
1414 unsigned msg_fb_it_size
= FB_BUFFER_OFFSET
+ dec
->fb_size
;
1415 STATIC_ASSERT(sizeof(struct ruvd_msg
) <= FB_BUFFER_OFFSET
);
1417 msg_fb_it_size
+= IT_SCALING_TABLE_SIZE
;
1418 if (!si_vid_create_buffer(dec
->screen
, &dec
->msg_fb_it_buffers
[i
],
1419 msg_fb_it_size
, PIPE_USAGE_STAGING
)) {
1420 RVID_ERR("Can't allocated message buffers.\n");
1424 if (!si_vid_create_buffer(dec
->screen
, &dec
->bs_buffers
[i
],
1425 bs_buf_size
, PIPE_USAGE_STAGING
)) {
1426 RVID_ERR("Can't allocated bitstream buffers.\n");
1430 si_vid_clear_buffer(context
, &dec
->msg_fb_it_buffers
[i
]);
1431 si_vid_clear_buffer(context
, &dec
->bs_buffers
[i
]);
1434 dpb_size
= calc_dpb_size(dec
);
1436 if (!si_vid_create_buffer(dec
->screen
, &dec
->dpb
, dpb_size
, PIPE_USAGE_DEFAULT
)) {
1437 RVID_ERR("Can't allocated dpb.\n");
1440 si_vid_clear_buffer(context
, &dec
->dpb
);
1443 if (dec
->stream_type
== RUVD_CODEC_H264_PERF
&& info
.family
>= CHIP_POLARIS10
) {
1444 unsigned ctx_size
= calc_ctx_size_h264_perf(dec
);
1445 if (!si_vid_create_buffer(dec
->screen
, &dec
->ctx
, ctx_size
, PIPE_USAGE_DEFAULT
)) {
1446 RVID_ERR("Can't allocated context buffer.\n");
1449 si_vid_clear_buffer(context
, &dec
->ctx
);
1452 if (info
.family
>= CHIP_POLARIS10
&& info
.drm_minor
>= 3) {
1453 if (!si_vid_create_buffer(dec
->screen
, &dec
->sessionctx
,
1454 UVD_SESSION_CONTEXT_SIZE
,
1455 PIPE_USAGE_DEFAULT
)) {
1456 RVID_ERR("Can't allocated session ctx.\n");
1459 si_vid_clear_buffer(context
, &dec
->sessionctx
);
1462 if (info
.family
>= CHIP_VEGA10
) {
1463 dec
->reg
.data0
= RUVD_GPCOM_VCPU_DATA0_SOC15
;
1464 dec
->reg
.data1
= RUVD_GPCOM_VCPU_DATA1_SOC15
;
1465 dec
->reg
.cmd
= RUVD_GPCOM_VCPU_CMD_SOC15
;
1466 dec
->reg
.cntl
= RUVD_ENGINE_CNTL_SOC15
;
1468 dec
->reg
.data0
= RUVD_GPCOM_VCPU_DATA0
;
1469 dec
->reg
.data1
= RUVD_GPCOM_VCPU_DATA1
;
1470 dec
->reg
.cmd
= RUVD_GPCOM_VCPU_CMD
;
1471 dec
->reg
.cntl
= RUVD_ENGINE_CNTL
;
1474 map_msg_fb_it_buf(dec
);
1475 dec
->msg
->size
= sizeof(*dec
->msg
);
1476 dec
->msg
->msg_type
= RUVD_MSG_CREATE
;
1477 dec
->msg
->stream_handle
= dec
->stream_handle
;
1478 dec
->msg
->body
.create
.stream_type
= dec
->stream_type
;
1479 dec
->msg
->body
.create
.width_in_samples
= dec
->base
.width
;
1480 dec
->msg
->body
.create
.height_in_samples
= dec
->base
.height
;
1481 dec
->msg
->body
.create
.dpb_size
= dpb_size
;
1492 if (dec
->cs
) dec
->ws
->cs_destroy(dec
->cs
);
1494 for (i
= 0; i
< NUM_BUFFERS
; ++i
) {
1495 si_vid_destroy_buffer(&dec
->msg_fb_it_buffers
[i
]);
1496 si_vid_destroy_buffer(&dec
->bs_buffers
[i
]);
1499 si_vid_destroy_buffer(&dec
->dpb
);
1500 si_vid_destroy_buffer(&dec
->ctx
);
1501 si_vid_destroy_buffer(&dec
->sessionctx
);
1508 /* calculate top/bottom offset */
1509 static unsigned texture_offset(struct radeon_surf
*surface
, unsigned layer
,
1510 enum ruvd_surface_type type
)
1514 case RUVD_SURFACE_TYPE_LEGACY
:
1515 return surface
->u
.legacy
.level
[0].offset
+
1516 layer
* surface
->u
.legacy
.level
[0].slice_size
;
1518 case RUVD_SURFACE_TYPE_GFX9
:
1519 return surface
->u
.gfx9
.surf_offset
+
1520 layer
* surface
->u
.gfx9
.surf_slice_size
;
1525 /* hw encode the aspect of macro tiles */
1526 static unsigned macro_tile_aspect(unsigned macro_tile_aspect
)
1528 switch (macro_tile_aspect
) {
1530 case 1: macro_tile_aspect
= 0; break;
1531 case 2: macro_tile_aspect
= 1; break;
1532 case 4: macro_tile_aspect
= 2; break;
1533 case 8: macro_tile_aspect
= 3; break;
1535 return macro_tile_aspect
;
1538 /* hw encode the bank width and height */
1539 static unsigned bank_wh(unsigned bankwh
)
1543 case 1: bankwh
= 0; break;
1544 case 2: bankwh
= 1; break;
1545 case 4: bankwh
= 2; break;
1546 case 8: bankwh
= 3; break;
1552 * fill decoding target field from the luma and chroma surfaces
1554 void si_uvd_set_dt_surfaces(struct ruvd_msg
*msg
, struct radeon_surf
*luma
,
1555 struct radeon_surf
*chroma
, enum ruvd_surface_type type
)
1559 case RUVD_SURFACE_TYPE_LEGACY
:
1560 msg
->body
.decode
.dt_pitch
= luma
->u
.legacy
.level
[0].nblk_x
* luma
->blk_w
;
1561 switch (luma
->u
.legacy
.level
[0].mode
) {
1562 case RADEON_SURF_MODE_LINEAR_ALIGNED
:
1563 msg
->body
.decode
.dt_tiling_mode
= RUVD_TILE_LINEAR
;
1564 msg
->body
.decode
.dt_array_mode
= RUVD_ARRAY_MODE_LINEAR
;
1566 case RADEON_SURF_MODE_1D
:
1567 msg
->body
.decode
.dt_tiling_mode
= RUVD_TILE_8X8
;
1568 msg
->body
.decode
.dt_array_mode
= RUVD_ARRAY_MODE_1D_THIN
;
1570 case RADEON_SURF_MODE_2D
:
1571 msg
->body
.decode
.dt_tiling_mode
= RUVD_TILE_8X8
;
1572 msg
->body
.decode
.dt_array_mode
= RUVD_ARRAY_MODE_2D_THIN
;
1579 msg
->body
.decode
.dt_luma_top_offset
= texture_offset(luma
, 0, type
);
1581 msg
->body
.decode
.dt_chroma_top_offset
= texture_offset(chroma
, 0, type
);
1582 if (msg
->body
.decode
.dt_field_mode
) {
1583 msg
->body
.decode
.dt_luma_bottom_offset
= texture_offset(luma
, 1, type
);
1585 msg
->body
.decode
.dt_chroma_bottom_offset
= texture_offset(chroma
, 1, type
);
1587 msg
->body
.decode
.dt_luma_bottom_offset
= msg
->body
.decode
.dt_luma_top_offset
;
1588 msg
->body
.decode
.dt_chroma_bottom_offset
= msg
->body
.decode
.dt_chroma_top_offset
;
1592 assert(luma
->u
.legacy
.bankw
== chroma
->u
.legacy
.bankw
);
1593 assert(luma
->u
.legacy
.bankh
== chroma
->u
.legacy
.bankh
);
1594 assert(luma
->u
.legacy
.mtilea
== chroma
->u
.legacy
.mtilea
);
1597 msg
->body
.decode
.dt_surf_tile_config
|= RUVD_BANK_WIDTH(bank_wh(luma
->u
.legacy
.bankw
));
1598 msg
->body
.decode
.dt_surf_tile_config
|= RUVD_BANK_HEIGHT(bank_wh(luma
->u
.legacy
.bankh
));
1599 msg
->body
.decode
.dt_surf_tile_config
|= RUVD_MACRO_TILE_ASPECT_RATIO(macro_tile_aspect(luma
->u
.legacy
.mtilea
));
1601 case RUVD_SURFACE_TYPE_GFX9
:
1602 msg
->body
.decode
.dt_pitch
= luma
->u
.gfx9
.surf_pitch
* luma
->blk_w
;
1603 /* SWIZZLE LINEAR MODE */
1604 msg
->body
.decode
.dt_tiling_mode
= RUVD_TILE_LINEAR
;
1605 msg
->body
.decode
.dt_array_mode
= RUVD_ARRAY_MODE_LINEAR
;
1606 msg
->body
.decode
.dt_luma_top_offset
= texture_offset(luma
, 0, type
);
1607 msg
->body
.decode
.dt_chroma_top_offset
= texture_offset(chroma
, 0, type
);
1608 if (msg
->body
.decode
.dt_field_mode
) {
1609 msg
->body
.decode
.dt_luma_bottom_offset
= texture_offset(luma
, 1, type
);
1610 msg
->body
.decode
.dt_chroma_bottom_offset
= texture_offset(chroma
, 1, type
);
1612 msg
->body
.decode
.dt_luma_bottom_offset
= msg
->body
.decode
.dt_luma_top_offset
;
1613 msg
->body
.decode
.dt_chroma_bottom_offset
= msg
->body
.decode
.dt_chroma_top_offset
;
1615 msg
->body
.decode
.dt_surf_tile_config
= 0;