winsys/radeon: fold cs_set_flush_callback into cs_create
[mesa.git] / src / gallium / drivers / radeon / radeon_vce.c
1 /**************************************************************************
2 *
3 * Copyright 2013 Advanced Micro Devices, Inc.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28 /*
29 * Authors:
30 * Christian König <christian.koenig@amd.com>
31 *
32 */
33
34 #include <stdio.h>
35
36 #include "pipe/p_video_codec.h"
37
38 #include "util/u_video.h"
39 #include "util/u_memory.h"
40
41 #include "vl/vl_video_buffer.h"
42
43 #include "../../winsys/radeon/drm/radeon_winsys.h"
44 #include "r600_pipe_common.h"
45 #include "radeon_video.h"
46 #include "radeon_vce.h"
47
48 /**
49 * flush commands to the hardware
50 */
51 static void flush(struct rvce_encoder *enc)
52 {
53 enc->ws->cs_flush(enc->cs, RADEON_FLUSH_ASYNC, 0);
54 }
55
56 #if 0
57 static void dump_feedback(struct rvce_encoder *enc, struct rvid_buffer *fb)
58 {
59 uint32_t *ptr = enc->ws->buffer_map(fb->cs_handle, enc->cs, PIPE_TRANSFER_READ_WRITE);
60 unsigned i = 0;
61 fprintf(stderr, "\n");
62 fprintf(stderr, "encStatus:\t\t\t%08x\n", ptr[i++]);
63 fprintf(stderr, "encHasBitstream:\t\t%08x\n", ptr[i++]);
64 fprintf(stderr, "encHasAudioBitstream:\t\t%08x\n", ptr[i++]);
65 fprintf(stderr, "encBitstreamOffset:\t\t%08x\n", ptr[i++]);
66 fprintf(stderr, "encBitstreamSize:\t\t%08x\n", ptr[i++]);
67 fprintf(stderr, "encAudioBitstreamOffset:\t%08x\n", ptr[i++]);
68 fprintf(stderr, "encAudioBitstreamSize:\t\t%08x\n", ptr[i++]);
69 fprintf(stderr, "encExtrabytes:\t\t\t%08x\n", ptr[i++]);
70 fprintf(stderr, "encAudioExtrabytes:\t\t%08x\n", ptr[i++]);
71 fprintf(stderr, "videoTimeStamp:\t\t\t%08x\n", ptr[i++]);
72 fprintf(stderr, "audioTimeStamp:\t\t\t%08x\n", ptr[i++]);
73 fprintf(stderr, "videoOutputType:\t\t%08x\n", ptr[i++]);
74 fprintf(stderr, "attributeFlags:\t\t\t%08x\n", ptr[i++]);
75 fprintf(stderr, "seiPrivatePackageOffset:\t%08x\n", ptr[i++]);
76 fprintf(stderr, "seiPrivatePackageSize:\t\t%08x\n", ptr[i++]);
77 fprintf(stderr, "\n");
78 enc->ws->buffer_unmap(fb->cs_handle);
79 }
80 #endif
81
82 /**
83 * reset the CPB handling
84 */
85 static void reset_cpb(struct rvce_encoder *enc)
86 {
87 unsigned i;
88
89 LIST_INITHEAD(&enc->cpb_slots);
90 for (i = 0; i < RVCE_NUM_CPB_FRAMES; ++i) {
91 struct rvce_cpb_slot *slot = &enc->cpb_array[i];
92 slot->index = i;
93 slot->picture_type = PIPE_H264_ENC_PICTURE_TYPE_SKIP;
94 slot->frame_num = 0;
95 slot->pic_order_cnt = 0;
96 LIST_ADDTAIL(&slot->list, &enc->cpb_slots);
97 }
98 }
99
100 /**
101 * sort l0 and l1 to the top of the list
102 */
103 static void sort_cpb(struct rvce_encoder *enc)
104 {
105 struct rvce_cpb_slot *i, *l0 = NULL, *l1 = NULL;
106
107 LIST_FOR_EACH_ENTRY(i, &enc->cpb_slots, list) {
108 if (i->frame_num == enc->pic.ref_idx_l0)
109 l0 = i;
110
111 if (i->frame_num == enc->pic.ref_idx_l1)
112 l1 = i;
113
114 if (enc->pic.picture_type == PIPE_H264_ENC_PICTURE_TYPE_P && l0)
115 break;
116
117 if (enc->pic.picture_type == PIPE_H264_ENC_PICTURE_TYPE_B &&
118 l0 && l1)
119 break;
120 }
121
122 if (l1) {
123 LIST_DEL(&l1->list);
124 LIST_ADD(&l1->list, &enc->cpb_slots);
125 }
126
127 if (l0) {
128 LIST_DEL(&l0->list);
129 LIST_ADD(&l0->list, &enc->cpb_slots);
130 }
131 }
132
133 /**
134 * destroy this video encoder
135 */
136 static void rvce_destroy(struct pipe_video_codec *encoder)
137 {
138 struct rvce_encoder *enc = (struct rvce_encoder*)encoder;
139 if (enc->stream_handle) {
140 struct rvid_buffer fb;
141 rvid_create_buffer(enc->ws, &fb, 512, RADEON_DOMAIN_GTT);
142 enc->fb = &fb;
143 enc->session(enc);
144 enc->feedback(enc);
145 enc->destroy(enc);
146 flush(enc);
147 rvid_destroy_buffer(&fb);
148 }
149 rvid_destroy_buffer(&enc->cpb);
150 enc->ws->cs_destroy(enc->cs);
151 FREE(enc->cpb_array);
152 FREE(enc);
153 }
154
155 static void rvce_begin_frame(struct pipe_video_codec *encoder,
156 struct pipe_video_buffer *source,
157 struct pipe_picture_desc *picture)
158 {
159 struct rvce_encoder *enc = (struct rvce_encoder*)encoder;
160 struct vl_video_buffer *vid_buf = (struct vl_video_buffer *)source;
161 struct pipe_h264_enc_picture_desc *pic = (struct pipe_h264_enc_picture_desc *)picture;
162
163 bool need_rate_control =
164 enc->pic.rate_ctrl.rate_ctrl_method != pic->rate_ctrl.rate_ctrl_method ||
165 enc->pic.quant_i_frames != pic->quant_i_frames ||
166 enc->pic.quant_p_frames != pic->quant_p_frames ||
167 enc->pic.quant_b_frames != pic->quant_b_frames;
168
169 enc->pic = *pic;
170
171 enc->get_buffer(vid_buf->resources[0], &enc->handle, &enc->luma);
172 enc->get_buffer(vid_buf->resources[1], NULL, &enc->chroma);
173
174 if (pic->picture_type == PIPE_H264_ENC_PICTURE_TYPE_IDR)
175 reset_cpb(enc);
176 else if (pic->picture_type == PIPE_H264_ENC_PICTURE_TYPE_P ||
177 pic->picture_type == PIPE_H264_ENC_PICTURE_TYPE_B)
178 sort_cpb(enc);
179
180 if (!enc->stream_handle) {
181 struct rvid_buffer fb;
182 enc->stream_handle = rvid_alloc_stream_handle();
183 rvid_create_buffer(enc->ws, &fb, 512, RADEON_DOMAIN_GTT);
184 enc->fb = &fb;
185 enc->session(enc);
186 enc->create(enc);
187 enc->rate_control(enc);
188 need_rate_control = false;
189 enc->config_extension(enc);
190 enc->motion_estimation(enc);
191 enc->rdo(enc);
192 enc->pic_control(enc);
193 enc->feedback(enc);
194 flush(enc);
195 //dump_feedback(enc, &fb);
196 rvid_destroy_buffer(&fb);
197 }
198
199 enc->session(enc);
200
201 if (need_rate_control)
202 enc->rate_control(enc);
203 }
204
205 static void rvce_encode_bitstream(struct pipe_video_codec *encoder,
206 struct pipe_video_buffer *source,
207 struct pipe_resource *destination,
208 void **fb)
209 {
210 struct rvce_encoder *enc = (struct rvce_encoder*)encoder;
211 enc->get_buffer(destination, &enc->bs_handle, NULL);
212 enc->bs_size = destination->width0;
213
214 *fb = enc->fb = CALLOC_STRUCT(rvid_buffer);
215 if (!rvid_create_buffer(enc->ws, enc->fb, 512, RADEON_DOMAIN_GTT)) {
216 RVID_ERR("Can't create feedback buffer.\n");
217 return;
218 }
219 enc->encode(enc);
220 enc->feedback(enc);
221 }
222
223 static void rvce_end_frame(struct pipe_video_codec *encoder,
224 struct pipe_video_buffer *source,
225 struct pipe_picture_desc *picture)
226 {
227 struct rvce_encoder *enc = (struct rvce_encoder*)encoder;
228 struct rvce_cpb_slot *slot = LIST_ENTRY(
229 struct rvce_cpb_slot, enc->cpb_slots.prev, list);
230
231 flush(enc);
232
233 /* update the CPB backtrack with the just encoded frame */
234 LIST_DEL(&slot->list);
235 slot->picture_type = enc->pic.picture_type;
236 slot->frame_num = enc->pic.frame_num;
237 slot->pic_order_cnt = enc->pic.pic_order_cnt;
238 LIST_ADD(&slot->list, &enc->cpb_slots);
239 }
240
241 static void rvce_get_feedback(struct pipe_video_codec *encoder,
242 void *feedback, unsigned *size)
243 {
244 struct rvce_encoder *enc = (struct rvce_encoder*)encoder;
245 struct rvid_buffer *fb = feedback;
246
247 if (size) {
248 uint32_t *ptr = enc->ws->buffer_map(fb->cs_handle, enc->cs, PIPE_TRANSFER_READ_WRITE);
249
250 if (ptr[1]) {
251 *size = ptr[4] - ptr[9];
252 } else {
253 *size = 0;
254 }
255
256 enc->ws->buffer_unmap(fb->cs_handle);
257 }
258 //dump_feedback(enc, fb);
259 rvid_destroy_buffer(fb);
260 FREE(fb);
261 }
262
263 /**
264 * flush any outstanding command buffers to the hardware
265 */
266 static void rvce_flush(struct pipe_video_codec *encoder)
267 {
268 }
269
270 static void rvce_cs_flush(void *ctx, unsigned flags)
271 {
272 // just ignored
273 }
274
275 struct pipe_video_codec *rvce_create_encoder(struct pipe_context *context,
276 const struct pipe_video_codec *templ,
277 struct radeon_winsys* ws,
278 rvce_get_buffer get_buffer)
279 {
280 struct r600_common_screen *rscreen = (struct r600_common_screen *)context->screen;
281 struct rvce_encoder *enc;
282 struct pipe_video_buffer *tmp_buf, templat = {};
283 struct radeon_surface *tmp_surf;
284 unsigned cpb_size;
285
286 if (!rscreen->info.vce_fw_version) {
287 RVID_ERR("Kernel doesn't supports VCE!\n");
288 return NULL;
289
290 } else if (!rvce_is_fw_version_supported(rscreen)) {
291 RVID_ERR("Unsupported VCE fw version loaded!\n");
292 return NULL;
293 }
294
295 enc = CALLOC_STRUCT(rvce_encoder);
296 if (!enc)
297 return NULL;
298
299 enc->base = *templ;
300 enc->base.context = context;
301
302 enc->base.destroy = rvce_destroy;
303 enc->base.begin_frame = rvce_begin_frame;
304 enc->base.encode_bitstream = rvce_encode_bitstream;
305 enc->base.end_frame = rvce_end_frame;
306 enc->base.flush = rvce_flush;
307 enc->base.get_feedback = rvce_get_feedback;
308 enc->get_buffer = get_buffer;
309
310 enc->ws = ws;
311 enc->cs = ws->cs_create(ws, RING_VCE, rvce_cs_flush, enc, NULL);
312 if (!enc->cs) {
313 RVID_ERR("Can't get command submission context.\n");
314 goto error;
315 }
316
317 templat.buffer_format = PIPE_FORMAT_NV12;
318 templat.chroma_format = PIPE_VIDEO_CHROMA_FORMAT_420;
319 templat.width = enc->base.width;
320 templat.height = enc->base.height;
321 templat.interlaced = false;
322 if (!(tmp_buf = context->create_video_buffer(context, &templat))) {
323 RVID_ERR("Can't create video buffer.\n");
324 goto error;
325 }
326
327 get_buffer(((struct vl_video_buffer *)tmp_buf)->resources[0], NULL, &tmp_surf);
328 cpb_size = align(tmp_surf->level[0].pitch_bytes, 128);
329 cpb_size = cpb_size * align(tmp_surf->npix_y, 16);
330 cpb_size = cpb_size * 3 / 2;
331 cpb_size = cpb_size * RVCE_NUM_CPB_FRAMES;
332 tmp_buf->destroy(tmp_buf);
333 if (!rvid_create_buffer(enc->ws, &enc->cpb, cpb_size, RADEON_DOMAIN_VRAM)) {
334 RVID_ERR("Can't create CPB buffer.\n");
335 goto error;
336 }
337
338 enc->cpb_array = CALLOC(RVCE_NUM_CPB_FRAMES, sizeof(struct rvce_cpb_slot));
339 if (!enc->cpb_array)
340 goto error;
341
342 reset_cpb(enc);
343
344 radeon_vce_40_2_2_init(enc);
345
346 return &enc->base;
347
348 error:
349 if (enc->cs)
350 enc->ws->cs_destroy(enc->cs);
351
352 rvid_destroy_buffer(&enc->cpb);
353
354 FREE(enc->cpb_array);
355 FREE(enc);
356 return NULL;
357 }
358
359 /**
360 * check if kernel has the right fw version loaded
361 */
362 bool rvce_is_fw_version_supported(struct r600_common_screen *rscreen)
363 {
364 return rscreen->info.vce_fw_version == ((40 << 24) | (2 << 16) | (2 << 8));
365 }