1 /**************************************************************************
3 * Copyright 2013 Advanced Micro Devices, Inc.
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **************************************************************************/
30 #include "pipe/p_video_codec.h"
32 #include "util/u_video.h"
33 #include "util/u_memory.h"
35 #include "vl/vl_video_buffer.h"
37 #include "radeonsi/si_pipe.h"
38 #include "radeon_video.h"
39 #include "radeon_vce.h"
41 #define FW_40_2_2 ((40 << 24) | (2 << 16) | (2 << 8))
42 #define FW_50_0_1 ((50 << 24) | (0 << 16) | (1 << 8))
43 #define FW_50_1_2 ((50 << 24) | (1 << 16) | (2 << 8))
44 #define FW_50_10_2 ((50 << 24) | (10 << 16) | (2 << 8))
45 #define FW_50_17_3 ((50 << 24) | (17 << 16) | (3 << 8))
46 #define FW_52_0_3 ((52 << 24) | (0 << 16) | (3 << 8))
47 #define FW_52_4_3 ((52 << 24) | (4 << 16) | (3 << 8))
48 #define FW_52_8_3 ((52 << 24) | (8 << 16) | (3 << 8))
49 #define FW_53 (53 << 24)
52 * flush commands to the hardware
54 static void flush(struct rvce_encoder
*enc
)
56 enc
->ws
->cs_flush(enc
->cs
, PIPE_FLUSH_ASYNC
, NULL
);
57 enc
->task_info_idx
= 0;
62 static void dump_feedback(struct rvce_encoder
*enc
, struct rvid_buffer
*fb
)
64 uint32_t *ptr
= enc
->ws
->buffer_map(fb
->res
->buf
, enc
->cs
, PIPE_TRANSFER_READ_WRITE
);
66 fprintf(stderr
, "\n");
67 fprintf(stderr
, "encStatus:\t\t\t%08x\n", ptr
[i
++]);
68 fprintf(stderr
, "encHasBitstream:\t\t%08x\n", ptr
[i
++]);
69 fprintf(stderr
, "encHasAudioBitstream:\t\t%08x\n", ptr
[i
++]);
70 fprintf(stderr
, "encBitstreamOffset:\t\t%08x\n", ptr
[i
++]);
71 fprintf(stderr
, "encBitstreamSize:\t\t%08x\n", ptr
[i
++]);
72 fprintf(stderr
, "encAudioBitstreamOffset:\t%08x\n", ptr
[i
++]);
73 fprintf(stderr
, "encAudioBitstreamSize:\t\t%08x\n", ptr
[i
++]);
74 fprintf(stderr
, "encExtrabytes:\t\t\t%08x\n", ptr
[i
++]);
75 fprintf(stderr
, "encAudioExtrabytes:\t\t%08x\n", ptr
[i
++]);
76 fprintf(stderr
, "videoTimeStamp:\t\t\t%08x\n", ptr
[i
++]);
77 fprintf(stderr
, "audioTimeStamp:\t\t\t%08x\n", ptr
[i
++]);
78 fprintf(stderr
, "videoOutputType:\t\t%08x\n", ptr
[i
++]);
79 fprintf(stderr
, "attributeFlags:\t\t\t%08x\n", ptr
[i
++]);
80 fprintf(stderr
, "seiPrivatePackageOffset:\t%08x\n", ptr
[i
++]);
81 fprintf(stderr
, "seiPrivatePackageSize:\t\t%08x\n", ptr
[i
++]);
82 fprintf(stderr
, "\n");
83 enc
->ws
->buffer_unmap(fb
->res
->buf
);
88 * reset the CPB handling
90 static void reset_cpb(struct rvce_encoder
*enc
)
94 LIST_INITHEAD(&enc
->cpb_slots
);
95 for (i
= 0; i
< enc
->cpb_num
; ++i
) {
96 struct rvce_cpb_slot
*slot
= &enc
->cpb_array
[i
];
98 slot
->picture_type
= PIPE_H264_ENC_PICTURE_TYPE_SKIP
;
100 slot
->pic_order_cnt
= 0;
101 LIST_ADDTAIL(&slot
->list
, &enc
->cpb_slots
);
106 * sort l0 and l1 to the top of the list
108 static void sort_cpb(struct rvce_encoder
*enc
)
110 struct rvce_cpb_slot
*i
, *l0
= NULL
, *l1
= NULL
;
112 LIST_FOR_EACH_ENTRY(i
, &enc
->cpb_slots
, list
) {
113 if (i
->frame_num
== enc
->pic
.ref_idx_l0
)
116 if (i
->frame_num
== enc
->pic
.ref_idx_l1
)
119 if (enc
->pic
.picture_type
== PIPE_H264_ENC_PICTURE_TYPE_P
&& l0
)
122 if (enc
->pic
.picture_type
== PIPE_H264_ENC_PICTURE_TYPE_B
&&
129 LIST_ADD(&l1
->list
, &enc
->cpb_slots
);
134 LIST_ADD(&l0
->list
, &enc
->cpb_slots
);
139 * get number of cpbs based on dpb
141 static unsigned get_cpb_num(struct rvce_encoder
*enc
)
143 unsigned w
= align(enc
->base
.width
, 16) / 16;
144 unsigned h
= align(enc
->base
.height
, 16) / 16;
147 switch (enc
->base
.level
) {
189 return MIN2(dpb
/ (w
* h
), 16);
193 * Get the slot for the currently encoded frame
195 struct rvce_cpb_slot
*si_current_slot(struct rvce_encoder
*enc
)
197 return LIST_ENTRY(struct rvce_cpb_slot
, enc
->cpb_slots
.prev
, list
);
201 * Get the slot for L0
203 struct rvce_cpb_slot
*si_l0_slot(struct rvce_encoder
*enc
)
205 return LIST_ENTRY(struct rvce_cpb_slot
, enc
->cpb_slots
.next
, list
);
209 * Get the slot for L1
211 struct rvce_cpb_slot
*si_l1_slot(struct rvce_encoder
*enc
)
213 return LIST_ENTRY(struct rvce_cpb_slot
, enc
->cpb_slots
.next
->next
, list
);
217 * Calculate the offsets into the CPB
219 void si_vce_frame_offset(struct rvce_encoder
*enc
, struct rvce_cpb_slot
*slot
,
220 signed *luma_offset
, signed *chroma_offset
)
222 struct si_screen
*sscreen
= (struct si_screen
*)enc
->screen
;
223 unsigned pitch
, vpitch
, fsize
;
225 if (sscreen
->info
.chip_class
< GFX9
) {
226 pitch
= align(enc
->luma
->u
.legacy
.level
[0].nblk_x
* enc
->luma
->bpe
, 128);
227 vpitch
= align(enc
->luma
->u
.legacy
.level
[0].nblk_y
, 16);
229 pitch
= align(enc
->luma
->u
.gfx9
.surf_pitch
* enc
->luma
->bpe
, 256);
230 vpitch
= align(enc
->luma
->u
.gfx9
.surf_height
, 16);
232 fsize
= pitch
* (vpitch
+ vpitch
/ 2);
234 *luma_offset
= slot
->index
* fsize
;
235 *chroma_offset
= *luma_offset
+ pitch
* vpitch
;
239 * destroy this video encoder
241 static void rvce_destroy(struct pipe_video_codec
*encoder
)
243 struct rvce_encoder
*enc
= (struct rvce_encoder
*)encoder
;
244 if (enc
->stream_handle
) {
245 struct rvid_buffer fb
;
246 si_vid_create_buffer(enc
->screen
, &fb
, 512, PIPE_USAGE_STAGING
);
251 si_vid_destroy_buffer(&fb
);
253 si_vid_destroy_buffer(&enc
->cpb
);
254 enc
->ws
->cs_destroy(enc
->cs
);
255 FREE(enc
->cpb_array
);
259 static void rvce_begin_frame(struct pipe_video_codec
*encoder
,
260 struct pipe_video_buffer
*source
,
261 struct pipe_picture_desc
*picture
)
263 struct rvce_encoder
*enc
= (struct rvce_encoder
*)encoder
;
264 struct vl_video_buffer
*vid_buf
= (struct vl_video_buffer
*)source
;
265 struct pipe_h264_enc_picture_desc
*pic
= (struct pipe_h264_enc_picture_desc
*)picture
;
267 bool need_rate_control
=
268 enc
->pic
.rate_ctrl
.rate_ctrl_method
!= pic
->rate_ctrl
.rate_ctrl_method
||
269 enc
->pic
.quant_i_frames
!= pic
->quant_i_frames
||
270 enc
->pic
.quant_p_frames
!= pic
->quant_p_frames
||
271 enc
->pic
.quant_b_frames
!= pic
->quant_b_frames
;
274 si_get_pic_param(enc
, pic
);
276 enc
->get_buffer(vid_buf
->resources
[0], &enc
->handle
, &enc
->luma
);
277 enc
->get_buffer(vid_buf
->resources
[1], NULL
, &enc
->chroma
);
279 if (pic
->picture_type
== PIPE_H264_ENC_PICTURE_TYPE_IDR
)
281 else if (pic
->picture_type
== PIPE_H264_ENC_PICTURE_TYPE_P
||
282 pic
->picture_type
== PIPE_H264_ENC_PICTURE_TYPE_B
)
285 if (!enc
->stream_handle
) {
286 struct rvid_buffer fb
;
287 enc
->stream_handle
= si_vid_alloc_stream_handle();
288 si_vid_create_buffer(enc
->screen
, &fb
, 512, PIPE_USAGE_STAGING
);
295 //dump_feedback(enc, &fb);
296 si_vid_destroy_buffer(&fb
);
297 need_rate_control
= false;
300 if (need_rate_control
) {
307 static void rvce_encode_bitstream(struct pipe_video_codec
*encoder
,
308 struct pipe_video_buffer
*source
,
309 struct pipe_resource
*destination
,
312 struct rvce_encoder
*enc
= (struct rvce_encoder
*)encoder
;
313 enc
->get_buffer(destination
, &enc
->bs_handle
, NULL
);
314 enc
->bs_size
= destination
->width0
;
316 *fb
= enc
->fb
= CALLOC_STRUCT(rvid_buffer
);
317 if (!si_vid_create_buffer(enc
->screen
, enc
->fb
, 512, PIPE_USAGE_STAGING
)) {
318 RVID_ERR("Can't create feedback buffer.\n");
321 if (!radeon_emitted(enc
->cs
, 0))
327 static void rvce_end_frame(struct pipe_video_codec
*encoder
,
328 struct pipe_video_buffer
*source
,
329 struct pipe_picture_desc
*picture
)
331 struct rvce_encoder
*enc
= (struct rvce_encoder
*)encoder
;
332 struct rvce_cpb_slot
*slot
= LIST_ENTRY(
333 struct rvce_cpb_slot
, enc
->cpb_slots
.prev
, list
);
335 if (!enc
->dual_inst
|| enc
->bs_idx
> 1)
338 /* update the CPB backtrack with the just encoded frame */
339 slot
->picture_type
= enc
->pic
.picture_type
;
340 slot
->frame_num
= enc
->pic
.frame_num
;
341 slot
->pic_order_cnt
= enc
->pic
.pic_order_cnt
;
342 if (!enc
->pic
.not_referenced
) {
343 LIST_DEL(&slot
->list
);
344 LIST_ADD(&slot
->list
, &enc
->cpb_slots
);
348 static void rvce_get_feedback(struct pipe_video_codec
*encoder
,
349 void *feedback
, unsigned *size
)
351 struct rvce_encoder
*enc
= (struct rvce_encoder
*)encoder
;
352 struct rvid_buffer
*fb
= feedback
;
355 uint32_t *ptr
= enc
->ws
->buffer_map(fb
->res
->buf
, enc
->cs
, PIPE_TRANSFER_READ_WRITE
);
358 *size
= ptr
[4] - ptr
[9];
363 enc
->ws
->buffer_unmap(fb
->res
->buf
);
365 //dump_feedback(enc, fb);
366 si_vid_destroy_buffer(fb
);
371 * flush any outstanding command buffers to the hardware
373 static void rvce_flush(struct pipe_video_codec
*encoder
)
375 struct rvce_encoder
*enc
= (struct rvce_encoder
*)encoder
;
380 static void rvce_cs_flush(void *ctx
, unsigned flags
,
381 struct pipe_fence_handle
**fence
)
386 struct pipe_video_codec
*si_vce_create_encoder(struct pipe_context
*context
,
387 const struct pipe_video_codec
*templ
,
388 struct radeon_winsys
* ws
,
389 rvce_get_buffer get_buffer
)
391 struct si_screen
*sscreen
= (struct si_screen
*)context
->screen
;
392 struct si_context
*sctx
= (struct si_context
*)context
;
393 struct rvce_encoder
*enc
;
394 struct pipe_video_buffer
*tmp_buf
, templat
= {};
395 struct radeon_surf
*tmp_surf
;
398 if (!sscreen
->info
.vce_fw_version
) {
399 RVID_ERR("Kernel doesn't supports VCE!\n");
402 } else if (!si_vce_is_fw_version_supported(sscreen
)) {
403 RVID_ERR("Unsupported VCE fw version loaded!\n");
407 enc
= CALLOC_STRUCT(rvce_encoder
);
411 if (sscreen
->info
.drm_major
== 3)
413 if ((sscreen
->info
.drm_major
== 2 && sscreen
->info
.drm_minor
>= 42) ||
414 sscreen
->info
.drm_major
== 3)
416 if (sscreen
->info
.family
>= CHIP_TONGA
&&
417 sscreen
->info
.family
!= CHIP_STONEY
&&
418 sscreen
->info
.family
!= CHIP_POLARIS11
&&
419 sscreen
->info
.family
!= CHIP_POLARIS12
)
420 enc
->dual_pipe
= true;
421 /* TODO enable B frame with dual instance */
422 if ((sscreen
->info
.family
>= CHIP_TONGA
) &&
423 (templ
->max_references
== 1) &&
424 (sscreen
->info
.vce_harvest_config
== 0))
425 enc
->dual_inst
= true;
428 enc
->base
.context
= context
;
430 enc
->base
.destroy
= rvce_destroy
;
431 enc
->base
.begin_frame
= rvce_begin_frame
;
432 enc
->base
.encode_bitstream
= rvce_encode_bitstream
;
433 enc
->base
.end_frame
= rvce_end_frame
;
434 enc
->base
.flush
= rvce_flush
;
435 enc
->base
.get_feedback
= rvce_get_feedback
;
436 enc
->get_buffer
= get_buffer
;
438 enc
->screen
= context
->screen
;
440 enc
->cs
= ws
->cs_create(sctx
->b
.ctx
, RING_VCE
, rvce_cs_flush
, enc
);
442 RVID_ERR("Can't get command submission context.\n");
446 templat
.buffer_format
= PIPE_FORMAT_NV12
;
447 templat
.chroma_format
= PIPE_VIDEO_CHROMA_FORMAT_420
;
448 templat
.width
= enc
->base
.width
;
449 templat
.height
= enc
->base
.height
;
450 templat
.interlaced
= false;
451 if (!(tmp_buf
= context
->create_video_buffer(context
, &templat
))) {
452 RVID_ERR("Can't create video buffer.\n");
456 enc
->cpb_num
= get_cpb_num(enc
);
460 get_buffer(((struct vl_video_buffer
*)tmp_buf
)->resources
[0], NULL
, &tmp_surf
);
462 cpb_size
= (sscreen
->info
.chip_class
< GFX9
) ?
463 align(tmp_surf
->u
.legacy
.level
[0].nblk_x
* tmp_surf
->bpe
, 128) *
464 align(tmp_surf
->u
.legacy
.level
[0].nblk_y
, 32) :
466 align(tmp_surf
->u
.gfx9
.surf_pitch
* tmp_surf
->bpe
, 256) *
467 align(tmp_surf
->u
.gfx9
.surf_height
, 32);
469 cpb_size
= cpb_size
* 3 / 2;
470 cpb_size
= cpb_size
* enc
->cpb_num
;
472 cpb_size
+= RVCE_MAX_AUX_BUFFER_NUM
*
473 RVCE_MAX_BITSTREAM_OUTPUT_ROW_SIZE
* 2;
474 tmp_buf
->destroy(tmp_buf
);
475 if (!si_vid_create_buffer(enc
->screen
, &enc
->cpb
, cpb_size
, PIPE_USAGE_DEFAULT
)) {
476 RVID_ERR("Can't create CPB buffer.\n");
480 enc
->cpb_array
= CALLOC(enc
->cpb_num
, sizeof(struct rvce_cpb_slot
));
486 switch (sscreen
->info
.vce_fw_version
) {
488 si_vce_40_2_2_init(enc
);
489 si_get_pic_param
= si_vce_40_2_2_get_param
;
497 si_get_pic_param
= si_vce_50_get_param
;
504 si_get_pic_param
= si_vce_52_get_param
;
508 if ((sscreen
->info
.vce_fw_version
& (0xff << 24)) == FW_53
) {
510 si_get_pic_param
= si_vce_52_get_param
;
519 enc
->ws
->cs_destroy(enc
->cs
);
521 si_vid_destroy_buffer(&enc
->cpb
);
523 FREE(enc
->cpb_array
);
529 * check if kernel has the right fw version loaded
531 bool si_vce_is_fw_version_supported(struct si_screen
*sscreen
)
533 switch (sscreen
->info
.vce_fw_version
) {
544 if ((sscreen
->info
.vce_fw_version
& (0xff << 24)) == FW_53
)
552 * Add the buffer as relocation to the current command submission
554 void si_vce_add_buffer(struct rvce_encoder
*enc
, struct pb_buffer
*buf
,
555 enum radeon_bo_usage usage
, enum radeon_bo_domain domain
,
560 reloc_idx
= enc
->ws
->cs_add_buffer(enc
->cs
, buf
, usage
| RADEON_USAGE_SYNCHRONIZED
,
561 domain
, RADEON_PRIO_VCE
);
564 addr
= enc
->ws
->buffer_get_virtual_address(buf
);
565 addr
= addr
+ offset
;
569 offset
+= enc
->ws
->buffer_get_reloc_offset(buf
);
570 RVCE_CS(reloc_idx
* 4);