src/gallium/drivers/radeon/radeon_vce.c

   1 /**************************************************************************
   2  *
   3  * Copyright 2013 Advanced Micro Devices, Inc.
   4  * All Rights Reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sub license, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * The above copyright notice and this permission notice (including the
  15  * next paragraph) shall be included in all copies or substantial portions
  16  * of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  19  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  21  * IN NO EVENT SHALL THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR
  22  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  23  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  24  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25  *
  26  **************************************************************************/
  27
  28 /*
  29  * Authors:
  30  *      Christian König <christian.koenig@amd.com>
  31  *
  32  */
  33
  34 #include <stdio.h>
  35
  36 #include "pipe/p_video_codec.h"
  37
  38 #include "util/u_video.h"
  39 #include "util/u_memory.h"
  40
  41 #include "vl/vl_video_buffer.h"
  42
  43 #include "r600_pipe_common.h"
  44 #include "radeon_video.h"
  45 #include "radeon_vce.h"
  46
  47 #define FW_40_2_2 ((40 << 24) | (2 << 16) | (2 << 8))
  48 #define FW_50_0_1 ((50 << 24) | (0 << 16) | (1 << 8))
  49 #define FW_50_1_2 ((50 << 24) | (1 << 16) | (2 << 8))
  50 #define FW_50_10_2 ((50 << 24) | (10 << 16) | (2 << 8))
  51 #define FW_50_17_3 ((50 << 24) | (17 << 16) | (3 << 8))
  52
  53 /**
  54  * flush commands to the hardware
  55  */
  56 static void flush(struct rvce_encoder *enc)
  57 {
  58         enc->ws->cs_flush(enc->cs, RADEON_FLUSH_ASYNC, NULL, 0);
  59         enc->task_info_idx = 0;
  60 }
  61
  62 #if 0
  63 static void dump_feedback(struct rvce_encoder *enc, struct rvid_buffer *fb)
  64 {
  65         uint32_t *ptr = enc->ws->buffer_map(fb->res->cs_buf, enc->cs, PIPE_TRANSFER_READ_WRITE);
  66         unsigned i = 0;
  67         fprintf(stderr, "\n");
  68         fprintf(stderr, "encStatus:\t\t\t%08x\n", ptr[i++]);
  69         fprintf(stderr, "encHasBitstream:\t\t%08x\n", ptr[i++]);
  70         fprintf(stderr, "encHasAudioBitstream:\t\t%08x\n", ptr[i++]);
  71         fprintf(stderr, "encBitstreamOffset:\t\t%08x\n", ptr[i++]);
  72         fprintf(stderr, "encBitstreamSize:\t\t%08x\n", ptr[i++]);
  73         fprintf(stderr, "encAudioBitstreamOffset:\t%08x\n", ptr[i++]);
  74         fprintf(stderr, "encAudioBitstreamSize:\t\t%08x\n", ptr[i++]);
  75         fprintf(stderr, "encExtrabytes:\t\t\t%08x\n", ptr[i++]);
  76         fprintf(stderr, "encAudioExtrabytes:\t\t%08x\n", ptr[i++]);
  77         fprintf(stderr, "videoTimeStamp:\t\t\t%08x\n", ptr[i++]);
  78         fprintf(stderr, "audioTimeStamp:\t\t\t%08x\n", ptr[i++]);
  79         fprintf(stderr, "videoOutputType:\t\t%08x\n", ptr[i++]);
  80         fprintf(stderr, "attributeFlags:\t\t\t%08x\n", ptr[i++]);
  81         fprintf(stderr, "seiPrivatePackageOffset:\t%08x\n", ptr[i++]);
  82         fprintf(stderr, "seiPrivatePackageSize:\t\t%08x\n", ptr[i++]);
  83         fprintf(stderr, "\n");
  84         enc->ws->buffer_unmap(fb->res->cs_buf);
  85 }
  86 #endif
  87
  88 /**
  89  * reset the CPB handling
  90  */
  91 static void reset_cpb(struct rvce_encoder *enc)
  92 {
  93         unsigned i;
  94
  95         LIST_INITHEAD(&enc->cpb_slots);
  96         for (i = 0; i < enc->cpb_num; ++i) {
  97                 struct rvce_cpb_slot *slot = &enc->cpb_array[i];
  98                 slot->index = i;
  99                 slot->picture_type = PIPE_H264_ENC_PICTURE_TYPE_SKIP;
 100                 slot->frame_num = 0;
 101                 slot->pic_order_cnt = 0;
 102                 LIST_ADDTAIL(&slot->list, &enc->cpb_slots);
 103         }
 104 }
 105
 106 /**
 107  * sort l0 and l1 to the top of the list
 108  */
 109 static void sort_cpb(struct rvce_encoder *enc)
 110 {
 111         struct rvce_cpb_slot *i, *l0 = NULL, *l1 = NULL;
 112
 113         LIST_FOR_EACH_ENTRY(i, &enc->cpb_slots, list) {
 114                 if (i->frame_num == enc->pic.ref_idx_l0)
 115                         l0 = i;
 116
 117                 if (i->frame_num == enc->pic.ref_idx_l1)
 118                         l1 = i;
 119
 120                 if (enc->pic.picture_type == PIPE_H264_ENC_PICTURE_TYPE_P && l0)
 121                         break;
 122
 123                 if (enc->pic.picture_type == PIPE_H264_ENC_PICTURE_TYPE_B &&
 124                     l0 && l1)
 125                         break;
 126         }
 127
 128         if (l1) {
 129                 LIST_DEL(&l1->list);
 130                 LIST_ADD(&l1->list, &enc->cpb_slots);
 131         }
 132
 133         if (l0) {
 134                 LIST_DEL(&l0->list);
 135                 LIST_ADD(&l0->list, &enc->cpb_slots);
 136         }
 137 }
 138
 139 /**
 140  * get number of cpbs based on dpb
 141  */
 142 static unsigned get_cpb_num(struct rvce_encoder *enc)
 143 {
 144         unsigned w = align(enc->base.width, 16) / 16;
 145         unsigned h = align(enc->base.height, 16) / 16;
 146         unsigned dpb;
 147
 148         switch (enc->base.level) {
 149         case 10:
 150                 dpb = 396;
 151                 break;
 152         case 11:
 153                 dpb = 900;
 154                 break;
 155         case 12:
 156         case 13:
 157         case 20:
 158                 dpb = 2376;
 159                 break;
 160         case 21:
 161                 dpb = 4752;
 162                 break;
 163         case 22:
 164         case 30:
 165                 dpb = 8100;
 166                 break;
 167         case 31:
 168                 dpb = 18000;
 169                 break;
 170         case 32:
 171                 dpb = 20480;
 172                 break;
 173         case 40:
 174         case 41:
 175                 dpb = 32768;
 176                 break;
 177         default:
 178         case 42:
 179                 dpb = 34816;
 180                 break;
 181         case 50:
 182                 dpb = 110400;
 183                 break;
 184         case 51:
 185                 dpb = 184320;
 186                 break;
 187         }
 188
 189         return MIN2(dpb / (w * h), 16);
 190 }
 191
 192 /**
 193  * Get the slot for the currently encoded frame
 194  */
 195 struct rvce_cpb_slot *current_slot(struct rvce_encoder *enc)
 196 {
 197         return LIST_ENTRY(struct rvce_cpb_slot, enc->cpb_slots.prev, list);
 198 }
 199
 200 /**
 201  * Get the slot for L0
 202  */
 203 struct rvce_cpb_slot *l0_slot(struct rvce_encoder *enc)
 204 {
 205         return LIST_ENTRY(struct rvce_cpb_slot, enc->cpb_slots.next, list);
 206 }
 207
 208 /**
 209  * Get the slot for L1
 210  */
 211 struct rvce_cpb_slot *l1_slot(struct rvce_encoder *enc)
 212 {
 213         return LIST_ENTRY(struct rvce_cpb_slot, enc->cpb_slots.next->next, list);
 214 }
 215
 216 /**
 217  * Calculate the offsets into the CPB
 218  */
 219 void rvce_frame_offset(struct rvce_encoder *enc, struct rvce_cpb_slot *slot,
 220                        signed *luma_offset, signed *chroma_offset)
 221 {
 222         unsigned pitch = align(enc->luma->level[0].pitch_bytes, 128);
 223         unsigned vpitch = align(enc->luma->npix_y, 16);
 224         unsigned fsize = pitch * (vpitch + vpitch / 2);
 225
 226         *luma_offset = slot->index * fsize;
 227         *chroma_offset = *luma_offset + pitch * vpitch;
 228 }
 229
 230 /**
 231  * destroy this video encoder
 232  */
 233 static void rvce_destroy(struct pipe_video_codec *encoder)
 234 {
 235         struct rvce_encoder *enc = (struct rvce_encoder*)encoder;
 236         if (enc->stream_handle) {
 237                 struct rvid_buffer fb;
 238                 rvid_create_buffer(enc->screen, &fb, 512, PIPE_USAGE_STAGING);
 239                 enc->fb = &fb;
 240                 enc->session(enc);
 241                 enc->feedback(enc);
 242                 enc->destroy(enc);
 243                 flush(enc);
 244                 rvid_destroy_buffer(&fb);
 245         }
 246         rvid_destroy_buffer(&enc->cpb);
 247         enc->ws->cs_destroy(enc->cs);
 248         FREE(enc->cpb_array);
 249         FREE(enc);
 250 }
 251
 252 static void rvce_begin_frame(struct pipe_video_codec *encoder,
 253                              struct pipe_video_buffer *source,
 254                              struct pipe_picture_desc *picture)
 255 {
 256         struct rvce_encoder *enc = (struct rvce_encoder*)encoder;
 257         struct vl_video_buffer *vid_buf = (struct vl_video_buffer *)source;
 258         struct pipe_h264_enc_picture_desc *pic = (struct pipe_h264_enc_picture_desc *)picture;
 259
 260         bool need_rate_control =
 261                 enc->pic.rate_ctrl.rate_ctrl_method != pic->rate_ctrl.rate_ctrl_method ||
 262                 enc->pic.quant_i_frames != pic->quant_i_frames ||
 263                 enc->pic.quant_p_frames != pic->quant_p_frames ||
 264                 enc->pic.quant_b_frames != pic->quant_b_frames;
 265
 266         enc->pic = *pic;
 267
 268         enc->get_buffer(vid_buf->resources[0], &enc->handle, &enc->luma);
 269         enc->get_buffer(vid_buf->resources[1], NULL, &enc->chroma);
 270
 271         if (pic->picture_type == PIPE_H264_ENC_PICTURE_TYPE_IDR)
 272                 reset_cpb(enc);
 273         else if (pic->picture_type == PIPE_H264_ENC_PICTURE_TYPE_P ||
 274                  pic->picture_type == PIPE_H264_ENC_PICTURE_TYPE_B)
 275                 sort_cpb(enc);
 276
 277         if (!enc->stream_handle) {
 278                 struct rvid_buffer fb;
 279                 enc->stream_handle = rvid_alloc_stream_handle();
 280                 rvid_create_buffer(enc->screen, &fb, 512, PIPE_USAGE_STAGING);
 281                 enc->fb = &fb;
 282                 enc->session(enc);
 283                 enc->create(enc);
 284                 enc->config(enc);
 285                 enc->feedback(enc);
 286                 flush(enc);
 287                 //dump_feedback(enc, &fb);
 288                 rvid_destroy_buffer(&fb);
 289                 need_rate_control = false;
 290         }
 291
 292         if (need_rate_control) {
 293                 enc->session(enc);
 294                 enc->config(enc);
 295                 flush(enc);
 296         }
 297 }
 298
 299 static void rvce_encode_bitstream(struct pipe_video_codec *encoder,
 300                                   struct pipe_video_buffer *source,
 301                                   struct pipe_resource *destination,
 302                                   void **fb)
 303 {
 304         struct rvce_encoder *enc = (struct rvce_encoder*)encoder;
 305         enc->get_buffer(destination, &enc->bs_handle, NULL);
 306         enc->bs_size = destination->width0;
 307
 308         *fb = enc->fb = CALLOC_STRUCT(rvid_buffer);
 309         if (!rvid_create_buffer(enc->screen, enc->fb, 512, PIPE_USAGE_STAGING)) {
 310                 RVID_ERR("Can't create feedback buffer.\n");
 311                 return;
 312         }
 313         enc->session(enc);
 314         enc->encode(enc);
 315         enc->feedback(enc);
 316 }
 317
 318 static void rvce_end_frame(struct pipe_video_codec *encoder,
 319                            struct pipe_video_buffer *source,
 320                            struct pipe_picture_desc *picture)
 321 {
 322         struct rvce_encoder *enc = (struct rvce_encoder*)encoder;
 323         struct rvce_cpb_slot *slot = LIST_ENTRY(
 324                 struct rvce_cpb_slot, enc->cpb_slots.prev, list);
 325
 326         flush(enc);
 327
 328         /* update the CPB backtrack with the just encoded frame */
 329         slot->picture_type = enc->pic.picture_type;
 330         slot->frame_num = enc->pic.frame_num;
 331         slot->pic_order_cnt = enc->pic.pic_order_cnt;
 332         if (!enc->pic.not_referenced) {
 333                 LIST_DEL(&slot->list);
 334                 LIST_ADD(&slot->list, &enc->cpb_slots);
 335         }
 336 }
 337
 338 static void rvce_get_feedback(struct pipe_video_codec *encoder,
 339                               void *feedback, unsigned *size)
 340 {
 341         struct rvce_encoder *enc = (struct rvce_encoder*)encoder;
 342         struct rvid_buffer *fb = feedback;
 343
 344         if (size) {
 345                 uint32_t *ptr = enc->ws->buffer_map(fb->res->cs_buf, enc->cs, PIPE_TRANSFER_READ_WRITE);
 346
 347                 if (ptr[1]) {
 348                         *size = ptr[4] - ptr[9];
 349                 } else {
 350                         *size = 0;
 351                 }
 352
 353                 enc->ws->buffer_unmap(fb->res->cs_buf);
 354         }
 355         //dump_feedback(enc, fb);
 356         rvid_destroy_buffer(fb);
 357         FREE(fb);
 358 }
 359
 360 /**
 361  * flush any outstanding command buffers to the hardware
 362  */
 363 static void rvce_flush(struct pipe_video_codec *encoder)
 364 {
 365 }
 366
 367 static void rvce_cs_flush(void *ctx, unsigned flags,
 368                           struct pipe_fence_handle **fence)
 369 {
 370         // just ignored
 371 }
 372
 373 struct pipe_video_codec *rvce_create_encoder(struct pipe_context *context,
 374                                              const struct pipe_video_codec *templ,
 375                                              struct radeon_winsys* ws,
 376                                              rvce_get_buffer get_buffer)
 377 {
 378         struct r600_common_screen *rscreen = (struct r600_common_screen *)context->screen;
 379         struct r600_common_context *rctx = (struct r600_common_context*)context;
 380         struct rvce_encoder *enc;
 381         struct pipe_video_buffer *tmp_buf, templat = {};
 382         struct radeon_surf *tmp_surf;
 383         unsigned cpb_size;
 384
 385         if (!rscreen->info.vce_fw_version) {
 386                 RVID_ERR("Kernel doesn't supports VCE!\n");
 387                 return NULL;
 388
 389         } else if (!rvce_is_fw_version_supported(rscreen)) {
 390                 RVID_ERR("Unsupported VCE fw version loaded!\n");
 391                 return NULL;
 392         }
 393
 394         enc = CALLOC_STRUCT(rvce_encoder);
 395         if (!enc)
 396                 return NULL;
 397
 398         if (rscreen->info.drm_major == 3)
 399                 enc->use_vm = true;
 400         if ((rscreen->info.drm_major > 2) || (rscreen->info.drm_minor >= 42))
 401                 enc->use_vui = true;
 402         if (rscreen->info.family >= CHIP_TONGA)
 403                 enc->dual_pipe = true;
 404
 405         enc->base = *templ;
 406         enc->base.context = context;
 407
 408         enc->base.destroy = rvce_destroy;
 409         enc->base.begin_frame = rvce_begin_frame;
 410         enc->base.encode_bitstream = rvce_encode_bitstream;
 411         enc->base.end_frame = rvce_end_frame;
 412         enc->base.flush = rvce_flush;
 413         enc->base.get_feedback = rvce_get_feedback;
 414         enc->get_buffer = get_buffer;
 415
 416         enc->screen = context->screen;
 417         enc->ws = ws;
 418         enc->cs = ws->cs_create(rctx->ctx, RING_VCE, rvce_cs_flush, enc, NULL);
 419         if (!enc->cs) {
 420                 RVID_ERR("Can't get command submission context.\n");
 421                 goto error;
 422         }
 423
 424         templat.buffer_format = PIPE_FORMAT_NV12;
 425         templat.chroma_format = PIPE_VIDEO_CHROMA_FORMAT_420;
 426         templat.width = enc->base.width;
 427         templat.height = enc->base.height;
 428         templat.interlaced = false;
 429         if (!(tmp_buf = context->create_video_buffer(context, &templat))) {
 430                 RVID_ERR("Can't create video buffer.\n");
 431                 goto error;
 432         }
 433
 434         enc->cpb_num = get_cpb_num(enc);
 435         if (!enc->cpb_num)
 436                 goto error;
 437
 438         get_buffer(((struct vl_video_buffer *)tmp_buf)->resources[0], NULL, &tmp_surf);
 439         cpb_size = align(tmp_surf->level[0].pitch_bytes, 128);
 440         cpb_size = cpb_size * align(tmp_surf->npix_y, 16);
 441         cpb_size = cpb_size * 3 / 2;
 442         cpb_size = cpb_size * enc->cpb_num;
 443         if (enc->dual_pipe)
 444                 cpb_size +=  RVCE_MAX_AUX_BUFFER_NUM *
 445                         RVCE_MAX_BITSTREAM_OUTPUT_ROW_SIZE * 2;
 446         tmp_buf->destroy(tmp_buf);
 447         if (!rvid_create_buffer(enc->screen, &enc->cpb, cpb_size, PIPE_USAGE_DEFAULT)) {
 448                 RVID_ERR("Can't create CPB buffer.\n");
 449                 goto error;
 450         }
 451
 452         enc->cpb_array = CALLOC(enc->cpb_num, sizeof(struct rvce_cpb_slot));
 453         if (!enc->cpb_array)
 454                 goto error;
 455
 456         reset_cpb(enc);
 457
 458         switch (rscreen->info.vce_fw_version) {
 459         case FW_40_2_2:
 460                 radeon_vce_40_2_2_init(enc);
 461                 break;
 462
 463         case FW_50_0_1:
 464         case FW_50_1_2:
 465         case FW_50_10_2:
 466         case FW_50_17_3:
 467                 radeon_vce_50_init(enc);
 468                 break;
 469
 470         default:
 471                 goto error;
 472         }
 473
 474         return &enc->base;
 475
 476 error:
 477         if (enc->cs)
 478                 enc->ws->cs_destroy(enc->cs);
 479
 480         rvid_destroy_buffer(&enc->cpb);
 481
 482         FREE(enc->cpb_array);
 483         FREE(enc);
 484         return NULL;
 485 }
 486
 487 /**
 488  * check if kernel has the right fw version loaded
 489  */
 490 bool rvce_is_fw_version_supported(struct r600_common_screen *rscreen)
 491 {
 492         return rscreen->info.vce_fw_version == FW_40_2_2 ||
 493                 rscreen->info.vce_fw_version == FW_50_0_1 ||
 494                 rscreen->info.vce_fw_version == FW_50_1_2 ||
 495                 rscreen->info.vce_fw_version == FW_50_10_2 ||
 496                 rscreen->info.vce_fw_version == FW_50_17_3;
 497 }
 498
 499 /**
 500  * Add the buffer as relocation to the current command submission
 501  */
 502 void rvce_add_buffer(struct rvce_encoder *enc, struct radeon_winsys_cs_handle *buf,
 503                      enum radeon_bo_usage usage, enum radeon_bo_domain domain,
 504                      signed offset)
 505 {
 506         int reloc_idx;
 507
 508         reloc_idx = enc->ws->cs_add_reloc(enc->cs, buf, usage, domain, RADEON_PRIO_MIN);
 509         if (enc->use_vm) {
 510                 uint64_t addr;
 511                 addr = enc->ws->buffer_get_virtual_address(buf);
 512                 addr = addr + offset;
 513                 RVCE_CS(addr >> 32);
 514                 RVCE_CS(addr);
 515         } else {
 516                 RVCE_CS(reloc_idx * 4);
 517                 RVCE_CS(offset);
 518         }
 519 }