src/gallium/drivers/radeon/radeon_vce.c

   1 /**************************************************************************
   2  *
   3  * Copyright 2013 Advanced Micro Devices, Inc.
   4  * All Rights Reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sub license, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * The above copyright notice and this permission notice (including the
  15  * next paragraph) shall be included in all copies or substantial portions
  16  * of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  19  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  21  * IN NO EVENT SHALL THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR
  22  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  23  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  24  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25  *
  26  **************************************************************************/
  27
  28 /*
  29  * Authors:
  30  *      Christian König <christian.koenig@amd.com>
  31  *
  32  */
  33
  34 #include <stdio.h>
  35
  36 #include "pipe/p_video_codec.h"
  37
  38 #include "util/u_video.h"
  39 #include "util/u_memory.h"
  40
  41 #include "vl/vl_video_buffer.h"
  42
  43 #include "r600_pipe_common.h"
  44 #include "radeon_video.h"
  45 #include "radeon_vce.h"
  46
  47 #define FW_40_2_2 ((40 << 24) | (2 << 16) | (2 << 8))
  48 #define FW_50_0_1 ((50 << 24) | (0 << 16) | (1 << 8))
  49 #define FW_50_1_2 ((50 << 24) | (1 << 16) | (2 << 8))
  50 #define FW_50_10_2 ((50 << 24) | (10 << 16) | (2 << 8))
  51 #define FW_50_17_3 ((50 << 24) | (17 << 16) | (3 << 8))
  52 #define FW_52_0_3 ((52 << 24) | (0 << 16) | (3 << 8))
  53 #define FW_52_4_3 ((52 << 24) | (4 << 16) | (3 << 8))
  54 #define FW_52_8_3 ((52 << 24) | (8 << 16) | (3 << 8))
  55
  56 /**
  57  * flush commands to the hardware
  58  */
  59 static void flush(struct rvce_encoder *enc)
  60 {
  61         enc->ws->cs_flush(enc->cs, RADEON_FLUSH_ASYNC, NULL);
  62         enc->task_info_idx = 0;
  63         enc->bs_idx = 0;
  64 }
  65
  66 #if 0
  67 static void dump_feedback(struct rvce_encoder *enc, struct rvid_buffer *fb)
  68 {
  69         uint32_t *ptr = enc->ws->buffer_map(fb->res->buf, enc->cs, PIPE_TRANSFER_READ_WRITE);
  70         unsigned i = 0;
  71         fprintf(stderr, "\n");
  72         fprintf(stderr, "encStatus:\t\t\t%08x\n", ptr[i++]);
  73         fprintf(stderr, "encHasBitstream:\t\t%08x\n", ptr[i++]);
  74         fprintf(stderr, "encHasAudioBitstream:\t\t%08x\n", ptr[i++]);
  75         fprintf(stderr, "encBitstreamOffset:\t\t%08x\n", ptr[i++]);
  76         fprintf(stderr, "encBitstreamSize:\t\t%08x\n", ptr[i++]);
  77         fprintf(stderr, "encAudioBitstreamOffset:\t%08x\n", ptr[i++]);
  78         fprintf(stderr, "encAudioBitstreamSize:\t\t%08x\n", ptr[i++]);
  79         fprintf(stderr, "encExtrabytes:\t\t\t%08x\n", ptr[i++]);
  80         fprintf(stderr, "encAudioExtrabytes:\t\t%08x\n", ptr[i++]);
  81         fprintf(stderr, "videoTimeStamp:\t\t\t%08x\n", ptr[i++]);
  82         fprintf(stderr, "audioTimeStamp:\t\t\t%08x\n", ptr[i++]);
  83         fprintf(stderr, "videoOutputType:\t\t%08x\n", ptr[i++]);
  84         fprintf(stderr, "attributeFlags:\t\t\t%08x\n", ptr[i++]);
  85         fprintf(stderr, "seiPrivatePackageOffset:\t%08x\n", ptr[i++]);
  86         fprintf(stderr, "seiPrivatePackageSize:\t\t%08x\n", ptr[i++]);
  87         fprintf(stderr, "\n");
  88         enc->ws->buffer_unmap(fb->res->buf);
  89 }
  90 #endif
  91
  92 /**
  93  * reset the CPB handling
  94  */
  95 static void reset_cpb(struct rvce_encoder *enc)
  96 {
  97         unsigned i;
  98
  99         LIST_INITHEAD(&enc->cpb_slots);
 100         for (i = 0; i < enc->cpb_num; ++i) {
 101                 struct rvce_cpb_slot *slot = &enc->cpb_array[i];
 102                 slot->index = i;
 103                 slot->picture_type = PIPE_H264_ENC_PICTURE_TYPE_SKIP;
 104                 slot->frame_num = 0;
 105                 slot->pic_order_cnt = 0;
 106                 LIST_ADDTAIL(&slot->list, &enc->cpb_slots);
 107         }
 108 }
 109
 110 /**
 111  * sort l0 and l1 to the top of the list
 112  */
 113 static void sort_cpb(struct rvce_encoder *enc)
 114 {
 115         struct rvce_cpb_slot *i, *l0 = NULL, *l1 = NULL;
 116
 117         LIST_FOR_EACH_ENTRY(i, &enc->cpb_slots, list) {
 118                 if (i->frame_num == enc->pic.ref_idx_l0)
 119                         l0 = i;
 120
 121                 if (i->frame_num == enc->pic.ref_idx_l1)
 122                         l1 = i;
 123
 124                 if (enc->pic.picture_type == PIPE_H264_ENC_PICTURE_TYPE_P && l0)
 125                         break;
 126
 127                 if (enc->pic.picture_type == PIPE_H264_ENC_PICTURE_TYPE_B &&
 128                     l0 && l1)
 129                         break;
 130         }
 131
 132         if (l1) {
 133                 LIST_DEL(&l1->list);
 134                 LIST_ADD(&l1->list, &enc->cpb_slots);
 135         }
 136
 137         if (l0) {
 138                 LIST_DEL(&l0->list);
 139                 LIST_ADD(&l0->list, &enc->cpb_slots);
 140         }
 141 }
 142
 143 /**
 144  * get number of cpbs based on dpb
 145  */
 146 static unsigned get_cpb_num(struct rvce_encoder *enc)
 147 {
 148         unsigned w = align(enc->base.width, 16) / 16;
 149         unsigned h = align(enc->base.height, 16) / 16;
 150         unsigned dpb;
 151
 152         switch (enc->base.level) {
 153         case 10:
 154                 dpb = 396;
 155                 break;
 156         case 11:
 157                 dpb = 900;
 158                 break;
 159         case 12:
 160         case 13:
 161         case 20:
 162                 dpb = 2376;
 163                 break;
 164         case 21:
 165                 dpb = 4752;
 166                 break;
 167         case 22:
 168         case 30:
 169                 dpb = 8100;
 170                 break;
 171         case 31:
 172                 dpb = 18000;
 173                 break;
 174         case 32:
 175                 dpb = 20480;
 176                 break;
 177         case 40:
 178         case 41:
 179                 dpb = 32768;
 180                 break;
 181         default:
 182         case 42:
 183                 dpb = 34816;
 184                 break;
 185         case 50:
 186                 dpb = 110400;
 187                 break;
 188         case 51:
 189                 dpb = 184320;
 190                 break;
 191         }
 192
 193         return MIN2(dpb / (w * h), 16);
 194 }
 195
 196 /**
 197  * Get the slot for the currently encoded frame
 198  */
 199 struct rvce_cpb_slot *current_slot(struct rvce_encoder *enc)
 200 {
 201         return LIST_ENTRY(struct rvce_cpb_slot, enc->cpb_slots.prev, list);
 202 }
 203
 204 /**
 205  * Get the slot for L0
 206  */
 207 struct rvce_cpb_slot *l0_slot(struct rvce_encoder *enc)
 208 {
 209         return LIST_ENTRY(struct rvce_cpb_slot, enc->cpb_slots.next, list);
 210 }
 211
 212 /**
 213  * Get the slot for L1
 214  */
 215 struct rvce_cpb_slot *l1_slot(struct rvce_encoder *enc)
 216 {
 217         return LIST_ENTRY(struct rvce_cpb_slot, enc->cpb_slots.next->next, list);
 218 }
 219
 220 /**
 221  * Calculate the offsets into the CPB
 222  */
 223 void rvce_frame_offset(struct rvce_encoder *enc, struct rvce_cpb_slot *slot,
 224                        signed *luma_offset, signed *chroma_offset)
 225 {
 226         unsigned pitch = align(enc->luma->level[0].nblk_x * enc->luma->bpe, 128);
 227         unsigned vpitch = align(enc->luma->level[0].nblk_y, 16);
 228         unsigned fsize = pitch * (vpitch + vpitch / 2);
 229
 230         *luma_offset = slot->index * fsize;
 231         *chroma_offset = *luma_offset + pitch * vpitch;
 232 }
 233
 234 /**
 235  * destroy this video encoder
 236  */
 237 static void rvce_destroy(struct pipe_video_codec *encoder)
 238 {
 239         struct rvce_encoder *enc = (struct rvce_encoder*)encoder;
 240         if (enc->stream_handle) {
 241                 struct rvid_buffer fb;
 242                 rvid_create_buffer(enc->screen, &fb, 512, PIPE_USAGE_STAGING);
 243                 enc->fb = &fb;
 244                 enc->session(enc);
 245                 enc->feedback(enc);
 246                 enc->destroy(enc);
 247                 flush(enc);
 248                 rvid_destroy_buffer(&fb);
 249         }
 250         rvid_destroy_buffer(&enc->cpb);
 251         enc->ws->cs_destroy(enc->cs);
 252         FREE(enc->cpb_array);
 253         FREE(enc);
 254 }
 255
 256 static void rvce_begin_frame(struct pipe_video_codec *encoder,
 257                              struct pipe_video_buffer *source,
 258                              struct pipe_picture_desc *picture)
 259 {
 260         struct rvce_encoder *enc = (struct rvce_encoder*)encoder;
 261         struct vl_video_buffer *vid_buf = (struct vl_video_buffer *)source;
 262         struct pipe_h264_enc_picture_desc *pic = (struct pipe_h264_enc_picture_desc *)picture;
 263
 264         bool need_rate_control =
 265                 enc->pic.rate_ctrl.rate_ctrl_method != pic->rate_ctrl.rate_ctrl_method ||
 266                 enc->pic.quant_i_frames != pic->quant_i_frames ||
 267                 enc->pic.quant_p_frames != pic->quant_p_frames ||
 268                 enc->pic.quant_b_frames != pic->quant_b_frames;
 269
 270         enc->pic = *pic;
 271         get_pic_param(enc, pic);
 272
 273         enc->get_buffer(vid_buf->resources[0], &enc->handle, &enc->luma);
 274         enc->get_buffer(vid_buf->resources[1], NULL, &enc->chroma);
 275
 276         if (pic->picture_type == PIPE_H264_ENC_PICTURE_TYPE_IDR)
 277                 reset_cpb(enc);
 278         else if (pic->picture_type == PIPE_H264_ENC_PICTURE_TYPE_P ||
 279                  pic->picture_type == PIPE_H264_ENC_PICTURE_TYPE_B)
 280                 sort_cpb(enc);
 281
 282         if (!enc->stream_handle) {
 283                 struct rvid_buffer fb;
 284                 enc->stream_handle = rvid_alloc_stream_handle();
 285                 rvid_create_buffer(enc->screen, &fb, 512, PIPE_USAGE_STAGING);
 286                 enc->fb = &fb;
 287                 enc->session(enc);
 288                 enc->create(enc);
 289                 enc->config(enc);
 290                 enc->feedback(enc);
 291                 flush(enc);
 292                 //dump_feedback(enc, &fb);
 293                 rvid_destroy_buffer(&fb);
 294                 need_rate_control = false;
 295         }
 296
 297         if (need_rate_control) {
 298                 enc->session(enc);
 299                 enc->config(enc);
 300                 flush(enc);
 301         }
 302 }
 303
 304 static void rvce_encode_bitstream(struct pipe_video_codec *encoder,
 305                                   struct pipe_video_buffer *source,
 306                                   struct pipe_resource *destination,
 307                                   void **fb)
 308 {
 309         struct rvce_encoder *enc = (struct rvce_encoder*)encoder;
 310         enc->get_buffer(destination, &enc->bs_handle, NULL);
 311         enc->bs_size = destination->width0;
 312
 313         *fb = enc->fb = CALLOC_STRUCT(rvid_buffer);
 314         if (!rvid_create_buffer(enc->screen, enc->fb, 512, PIPE_USAGE_STAGING)) {
 315                 RVID_ERR("Can't create feedback buffer.\n");
 316                 return;
 317         }
 318         if (!radeon_emitted(enc->cs, 0))
 319                 enc->session(enc);
 320         enc->encode(enc);
 321         enc->feedback(enc);
 322 }
 323
 324 static void rvce_end_frame(struct pipe_video_codec *encoder,
 325                            struct pipe_video_buffer *source,
 326                            struct pipe_picture_desc *picture)
 327 {
 328         struct rvce_encoder *enc = (struct rvce_encoder*)encoder;
 329         struct rvce_cpb_slot *slot = LIST_ENTRY(
 330                 struct rvce_cpb_slot, enc->cpb_slots.prev, list);
 331
 332         if (!enc->dual_inst || enc->bs_idx > 1)
 333                 flush(enc);
 334
 335         /* update the CPB backtrack with the just encoded frame */
 336         slot->picture_type = enc->pic.picture_type;
 337         slot->frame_num = enc->pic.frame_num;
 338         slot->pic_order_cnt = enc->pic.pic_order_cnt;
 339         if (!enc->pic.not_referenced) {
 340                 LIST_DEL(&slot->list);
 341                 LIST_ADD(&slot->list, &enc->cpb_slots);
 342         }
 343 }
 344
 345 static void rvce_get_feedback(struct pipe_video_codec *encoder,
 346                               void *feedback, unsigned *size)
 347 {
 348         struct rvce_encoder *enc = (struct rvce_encoder*)encoder;
 349         struct rvid_buffer *fb = feedback;
 350
 351         if (size) {
 352                 uint32_t *ptr = enc->ws->buffer_map(fb->res->buf, enc->cs, PIPE_TRANSFER_READ_WRITE);
 353
 354                 if (ptr[1]) {
 355                         *size = ptr[4] - ptr[9];
 356                 } else {
 357                         *size = 0;
 358                 }
 359
 360                 enc->ws->buffer_unmap(fb->res->buf);
 361         }
 362         //dump_feedback(enc, fb);
 363         rvid_destroy_buffer(fb);
 364         FREE(fb);
 365 }
 366
 367 /**
 368  * flush any outstanding command buffers to the hardware
 369  */
 370 static void rvce_flush(struct pipe_video_codec *encoder)
 371 {
 372         struct rvce_encoder *enc = (struct rvce_encoder*)encoder;
 373
 374         flush(enc);
 375 }
 376
 377 static void rvce_cs_flush(void *ctx, unsigned flags,
 378                           struct pipe_fence_handle **fence)
 379 {
 380         // just ignored
 381 }
 382
 383 struct pipe_video_codec *rvce_create_encoder(struct pipe_context *context,
 384                                              const struct pipe_video_codec *templ,
 385                                              struct radeon_winsys* ws,
 386                                              rvce_get_buffer get_buffer)
 387 {
 388         struct r600_common_screen *rscreen = (struct r600_common_screen *)context->screen;
 389         struct r600_common_context *rctx = (struct r600_common_context*)context;
 390         struct rvce_encoder *enc;
 391         struct pipe_video_buffer *tmp_buf, templat = {};
 392         struct radeon_surf *tmp_surf;
 393         unsigned cpb_size;
 394
 395         if (!rscreen->info.vce_fw_version) {
 396                 RVID_ERR("Kernel doesn't supports VCE!\n");
 397                 return NULL;
 398
 399         } else if (!rvce_is_fw_version_supported(rscreen)) {
 400                 RVID_ERR("Unsupported VCE fw version loaded!\n");
 401                 return NULL;
 402         }
 403
 404         enc = CALLOC_STRUCT(rvce_encoder);
 405         if (!enc)
 406                 return NULL;
 407
 408         if (rscreen->info.drm_major == 3)
 409                 enc->use_vm = true;
 410         if ((rscreen->info.drm_major == 2 && rscreen->info.drm_minor >= 42) ||
 411             rscreen->info.drm_major == 3)
 412                 enc->use_vui = true;
 413         if (rscreen->info.family >= CHIP_TONGA &&
 414             rscreen->info.family != CHIP_STONEY &&
 415             rscreen->info.family != CHIP_POLARIS11)
 416                 enc->dual_pipe = true;
 417         /* TODO enable B frame with dual instance */
 418         if ((rscreen->info.family >= CHIP_TONGA) &&
 419                 (templ->max_references == 1) &&
 420                 (rscreen->info.vce_harvest_config == 0))
 421                 enc->dual_inst = true;
 422
 423         enc->base = *templ;
 424         enc->base.context = context;
 425
 426         enc->base.destroy = rvce_destroy;
 427         enc->base.begin_frame = rvce_begin_frame;
 428         enc->base.encode_bitstream = rvce_encode_bitstream;
 429         enc->base.end_frame = rvce_end_frame;
 430         enc->base.flush = rvce_flush;
 431         enc->base.get_feedback = rvce_get_feedback;
 432         enc->get_buffer = get_buffer;
 433
 434         enc->screen = context->screen;
 435         enc->ws = ws;
 436         enc->cs = ws->cs_create(rctx->ctx, RING_VCE, rvce_cs_flush, enc);
 437         if (!enc->cs) {
 438                 RVID_ERR("Can't get command submission context.\n");
 439                 goto error;
 440         }
 441
 442         templat.buffer_format = PIPE_FORMAT_NV12;
 443         templat.chroma_format = PIPE_VIDEO_CHROMA_FORMAT_420;
 444         templat.width = enc->base.width;
 445         templat.height = enc->base.height;
 446         templat.interlaced = false;
 447         if (!(tmp_buf = context->create_video_buffer(context, &templat))) {
 448                 RVID_ERR("Can't create video buffer.\n");
 449                 goto error;
 450         }
 451
 452         enc->cpb_num = get_cpb_num(enc);
 453         if (!enc->cpb_num)
 454                 goto error;
 455
 456         get_buffer(((struct vl_video_buffer *)tmp_buf)->resources[0], NULL, &tmp_surf);
 457         cpb_size = align(tmp_surf->level[0].nblk_x * tmp_surf->bpe, 128);
 458         cpb_size = cpb_size * align(tmp_surf->level[0].nblk_y, 32);
 459         cpb_size = cpb_size * 3 / 2;
 460         cpb_size = cpb_size * enc->cpb_num;
 461         if (enc->dual_pipe)
 462                 cpb_size +=  RVCE_MAX_AUX_BUFFER_NUM *
 463                         RVCE_MAX_BITSTREAM_OUTPUT_ROW_SIZE * 2;
 464         tmp_buf->destroy(tmp_buf);
 465         if (!rvid_create_buffer(enc->screen, &enc->cpb, cpb_size, PIPE_USAGE_DEFAULT)) {
 466                 RVID_ERR("Can't create CPB buffer.\n");
 467                 goto error;
 468         }
 469
 470         enc->cpb_array = CALLOC(enc->cpb_num, sizeof(struct rvce_cpb_slot));
 471         if (!enc->cpb_array)
 472                 goto error;
 473
 474         reset_cpb(enc);
 475
 476         switch (rscreen->info.vce_fw_version) {
 477         case FW_40_2_2:
 478                 radeon_vce_40_2_2_init(enc);
 479                 get_pic_param = radeon_vce_40_2_2_get_param;
 480                 break;
 481
 482         case FW_50_0_1:
 483         case FW_50_1_2:
 484         case FW_50_10_2:
 485         case FW_50_17_3:
 486                 radeon_vce_50_init(enc);
 487                 get_pic_param = radeon_vce_50_get_param;
 488                 break;
 489
 490         case FW_52_0_3:
 491         case FW_52_4_3:
 492         case FW_52_8_3:
 493                 radeon_vce_52_init(enc);
 494                 get_pic_param = radeon_vce_52_get_param;
 495                 break;
 496
 497         default:
 498                 goto error;
 499         }
 500
 501         return &enc->base;
 502
 503 error:
 504         if (enc->cs)
 505                 enc->ws->cs_destroy(enc->cs);
 506
 507         rvid_destroy_buffer(&enc->cpb);
 508
 509         FREE(enc->cpb_array);
 510         FREE(enc);
 511         return NULL;
 512 }
 513
 514 /**
 515  * check if kernel has the right fw version loaded
 516  */
 517 bool rvce_is_fw_version_supported(struct r600_common_screen *rscreen)
 518 {
 519         switch (rscreen->info.vce_fw_version) {
 520         case FW_40_2_2:
 521         case FW_50_0_1:
 522         case FW_50_1_2:
 523         case FW_50_10_2:
 524         case FW_50_17_3:
 525         case FW_52_0_3:
 526         case FW_52_4_3:
 527         case FW_52_8_3:
 528                 return true;
 529         default:
 530                 return false;
 531         }
 532 }
 533
 534 /**
 535  * Add the buffer as relocation to the current command submission
 536  */
 537 void rvce_add_buffer(struct rvce_encoder *enc, struct pb_buffer *buf,
 538                      enum radeon_bo_usage usage, enum radeon_bo_domain domain,
 539                      signed offset)
 540 {
 541         int reloc_idx;
 542
 543         reloc_idx = enc->ws->cs_add_buffer(enc->cs, buf, usage | RADEON_USAGE_SYNCHRONIZED,
 544                                            domain, RADEON_PRIO_VCE);
 545         if (enc->use_vm) {
 546                 uint64_t addr;
 547                 addr = enc->ws->buffer_get_virtual_address(buf);
 548                 addr = addr + offset;
 549                 RVCE_CS(addr >> 32);
 550                 RVCE_CS(addr);
 551         } else {
 552                 offset += enc->ws->buffer_get_reloc_offset(buf);
 553                 RVCE_CS(reloc_idx * 4);
 554                 RVCE_CS(offset);
 555         }
 556 }