1 /**************************************************************************
3 * Copyright 2013 Advanced Micro Devices, Inc.
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **************************************************************************/
30 * Christian König <christian.koenig@amd.com>
37 #include "util/list.h"
39 #define RVCE_CS(value) (enc->cs->buf[enc->cs->cdw++] = (value))
40 #define RVCE_BEGIN(cmd) { uint32_t *begin = &enc->cs->buf[enc->cs->cdw++]; RVCE_CS(cmd)
41 #define RVCE_READ(buf, domain, off) rvce_add_buffer(enc, (buf), RADEON_USAGE_READ, (domain), (off))
42 #define RVCE_WRITE(buf, domain, off) rvce_add_buffer(enc, (buf), RADEON_USAGE_WRITE, (domain), (off))
43 #define RVCE_READWRITE(buf, domain, off) rvce_add_buffer(enc, (buf), RADEON_USAGE_READWRITE, (domain), (off))
44 #define RVCE_END() *begin = (&enc->cs->buf[enc->cs->cdw] - begin) * 4; }
46 #define RVCE_MAX_BITSTREAM_OUTPUT_ROW_SIZE (4096 * 16 * 2.5)
47 #define RVCE_MAX_AUX_BUFFER_NUM 4
49 struct r600_common_screen
;
51 /* driver dependent callback */
52 typedef void (*rvce_get_buffer
)(struct pipe_resource
*resource
,
53 struct radeon_winsys_cs_handle
**handle
,
54 struct radeon_surf
**surface
);
56 /* Coded picture buffer slot */
57 struct rvce_cpb_slot
{
58 struct list_head list
;
61 enum pipe_h264_enc_picture_type picture_type
;
63 unsigned pic_order_cnt
;
66 /* VCE encoder representation */
68 struct pipe_video_codec base
;
70 /* version specific packets */
71 void (*session
)(struct rvce_encoder
*enc
);
72 void (*create
)(struct rvce_encoder
*enc
);
73 void (*feedback
)(struct rvce_encoder
*enc
);
74 void (*rate_control
)(struct rvce_encoder
*enc
);
75 void (*config_extension
)(struct rvce_encoder
*enc
);
76 void (*pic_control
)(struct rvce_encoder
*enc
);
77 void (*motion_estimation
)(struct rvce_encoder
*enc
);
78 void (*rdo
)(struct rvce_encoder
*enc
);
79 void (*vui
)(struct rvce_encoder
*enc
);
80 void (*config
)(struct rvce_encoder
*enc
);
81 void (*encode
)(struct rvce_encoder
*enc
);
82 void (*destroy
)(struct rvce_encoder
*enc
);
83 void (*task_info
)(struct rvce_encoder
*enc
, uint32_t op
,
84 uint32_t dep
, uint32_t fb_idx
,
87 unsigned stream_handle
;
89 struct pipe_screen
*screen
;
90 struct radeon_winsys
* ws
;
91 struct radeon_winsys_cs
* cs
;
93 rvce_get_buffer get_buffer
;
95 struct radeon_winsys_cs_handle
* handle
;
96 struct radeon_surf
* luma
;
97 struct radeon_surf
* chroma
;
99 struct radeon_winsys_cs_handle
* bs_handle
;
102 struct rvce_cpb_slot
*cpb_array
;
103 struct list_head cpb_slots
;
106 struct rvid_buffer
*fb
;
107 struct rvid_buffer cpb
;
108 struct pipe_h264_enc_picture_desc pic
;
110 unsigned task_info_idx
;
119 /* CPB handling functions */
120 struct rvce_cpb_slot
*current_slot(struct rvce_encoder
*enc
);
121 struct rvce_cpb_slot
*l0_slot(struct rvce_encoder
*enc
);
122 struct rvce_cpb_slot
*l1_slot(struct rvce_encoder
*enc
);
123 void rvce_frame_offset(struct rvce_encoder
*enc
, struct rvce_cpb_slot
*slot
,
124 signed *luma_offset
, signed *chroma_offset
);
126 struct pipe_video_codec
*rvce_create_encoder(struct pipe_context
*context
,
127 const struct pipe_video_codec
*templat
,
128 struct radeon_winsys
* ws
,
129 rvce_get_buffer get_buffer
);
131 bool rvce_is_fw_version_supported(struct r600_common_screen
*rscreen
);
133 void rvce_add_buffer(struct rvce_encoder
*enc
, struct radeon_winsys_cs_handle
*buf
,
134 enum radeon_bo_usage usage
, enum radeon_bo_domain domain
,
137 /* init vce fw 40.2.2 specific callbacks */
138 void radeon_vce_40_2_2_init(struct rvce_encoder
*enc
);
140 /* init vce fw 50 specific callbacks */
141 void radeon_vce_50_init(struct rvce_encoder
*enc
);