9dc0c68eefb9109a40e4f6a3e281c038c8e54fa1
[mesa.git] / src / gallium / drivers / radeon / radeon_vce.h
1 /**************************************************************************
2 *
3 * Copyright 2013 Advanced Micro Devices, Inc.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28 /*
29 * Authors:
30 * Christian König <christian.koenig@amd.com>
31 *
32 */
33
34 #ifndef RADEON_VCE_H
35 #define RADEON_VCE_H
36
37 #define RVCE_RELOC(buf, usage, domain) (enc->ws->cs_add_reloc(enc->cs, (buf), (usage), domain, RADEON_PRIO_MIN))
38
39 #define RVCE_CS(value) (enc->cs->buf[enc->cs->cdw++] = (value))
40 #define RVCE_BEGIN(cmd) { uint32_t *begin = &enc->cs->buf[enc->cs->cdw++]; RVCE_CS(cmd)
41 #define RVCE_READ(buf, domain) RVCE_CS(RVCE_RELOC(buf, RADEON_USAGE_READ, domain) * 4)
42 #define RVCE_WRITE(buf, domain) RVCE_CS(RVCE_RELOC(buf, RADEON_USAGE_WRITE, domain) * 4)
43 #define RVCE_READWRITE(buf, domain) RVCE_CS(RVCE_RELOC(buf, RADEON_USAGE_READWRITE, domain) * 4)
44 #define RVCE_END() *begin = (&enc->cs->buf[enc->cs->cdw] - begin) * 4; }
45
46 #define RVCE_NUM_CPB_FRAMES 2
47 #define RVCE_NUM_CPB_EXTRA_FRAMES 2
48
49 struct r600_common_screen;
50
51 /* driver dependent callback */
52 typedef void (*rvce_get_buffer)(struct pipe_resource *resource,
53 struct radeon_winsys_cs_handle **handle,
54 struct radeon_surface **surface);
55
56 /* VCE encoder representation */
57 struct rvce_encoder {
58 struct pipe_video_codec base;
59
60 /* version specific packets */
61 void (*session)(struct rvce_encoder *enc);
62 void (*create)(struct rvce_encoder *enc);
63 void (*feedback)(struct rvce_encoder *enc);
64 void (*rate_control)(struct rvce_encoder *enc);
65 void (*config_extension)(struct rvce_encoder *enc);
66 void (*pic_control)(struct rvce_encoder *enc);
67 void (*motion_estimation)(struct rvce_encoder *enc);
68 void (*rdo)(struct rvce_encoder *enc);
69 void (*encode)(struct rvce_encoder *enc);
70 void (*destroy)(struct rvce_encoder *enc);
71
72 unsigned stream_handle;
73
74 struct radeon_winsys* ws;
75 struct radeon_winsys_cs* cs;
76
77 rvce_get_buffer get_buffer;
78
79 struct radeon_winsys_cs_handle* handle;
80 struct radeon_surface* luma;
81 struct radeon_surface* chroma;
82
83 struct radeon_winsys_cs_handle* bs_handle;
84 unsigned bs_size;
85
86 struct rvid_buffer *fb;
87 struct rvid_buffer cpb;
88 struct pipe_h264_enc_picture_desc pic;
89 };
90
91 struct pipe_video_codec *rvce_create_encoder(struct pipe_context *context,
92 const struct pipe_video_codec *templat,
93 struct radeon_winsys* ws,
94 rvce_get_buffer get_buffer);
95
96 bool rvce_is_fw_version_supported(struct r600_common_screen *rscreen);
97
98 /* init vce fw 40.2.2 specific callbacks */
99 void radeon_vce_40_2_2_init(struct rvce_encoder *enc);
100
101 #endif